[PATCH 0/3] More SI power management and PLL fixes

["Timur Kristóf" <timur.kristof@gmail.com>]

This series has a few minor patches to address some SI issues.

When a 4K 60Hz display is connected to Tahiti or Pitcairn
there is a slight flickering near the bottom of the display.
Disabling MCLK switching fixes that.
(Other SI parts are likely affected too, but I didn't test
them thoroughly enough to say.)

When enabling ASPM on Zen 4 with Tahiti and Oland,
there are random hangs when the GPU usage is low.
Disabling ASPM fixes that.
At the moment I don't know if this is a platform-specific or
GPU-specific issue and I don't think we can reasonably
determine that without spending more time than we have.
(Other SI parts may be affected, but I didn't test them
for a long enough time to judge that.)

Finally, there is a DC patch to change the minimum PLL
dividers to the same value as the legacy non-DC display code.
This doesn't fix any visible issue but I think it's still
good to have just in case.

Timur Kristóf (3):
  drm/amd/pm: Disable MCLK switching on SI at high pixel clocks
  drm/amd: Disable ASPM on SI
  drm/amd/display: Set stricter clock dividers on DCE 6-10

 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c            | 7 +++++++
 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c | 7 +++++++
 drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c            | 5 +++++
 3 files changed, 19 insertions(+)

-- 
2.51.0