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From: "Timur Kristóf" <timur.kristof@gmail.com>
To: amd-gfx@lists.freedesktop.org, alexander.deucher@amd.com,
	Alex Hung <alex.hung@amd.com>,
	Harry Wentland <Harry.Wentland@amd.com>,
	Roman Li <Roman.Li@amd.com>, Leo Li <sunpeng.li@amd.com>,
	David Airlie <airlied@gmail.com>,
	Mario Limonciello <mario.limonciello@amd.com>,
	Ivan Lipski <ivan.lipski@amd.com>, Melissa Wen <mwen@igalia.com>
Cc: "Timur Kristóf" <timur.kristof@gmail.com>
Subject: [PATCH 01/14] drm/amd/display: Delete unimplemented dm_pp_apply_power_level_change_request()
Date: Thu, 23 Apr 2026 21:15:06 +0200	[thread overview]
Message-ID: <20260423191519.73127-2-timur.kristof@gmail.com> (raw)
In-Reply-To: <20260423191519.73127-1-timur.kristof@gmail.com>

dm_pp_apply_power_level_change_request() was called from old
DCE clock manager implementations on DCE6, 8, 10, 11.2
but has not been implemented ever since the beginning of DC.

Affected GPUs have been working fine without that implementation
for many years. Let's delete it now.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c | 8 --------
 .../gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c  | 9 ---------
 .../drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c   | 9 ---------
 .../drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c   | 9 ---------
 drivers/gpu/drm/amd/display/dc/dm_services.h             | 4 ----
 5 files changed, 39 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
index 11b2ea6edf953..17f42201ab862 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
@@ -417,14 +417,6 @@ bool dm_pp_notify_wm_clock_changes(
 	return false;
 }
 
-bool dm_pp_apply_power_level_change_request(
-	const struct dc_context *ctx,
-	struct dm_pp_power_level_change_request *level_change_req)
-{
-	/* TODO: to be implemented */
-	return false;
-}
-
 bool dm_pp_apply_clock_for_voltage_request(
 	const struct dc_context *ctx,
 	struct dm_pp_clock_for_voltage_req *clock_for_voltage_req)
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c
index 6d41df52d7c9b..ffb70120362e7 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c
@@ -431,19 +431,10 @@ static void dce_update_clocks(struct clk_mgr *clk_mgr_base,
 			bool safe_to_lower)
 {
 	struct clk_mgr_internal *clk_mgr_dce = TO_CLK_MGR_INTERNAL(clk_mgr_base);
-	struct dm_pp_power_level_change_request level_change_req;
 	const int max_disp_clk =
 		clk_mgr_dce->max_clks_by_state[DM_PP_CLOCKS_STATE_PERFORMANCE].display_clk_khz;
 	int patched_disp_clk = MIN(max_disp_clk, context->bw_ctx.bw.dce.dispclk_khz);
 
-	level_change_req.power_level = dce_get_required_clocks_state(clk_mgr_base, context);
-	/* get max clock state from PPLIB */
-	if ((level_change_req.power_level < clk_mgr_dce->cur_min_clks_state && safe_to_lower)
-			|| level_change_req.power_level > clk_mgr_dce->cur_min_clks_state) {
-		if (dm_pp_apply_power_level_change_request(clk_mgr_base->ctx, &level_change_req))
-			clk_mgr_dce->cur_min_clks_state = level_change_req.power_level;
-	}
-
 	if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr_base->clks.dispclk_khz)) {
 		patched_disp_clk = dce_set_clock(clk_mgr_base, patched_disp_clk);
 		clk_mgr_base->clks.dispclk_khz = patched_disp_clk;
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c
index 13296c6ec08f4..ae922f1a31ff8 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c
@@ -257,21 +257,12 @@ static void dce11_update_clocks(struct clk_mgr *clk_mgr_base,
 			bool safe_to_lower)
 {
 	struct clk_mgr_internal *clk_mgr_dce = TO_CLK_MGR_INTERNAL(clk_mgr_base);
-	struct dm_pp_power_level_change_request level_change_req;
 	int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz;
 
 	/*TODO: W/A for dal3 linux, investigate why this works */
 	if (!clk_mgr_dce->dfs_bypass_active)
 		patched_disp_clk = patched_disp_clk * 115 / 100;
 
-	level_change_req.power_level = dce_get_required_clocks_state(clk_mgr_base, context);
-	/* get max clock state from PPLIB */
-	if ((level_change_req.power_level < clk_mgr_dce->cur_min_clks_state && safe_to_lower)
-			|| level_change_req.power_level > clk_mgr_dce->cur_min_clks_state) {
-		if (dm_pp_apply_power_level_change_request(clk_mgr_base->ctx, &level_change_req))
-			clk_mgr_dce->cur_min_clks_state = level_change_req.power_level;
-	}
-
 	if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr_base->clks.dispclk_khz)) {
 		context->bw_ctx.bw.dce.dispclk_khz = dce_set_clock(clk_mgr_base, patched_disp_clk);
 		clk_mgr_base->clks.dispclk_khz = patched_disp_clk;
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c
index 1f36ad8a7de46..48393c69735b6 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c
@@ -193,21 +193,12 @@ static void dce112_update_clocks(struct clk_mgr *clk_mgr_base,
 			bool safe_to_lower)
 {
 	struct clk_mgr_internal *clk_mgr_dce = TO_CLK_MGR_INTERNAL(clk_mgr_base);
-	struct dm_pp_power_level_change_request level_change_req;
 	int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz;
 
 	/*TODO: W/A for dal3 linux, investigate why this works */
 	if (!clk_mgr_dce->dfs_bypass_active)
 		patched_disp_clk = patched_disp_clk * 115 / 100;
 
-	level_change_req.power_level = dce_get_required_clocks_state(clk_mgr_base, context);
-	/* get max clock state from PPLIB */
-	if ((level_change_req.power_level < clk_mgr_dce->cur_min_clks_state && safe_to_lower)
-			|| level_change_req.power_level > clk_mgr_dce->cur_min_clks_state) {
-		if (dm_pp_apply_power_level_change_request(clk_mgr_base->ctx, &level_change_req))
-			clk_mgr_dce->cur_min_clks_state = level_change_req.power_level;
-	}
-
 	if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr_base->clks.dispclk_khz)) {
 		patched_disp_clk = dce112_set_clock(clk_mgr_base, patched_disp_clk);
 		clk_mgr_base->clks.dispclk_khz = patched_disp_clk;
diff --git a/drivers/gpu/drm/amd/display/dc/dm_services.h b/drivers/gpu/drm/amd/display/dc/dm_services.h
index fbbf9c757b3c3..1395d36bfabe9 100644
--- a/drivers/gpu/drm/amd/display/dc/dm_services.h
+++ b/drivers/gpu/drm/amd/display/dc/dm_services.h
@@ -224,10 +224,6 @@ bool dm_pp_apply_display_requirements(
 	const struct dc_context *ctx,
 	const struct dm_pp_display_configuration *pp_display_cfg);
 
-bool dm_pp_apply_power_level_change_request(
-	const struct dc_context *ctx,
-	struct dm_pp_power_level_change_request *level_change_req);
-
 bool dm_pp_apply_clock_for_voltage_request(
 	const struct dc_context *ctx,
 	struct dm_pp_clock_for_voltage_req *clock_for_voltage_req);
-- 
2.53.0


  reply	other threads:[~2026-04-23 19:15 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-23 19:15 [PATCH 00/14] drm/amd: Delete defunct DAL power level code Timur Kristóf
2026-04-23 19:15 ` Timur Kristóf [this message]
2026-04-24 14:19   ` [PATCH 01/14] drm/amd/display: Delete unimplemented dm_pp_apply_power_level_change_request() Melissa Wen
2026-04-24 16:27     ` Timur Kristóf
2026-04-29 20:02   ` Melissa Wen
2026-04-23 19:15 ` [PATCH 02/14] drm/amd/display: Delete dce_get_required_clocks_state() Timur Kristóf
2026-04-29 20:03   ` Melissa Wen
2026-04-23 19:15 ` [PATCH 03/14] drm/amd/display: Remove min/max clock levels from clk_mgr Timur Kristóf
2026-04-24 14:21   ` Melissa Wen
2026-04-24 16:28     ` Timur Kristóf
2026-04-29 20:05       ` Melissa Wen
2026-04-23 19:15 ` [PATCH 04/14] drm/amd/display: Delete max_clocks_state from dm_pp_static_clock_info Timur Kristóf
2026-04-29 20:06   ` Melissa Wen
2026-04-23 19:15 ` [PATCH 05/14] drm/amd/display: Set max supported display clock without max_clks_by_state Timur Kristóf
2026-04-29 20:24   ` Melissa Wen
2026-04-30 12:28     ` Timur Kristóf
2026-04-30 18:06       ` Melissa Wen
2026-04-23 19:15 ` [PATCH 06/14] drm/amd/display: Delete max_clks_by_state from DCE clock manager Timur Kristóf
2026-04-29 20:29   ` Melissa Wen
2026-04-23 19:15 ` [PATCH 07/14] drm/amd/display: Delete disp_clk_voltage from integrated info Timur Kristóf
2026-04-29 20:35   ` Melissa Wen
2026-04-30 12:30     ` Timur Kristóf
2026-04-23 19:15 ` [PATCH 08/14] drm/amd/display: Delete dm_pp_clocks_state Timur Kristóf
2026-04-29 20:37   ` Melissa Wen
2026-04-30 12:31     ` Timur Kristóf
2026-04-23 19:15 ` [PATCH 09/14] drm/amd/pm: Delete unused get_display_power_level() function Timur Kristóf
2026-04-30 17:56   ` Melissa Wen
2026-04-23 19:15 ` [PATCH 10/14] drm/amd/pm: Delete dummy get_dal_power_level implementations Timur Kristóf
2026-04-30 18:42   ` Melissa Wen
2026-04-23 19:15 ` [PATCH 11/14] drm/amd/pm: Delete non-functional SMU8 get_dal_power_level implementation Timur Kristóf
2026-04-30 18:53   ` Melissa Wen
2026-04-23 19:15 ` [PATCH 12/14] drm/amd/pm: Delete vddc_dep_on_dal_pwrl Timur Kristóf
2026-04-30 19:03   ` Melissa Wen
2026-04-23 19:15 ` [PATCH 13/14] drm/amd/pm: Delete get_dal_power_level Timur Kristóf
2026-04-30 19:03   ` Melissa Wen
2026-04-23 19:15 ` [PATCH 14/14] drm/amd/pm: Delete PP_DAL_POWERLEVEL Timur Kristóf
2026-04-30 19:04   ` Melissa Wen

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