From: Rahul Bhansali <rbhansali@marvell.com>
To: <dev@dpdk.org>, Nithin Dabilpuram <ndabilpuram@marvell.com>,
Kiran Kumar K <kirankumark@marvell.com>,
Sunil Kumar Kori <skori@marvell.com>,
Satha Rao <skoteshwar@marvell.com>,
Harman Kalra <hkalra@marvell.com>,
Rahul Bhansali <rbhansali@marvell.com>
Cc: <jerinj@marvell.com>, <stable@dpdk.org>
Subject: [PATCH 01/14] net/cnxk: fix packet length handling
Date: Thu, 17 Sep 2026 12:40:03 +0530 [thread overview]
Message-ID: <20260917071016.2366467-1-rbhansali@marvell.com> (raw)
Fix packet length handling for reassembly failure cases.
Also updated few macros as per cn20k platform.
Fixes: 5856f23129bb ("net/cnxk: support CN20K inline IPsec Rx")
Cc: stable@dpdk.org
Signed-off-by: Rahul Bhansali <rbhansali@marvell.com>
---
drivers/net/cnxk/cn20k_rx.h | 42 +++++++++++++++++++++----------------
1 file changed, 24 insertions(+), 18 deletions(-)
diff --git a/drivers/net/cnxk/cn20k_rx.h b/drivers/net/cnxk/cn20k_rx.h
index f8fa6de2b9..0e9d562317 100644
--- a/drivers/net/cnxk/cn20k_rx.h
+++ b/drivers/net/cnxk/cn20k_rx.h
@@ -258,8 +258,7 @@ nix_sec_meta_to_mbuf_sc(uint64_t cq_w5, uint64_t cpth, const uint64_t sa_base,
*rte_security_dynfield(mbuf) = (uint64_t)inb_priv->userdata;
} else {
/* Update dynamic field with userdata */
- if (flags & NIX_RX_REAS_F && inb_priv->userdata)
- *rte_security_dynfield(mbuf) = (uint64_t)inb_priv->userdata;
+ *rte_security_dynfield(mbuf) = (uint64_t)inb_priv->userdata;
}
*len = ((w3 >> 48) & 0xFFFF) + ((cq_w5 >> 16) & 0xFF) - (cq_w5 & 0xFF);
@@ -346,16 +345,17 @@ nix_cqe_xtract_mseg(const union nix_rx_parse_u *rx, struct rte_mbuf *mbuf, uint6
uint16_t rlen = hdr->w3.rlen;
const rte_iova_t *iova_list;
uint8_t sg_cnt = 1, nb_segs;
+ uint16_t sg_len, data_len;
uint16x4_t fsz, sg_swap;
uint16_t later_skip = 0;
bool reas_fail = false;
+ bool first_frag = true;
const rte_iova_t *eol;
uint16_t data_off = 0;
bool is_oop = false;
uint16_t l4_off = 0;
uint8_t ts_rx_off;
int dyn_off = 0;
- uint16_t sg_len;
int64_t len;
uintptr_t p;
@@ -403,9 +403,11 @@ nix_cqe_xtract_mseg(const union nix_rx_parse_u *rx, struct rte_mbuf *mbuf, uint6
/* Reverse the order of fragment sizes */
fsz = vreinterpret_u16_u64(vdup_n_u64(finfo->w1.u64));
fsz = vrev64_u16(fsz);
- fsz_w1 = vget_lane_u64(vreinterpret_u64_u16(fsz), 0) >> 16;
+ fsz_w1 = vget_lane_u64(vreinterpret_u64_u16(fsz), 0);
finfo++;
l4_off = ((cq_w5 >> 24) & 0xFF) - (cq_w5 & 0xFF);
+ mbuf->pkt_len = l4_off + (fsz_w1 & 0xFFFF) - ts_rx_off;
+ fsz_w1 >>= 16;
}
}
@@ -427,6 +429,7 @@ nix_cqe_xtract_mseg(const union nix_rx_parse_u *rx, struct rte_mbuf *mbuf, uint6
return;
len = rx->pkt_lenm1 + 1;
+ mbuf->pkt_len = len;
/* Skip SG_S and first IOVA */
eol = ((const rte_iova_t *)(rx + 1) + ((rx->desc_sizem1 + 1) << 1));
@@ -434,6 +437,7 @@ nix_cqe_xtract_mseg(const union nix_rx_parse_u *rx, struct rte_mbuf *mbuf, uint6
}
sg_len = sg & 0xFFFF;
+ data_len = sg_len;
sg = sg >> 16;
/* Update data len as per the segment size */
@@ -478,14 +482,16 @@ nix_cqe_xtract_mseg(const union nix_rx_parse_u *rx, struct rte_mbuf *mbuf, uint6
/* Reset last mbuf next and start new mbuf chain */
last_mbuf->next = NULL;
+ head->nb_segs = sg_cnt;
+ head->data_len =
+ (!first_frag && (sg_cnt == 1)) ? data_len + l4_off : data_len;
head = mbuf;
len = fsz_w1 & 0xFFFF;
head->pkt_len = l4_off + len - ts_rx_off;
- head->nb_segs = sg_cnt;
- /* later frag size update*/
- sg_len += l4_off;
+ data_len = sg_len;
data_off = rearm & 0xFFFF;
sg_cnt = 0;
+ first_frag = false;
nxt_frag = nxt_frag >> 1;
fsz_w1 = fsz_w1 >> 16;
if (--num_frags == 4) {
@@ -568,6 +574,7 @@ nix_cqe_xtract_mseg(const union nix_rx_parse_u *rx, struct rte_mbuf *mbuf, uint6
/* Update for last failure fragment */
if ((flags & NIX_RX_REAS_F) && reas_fail) {
+ head->data_len = (!first_frag && (sg_cnt == 1)) ? data_len + l4_off : data_len;
cnxk_ip_reassembly_dynfield(head, dyn_off)->next_frag = NULL;
cnxk_ip_reassembly_dynfield(head, dyn_off)->nb_frags = 0;
}
@@ -1079,10 +1086,9 @@ nix_sec_meta_to_mbuf(uintptr_t inb_sa, uintptr_t cpth, struct rte_mbuf **inner,
*rearm = (*rearm & ~(BIT_ULL(16) - 1)) | inner_m->data_off;
} else {
/* Get SPI from CPT_PARSE_S's cookie(already swapped) */
- inb_priv = roc_nix_inl_ot_ipsec_inb_sa_sw_rsvd((void *)inb_sa);
+ inb_priv = roc_nix_inl_ow_ipsec_inb_sa_sw_rsvd((void *)inb_sa);
/* Update dynamic field with userdata */
- if (flags & NIX_RX_REAS_F && inb_priv->userdata)
- *rte_security_dynfield(inner_m) = (uint64_t)inb_priv->userdata;
+ *rte_security_dynfield(inner_m) = (uint64_t)inb_priv->userdata;
}
/* Clear and update original lower 16 bit of data offset */
@@ -1444,8 +1450,8 @@ cn20k_nix_recv_pkts_vector(void *args, struct rte_mbuf **mbufs, uint16_t pkts, c
mask23 = vceqq_u64(sa23, vdupq_n_u64(0xFFFFFFFF));
}
- sa01 = vshlq_n_u64(sa01, ROC_NIX_INL_OT_IPSEC_INB_SA_SZ_LOG2);
- sa23 = vshlq_n_u64(sa23, ROC_NIX_INL_OT_IPSEC_INB_SA_SZ_LOG2);
+ sa01 = vshlq_n_u64(sa01, ROC_NIX_INL_OW_IPSEC_INB_SA_SZ_LOG2);
+ sa23 = vshlq_n_u64(sa23, ROC_NIX_INL_OW_IPSEC_INB_SA_SZ_LOG2);
sa01 = vaddq_u64(sa01, vdupq_n_u64(sa_base));
sa23 = vaddq_u64(sa23, vdupq_n_u64(sa_base));
@@ -1456,23 +1462,23 @@ cn20k_nix_recv_pkts_vector(void *args, struct rte_mbuf **mbufs, uint16_t pkts, c
const uint8x16x2_t tbl = {{
{
- /* ROC_IE_OT_UCC_SUCCESS_PKT_IP_BADCSUM */
+ /* ROC_IE_OW_UCC_SUCCESS_PKT_IP_BADCSUM */
RTE_MBUF_F_RX_IP_CKSUM_BAD >> 1,
- /* ROC_IE_OT_UCC_SUCCESS_PKT_L4_GOODCSUM */
+ /* ROC_IE_OW_UCC_SUCCESS_PKT_L4_GOODCSUM */
(RTE_MBUF_F_RX_IP_CKSUM_GOOD |
RTE_MBUF_F_RX_L4_CKSUM_GOOD) >>
1,
- /* ROC_IE_OT_UCC_SUCCESS_PKT_L4_BADCSUM */
+ /* ROC_IE_OW_UCC_SUCCESS_PKT_L4_BADCSUM */
(RTE_MBUF_F_RX_IP_CKSUM_GOOD |
RTE_MBUF_F_RX_L4_CKSUM_BAD) >>
1,
1,
- /* ROC_IE_OT_UCC_SUCCESS_PKT_UDPESP_NZCSUM */
+ /* ROC_IE_OW_UCC_SUCCESS_PKT_UDPESP_NZCSUM */
(RTE_MBUF_F_RX_IP_CKSUM_GOOD |
RTE_MBUF_F_RX_L4_CKSUM_GOOD) >>
1,
1,
- /* ROC_IE_OT_UCC_SUCCESS_PKT_UDP_ZEROCSUM */
+ /* ROC_IE_OW_UCC_SUCCESS_PKT_UDP_ZEROCSUM */
(RTE_MBUF_F_RX_IP_CKSUM_GOOD |
RTE_MBUF_F_RX_L4_CKSUM_GOOD) >>
1,
@@ -1490,7 +1496,7 @@ cn20k_nix_recv_pkts_vector(void *args, struct rte_mbuf **mbufs, uint16_t pkts, c
1,
1,
1,
- /* ROC_IE_OT_UCC_SUCCESS_PKT_IP_GOODCSUM */
+ /* ROC_IE_OW_UCC_SUCCESS_PKT_IP_GOODCSUM */
RTE_MBUF_F_RX_IP_CKSUM_GOOD >> 1,
/* Rest 0 to indicate RTE_MBUF_F_RX_SEC_OFFLOAD_FAILED */
0,
--
2.34.1
next reply other threads:[~2026-09-17 7:10 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-17 7:10 Rahul Bhansali [this message]
2026-09-17 7:10 ` [PATCH 02/14] common/cnxk: disable CPT drop error in CQ Rahul Bhansali
2026-09-17 16:14 ` Stephen Hemminger
2026-09-17 7:10 ` [PATCH 03/14] common/cnxk: fix NIX QINT count reset Rahul Bhansali
2026-09-17 16:14 ` Stephen Hemminger
2026-09-17 7:10 ` [PATCH 04/14] common/cnxk: update channel mask for cn20k Rahul Bhansali
2026-09-17 7:10 ` [PATCH 05/14] common/cnxk: update macro " Rahul Bhansali
2026-09-17 7:10 ` [PATCH 06/14] common/cnxk: fix null deref and irq ack in CPT CQ handler Rahul Bhansali
2026-09-17 16:15 ` Stephen Hemminger
2026-09-17 7:10 ` [PATCH 07/14] common/cnxk: derive mbuf from CPT CQ in inline IRQ path Rahul Bhansali
2026-09-17 16:15 ` Stephen Hemminger
2026-09-17 7:10 ` [PATCH 08/14] net/cnxk: resolve mbuf from CPT CQ format in SSO work cb Rahul Bhansali
2026-09-17 16:16 ` Stephen Hemminger
2026-09-17 7:10 ` [PATCH 09/14] common/cnxk: update bpid config for cn20k Rahul Bhansali
2026-09-17 16:16 ` Stephen Hemminger
2026-09-17 7:10 ` [PATCH 10/14] net/cnxk: add MSNS inb SA and CN20K CPT result struct Rahul Bhansali
2026-09-17 16:16 ` Stephen Hemminger
2026-09-17 7:10 ` [PATCH 11/14] common/cnxk: fix CPT CQ base address calculation Rahul Bhansali
2026-09-17 7:10 ` [PATCH 12/14] common/cnxk: update mode param for link speed Rahul Bhansali
2026-09-17 16:17 ` Stephen Hemminger
2026-09-17 7:10 ` [PATCH 13/14] common/cnxk: support for cn20k legacy msns mode Rahul Bhansali
2026-09-17 16:18 ` Stephen Hemminger
2026-09-17 7:10 ` [PATCH 14/14] net/cnxk: fix custom inbound SA condition check Rahul Bhansali
2026-09-17 16:12 ` [PATCH 01/14] net/cnxk: fix packet length handling Stephen Hemminger
2026-09-17 16:29 ` Stephen Hemminger
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260917071016.2366467-1-rbhansali@marvell.com \
--to=rbhansali@marvell.com \
--cc=dev@dpdk.org \
--cc=hkalra@marvell.com \
--cc=jerinj@marvell.com \
--cc=kirankumark@marvell.com \
--cc=ndabilpuram@marvell.com \
--cc=skori@marvell.com \
--cc=skoteshwar@marvell.com \
--cc=stable@dpdk.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox