From: Rahul Bhansali <rbhansali@marvell.com>
To: <dev@dpdk.org>, Nithin Dabilpuram <ndabilpuram@marvell.com>,
Kiran Kumar K <kirankumark@marvell.com>,
Sunil Kumar Kori <skori@marvell.com>,
Satha Rao <skoteshwar@marvell.com>,
Harman Kalra <hkalra@marvell.com>
Cc: <jerinj@marvell.com>,
Rakesh Kudurumalla <rkudurumalla@marvell.com>,
"Rahul Bhansali" <rbhansali@marvell.com>
Subject: [PATCH 08/14] net/cnxk: resolve mbuf from CPT CQ format in SSO work cb
Date: Thu, 17 Sep 2026 12:40:10 +0530 [thread overview]
Message-ID: <20260917071016.2366467-8-rbhansali@marvell.com> (raw)
In-Reply-To: <20260917071016.2366467-1-rbhansali@marvell.com>
From: Rakesh Kudurumalla <rkudurumalla@marvell.com>
When handling NIX inline CPT CQ events (type < NIX_INL_SSO), derive the
mbuf from the completion queue word layout using fmt bits: WQE_PTR_CPTR
uses w1.esn; CPTR_WQE_PTR uses w3.comp_ptr shifted left by 3 for the byte
address. Pass the mbuf into cn20k_eth_sec_post_event instead of NULL.
Drop RTE_SET_USED(args) since args is consumed by post_event.
Signed-off-by: Rakesh Kudurumalla <rkudurumalla@marvell.com>
Signed-off-by: Rahul Bhansali <rbhansali@marvell.com>
---
drivers/net/cnxk/cn20k_ethdev_sec.c | 44 +++++++++++++++++++----------
1 file changed, 29 insertions(+), 15 deletions(-)
diff --git a/drivers/net/cnxk/cn20k_ethdev_sec.c b/drivers/net/cnxk/cn20k_ethdev_sec.c
index 65f0235a46..b365426065 100644
--- a/drivers/net/cnxk/cn20k_ethdev_sec.c
+++ b/drivers/net/cnxk/cn20k_ethdev_sec.c
@@ -438,7 +438,7 @@ cnxk_pktmbuf_free_no_cache(struct rte_mbuf *mbuf)
} while (mbuf != NULL);
}
-static void
+static bool
cn20k_eth_sec_post_event(struct rte_eth_dev *eth_dev, void *sa, enum nix_inl_event_type type,
uint16_t uc_compcode, uint16_t compcode, struct rte_mbuf *mbuf)
{
@@ -447,6 +447,7 @@ cn20k_eth_sec_post_event(struct rte_eth_dev *eth_dev, void *sa, enum nix_inl_eve
struct cn20k_outb_priv_data *outb_priv;
struct cn20k_inb_priv_data *inb_priv;
static uint64_t warn_cnt;
+ bool free_mbuf = false;
uint64_t life_unit;
memset(&desc, 0, sizeof(desc));
@@ -454,14 +455,15 @@ cn20k_eth_sec_post_event(struct rte_eth_dev *eth_dev, void *sa, enum nix_inl_eve
if (type == NIX_INL_INB_CPT_CQ) {
struct roc_ow_ipsec_inb_sa *inb_sa = (struct roc_ow_ipsec_inb_sa *)sa;
- inb_priv = roc_nix_inl_ow_ipsec_inb_sa_sw_rsvd(sa);
- desc.metadata = (uint64_t)inb_priv->userdata;
- life_unit = inb_sa->w2.s.life_unit;
+ inb_priv = sa ? roc_nix_inl_ow_ipsec_inb_sa_sw_rsvd(sa) : NULL;
+ desc.metadata = inb_priv ? (uint64_t)inb_priv->userdata : 0;
+ life_unit = inb_sa ? inb_sa->w2.s.life_unit : 0;
} else {
struct roc_ow_ipsec_outb_sa *outb_sa = (struct roc_ow_ipsec_outb_sa *)sa;
outb_priv = roc_nix_inl_ow_ipsec_outb_sa_sw_rsvd(sa);
desc.metadata = (uint64_t)outb_priv->userdata;
life_unit = outb_sa->w2.s.life_unit;
+ free_mbuf = true;
}
if (mbuf)
@@ -483,6 +485,7 @@ cn20k_eth_sec_post_event(struct rte_eth_dev *eth_dev, void *sa, enum nix_inl_eve
desc.subtype = RTE_ETH_EVENT_IPSEC_SA_PKT_EXPIRY;
else
desc.subtype = RTE_ETH_EVENT_IPSEC_SA_BYTE_EXPIRY;
+ free_mbuf = false;
break;
case ROC_IE_OW_UCC_ERR_PKT_IP:
warn_cnt++;
@@ -503,7 +506,10 @@ cn20k_eth_sec_post_event(struct rte_eth_dev *eth_dev, void *sa, enum nix_inl_eve
break;
}
- rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_IPSEC, &desc);
+ if (eth_dev)
+ rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_IPSEC, &desc);
+
+ return free_mbuf;
}
static const char *
@@ -532,13 +538,14 @@ cn20k_eth_sec_sso_work_cb(uint64_t *gw, void *args, enum nix_inl_event_type type
struct cn20k_sec_sess_priv sess_priv;
struct cn20k_outb_priv_data *outb_priv;
struct roc_ow_ipsec_outb_sa *outb_sa;
+ struct rte_eth_dev *eth_dev = NULL;
+ struct rte_mbuf *mbuf = NULL;
struct cpt_cn20k_res_s *res;
- struct rte_eth_dev *eth_dev;
struct cnxk_eth_dev *dev;
uint16_t dlen_adj, rlen;
- struct rte_mbuf *mbuf;
uintptr_t sa_base;
uintptr_t nixtx;
+ bool free_mbuf;
uint8_t port;
plt_nix_dbg("Received %s event", get_inl_event_type(type));
@@ -562,17 +569,19 @@ cn20k_eth_sec_sso_work_cb(uint64_t *gw, void *args, enum nix_inl_event_type type
if (type) {
struct cpt_cq_s *cqs = (struct cpt_cq_s *)cq_s;
- if (type == NIX_INL_INB_CPT_CQ) {
+ if (type == NIX_INL_INB_CPT_CQ && cqs->w2.s.fmt != WQE_PTR_ANTI_REPLAY) {
struct cn20k_inb_priv_data *inb_priv;
- inb_priv = roc_nix_inl_ow_ipsec_inb_sa_sw_rsvd(args);
- if (inb_priv->eth_sec && inb_priv->eth_sec->eth_dev) {
+ inb_priv = args ? roc_nix_inl_ow_ipsec_inb_sa_sw_rsvd(args) : NULL;
+ if (inb_priv && inb_priv->eth_sec && inb_priv->eth_sec->eth_dev) {
eth_dev = inb_priv->eth_sec->eth_dev;
} else {
- plt_err("Inbound CPT CQ event: no eth_dev in SA priv");
+ plt_nix_dbg("Inbound CPT CQ event: cc %x uc_cc %x fmt %x",
+ cqs->w0.s.compcode, cqs->w0.s.uc_compcode,
+ cqs->w2.s.fmt);
return;
}
- } else {
+ } else if (type != NIX_INL_INB_CPT_CQ) {
if (port_id >= RTE_MAX_ETHPORTS) {
plt_err("CPT CQ event: invalid port_id %u", port_id);
return;
@@ -581,9 +590,14 @@ cn20k_eth_sec_sso_work_cb(uint64_t *gw, void *args, enum nix_inl_event_type type
}
if (type < NIX_INL_SSO) {
- cn20k_eth_sec_post_event(eth_dev, args, type,
- (uint16_t)cqs->w0.s.uc_compcode,
- (uint16_t)cqs->w0.s.compcode, NULL);
+ mbuf = (struct rte_mbuf *)(uintptr_t)gw[1];
+
+ free_mbuf = cn20k_eth_sec_post_event(eth_dev, args,
+ type, (uint16_t)cqs->w0.s.uc_compcode,
+ (uint16_t)cqs->w0.s.compcode, mbuf);
+
+ if (free_mbuf)
+ cnxk_pktmbuf_free_no_cache(mbuf);
return;
}
if (type == NIX_INL_SOFT_EXPIRY_THRD) {
--
2.34.1
next prev parent reply other threads:[~2026-09-17 7:14 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-17 7:10 [PATCH 01/14] net/cnxk: fix packet length handling Rahul Bhansali
2026-09-17 7:10 ` [PATCH 02/14] common/cnxk: disable CPT drop error in CQ Rahul Bhansali
2026-09-17 16:14 ` Stephen Hemminger
2026-09-17 7:10 ` [PATCH 03/14] common/cnxk: fix NIX QINT count reset Rahul Bhansali
2026-09-17 16:14 ` Stephen Hemminger
2026-09-17 7:10 ` [PATCH 04/14] common/cnxk: update channel mask for cn20k Rahul Bhansali
2026-09-17 7:10 ` [PATCH 05/14] common/cnxk: update macro " Rahul Bhansali
2026-09-17 7:10 ` [PATCH 06/14] common/cnxk: fix null deref and irq ack in CPT CQ handler Rahul Bhansali
2026-09-17 16:15 ` Stephen Hemminger
2026-09-17 7:10 ` [PATCH 07/14] common/cnxk: derive mbuf from CPT CQ in inline IRQ path Rahul Bhansali
2026-09-17 16:15 ` Stephen Hemminger
2026-09-17 7:10 ` Rahul Bhansali [this message]
2026-09-17 16:16 ` [PATCH 08/14] net/cnxk: resolve mbuf from CPT CQ format in SSO work cb Stephen Hemminger
2026-09-17 7:10 ` [PATCH 09/14] common/cnxk: update bpid config for cn20k Rahul Bhansali
2026-09-17 16:16 ` Stephen Hemminger
2026-09-17 7:10 ` [PATCH 10/14] net/cnxk: add MSNS inb SA and CN20K CPT result struct Rahul Bhansali
2026-09-17 16:16 ` Stephen Hemminger
2026-09-17 7:10 ` [PATCH 11/14] common/cnxk: fix CPT CQ base address calculation Rahul Bhansali
2026-09-17 7:10 ` [PATCH 12/14] common/cnxk: update mode param for link speed Rahul Bhansali
2026-09-17 16:17 ` Stephen Hemminger
2026-09-17 7:10 ` [PATCH 13/14] common/cnxk: support for cn20k legacy msns mode Rahul Bhansali
2026-09-17 16:18 ` Stephen Hemminger
2026-09-17 7:10 ` [PATCH 14/14] net/cnxk: fix custom inbound SA condition check Rahul Bhansali
2026-09-17 16:12 ` [PATCH 01/14] net/cnxk: fix packet length handling Stephen Hemminger
2026-09-17 16:29 ` Stephen Hemminger
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