* [igt-dev] [PATCH i-g-t v3] lib/igt_draw: Change MOCS settings for MTL
@ 2022-12-20 4:39 Jeevan B
0 siblings, 0 replies; 4+ messages in thread
From: Jeevan B @ 2022-12-20 4:39 UTC (permalink / raw)
To: igt-dev; +Cc: lucas.demarchi
On MTL, we want the table entry labelled "UC (GO:Mem)"
which has index 5. This means that the MOCS value is 10.
v2: Add define for MOCS settings. (Lucas)
Signed-off-by: Jeevan B <jeevan.b@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
lib/igt_draw.c | 13 ++++++++++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/lib/igt_draw.c b/lib/igt_draw.c
index 975d65cd..e9b427f7 100644
--- a/lib/igt_draw.c
+++ b/lib/igt_draw.c
@@ -651,13 +651,16 @@ static struct intel_buf *create_buf(int fd, struct buf_ops *bops,
return buf;
}
+#define DG2_MOCS_UC_GO_MEM 2 /* MOCS index 0x1 */
+#define MTL_MOCS_UC_GO_MEM 10 /* MOCS index 0x5 */
+
static void draw_rect_blt(int fd, struct cmd_data *cmd_data,
struct buf_data *buf, struct rect *rect,
uint32_t tiling, uint32_t color)
{
struct intel_bb *ibb;
struct intel_buf *dst;
- int blt_cmd_len, blt_cmd_tiling, blt_cmd_depth;
+ int blt_cmd_len, blt_cmd_tiling, blt_cmd_depth, mocs_val;
uint32_t devid = intel_get_drm_devid(fd);
int gen = intel_gen(devid);
int pitch;
@@ -699,11 +702,15 @@ static void draw_rect_blt(int fd, struct cmd_data *cmd_data,
igt_assert(false);
}
+ if (IS_METEORLAKE(intel_get_drm_devid(fd)))
+ mocs_val = MTL_MOCS_UC_GO_MEM;
+ else
+ mocs_val = DG2_MOCS_UC_GO_MEM;
+
pitch = tiling ? buf->stride / 4 : buf->stride;
intel_bb_out(ibb, XY_FAST_COLOR_BLT | blt_cmd_depth);
- /* DG2 MOCS entry 2 is "UC - Non-Coherent; GO:Memory" */
- intel_bb_out(ibb, blt_cmd_tiling | 2 << 21 | (pitch-1));
+ intel_bb_out(ibb, blt_cmd_tiling | mocs_val << 21 | (pitch-1));
intel_bb_out(ibb, (rect->y << 16) | rect->x);
intel_bb_out(ibb, ((rect->y + rect->h) << 16) | (rect->x + rect->w));
intel_bb_emit_reloc_fenced(ibb, dst->handle, 0,
--
2.36.0
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [igt-dev] [PATCH i-g-t v3] lib/igt_draw: Change MOCS settings for MTL
@ 2022-12-22 9:36 Jeevan B
0 siblings, 0 replies; 4+ messages in thread
From: Jeevan B @ 2022-12-22 9:36 UTC (permalink / raw)
To: igt-dev; +Cc: lucas.demarchi
On MTL, we want the table entry labelled "UC (GO:Mem)"
which has index 5. This means that the MOCS value is 10.
v2: Add define for MOCS settings. (Lucas)
v3: Extending get_mocs_index and using get_mocs_index
to get mocs val. (Zbigniew)
Signed-off-by: Jeevan B <jeevan.b@intel.com>
---
lib/i915/intel_mocs.c | 6 +++++-
lib/igt_draw.c | 7 +++++--
2 files changed, 10 insertions(+), 3 deletions(-)
diff --git a/lib/i915/intel_mocs.c b/lib/i915/intel_mocs.c
index df541ab0..d2994480 100644
--- a/lib/i915/intel_mocs.c
+++ b/lib/i915/intel_mocs.c
@@ -11,6 +11,8 @@
#define DG1_MOCS_WB_IDX 5
#define DG2_MOCS_UC_IDX 1
#define DG2_MOCS_WB_IDX 3
+#define MTL_MOCS_UC_IDX 5
+#define MTL_MOCS_WB_IDX 10
#define GEN12_MOCS_UC_IDX 3
#define GEN12_MOCS_WB_IDX 2
#define XY_BLOCK_COPY_BLT_MOCS_SHIFT 21
@@ -38,7 +40,9 @@ static void get_mocs_index(int fd, struct drm_i915_mocs_index *mocs)
} else if (IS_DG2(devid)) {
mocs->uc_index = DG2_MOCS_UC_IDX;
mocs->wb_index = DG2_MOCS_WB_IDX;
-
+ } else if (IS_METEORLAKE(devid)) {
+ mocs->uc_index = MTL_MOCS_UC_IDX;
+ mocs->wb_index = MTL_MOCS_WB_IDX;
} else if (IS_GEN12(devid)) {
mocs->uc_index = GEN12_MOCS_UC_IDX;
mocs->wb_index = GEN12_MOCS_WB_IDX;
diff --git a/lib/igt_draw.c b/lib/igt_draw.c
index 975d65cd..a2c79944 100644
--- a/lib/igt_draw.c
+++ b/lib/igt_draw.c
@@ -36,6 +36,7 @@
#include "i830_reg.h"
#include "i915/gem_create.h"
#include "i915/gem_mman.h"
+#include "i915/intel_mocs.h"
#ifndef PAGE_ALIGN
#ifndef PAGE_SIZE
@@ -651,6 +652,9 @@ static struct intel_buf *create_buf(int fd, struct buf_ops *bops,
return buf;
}
+#define DG2_MOCS_UC_GO_MEM 2 /* MOCS index 0x1 */
+#define MTL_MOCS_UC_GO_MEM 10 /* MOCS index 0x5 */
+
static void draw_rect_blt(int fd, struct cmd_data *cmd_data,
struct buf_data *buf, struct rect *rect,
uint32_t tiling, uint32_t color)
@@ -702,8 +706,7 @@ static void draw_rect_blt(int fd, struct cmd_data *cmd_data,
pitch = tiling ? buf->stride / 4 : buf->stride;
intel_bb_out(ibb, XY_FAST_COLOR_BLT | blt_cmd_depth);
- /* DG2 MOCS entry 2 is "UC - Non-Coherent; GO:Memory" */
- intel_bb_out(ibb, blt_cmd_tiling | 2 << 21 | (pitch-1));
+ intel_bb_out(ibb, blt_cmd_tiling | intel_get_wb_mocs(fd) << 21 | (pitch-1));
intel_bb_out(ibb, (rect->y << 16) | rect->x);
intel_bb_out(ibb, ((rect->y + rect->h) << 16) | (rect->x + rect->w));
intel_bb_emit_reloc_fenced(ibb, dst->handle, 0,
--
2.36.0
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [igt-dev] [PATCH i-g-t v3] lib/igt_draw: Change MOCS settings for MTL
@ 2022-12-22 9:38 Jeevan B
2022-12-22 15:35 ` Lucas De Marchi
0 siblings, 1 reply; 4+ messages in thread
From: Jeevan B @ 2022-12-22 9:38 UTC (permalink / raw)
To: igt-dev; +Cc: lucas.demarchi
On MTL, we want the table entry labelled "UC (GO:Mem)"
which has index 5. This means that the MOCS value is 10.
v2: Add define for MOCS settings. (Lucas)
v3: Extending get_mocs_index and using get_mocs_index
to get mocs val. (Zbigniew)
Signed-off-by: Jeevan B <jeevan.b@intel.com>
---
lib/i915/intel_mocs.c | 6 +++++-
lib/igt_draw.c | 4 ++--
2 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/lib/i915/intel_mocs.c b/lib/i915/intel_mocs.c
index df541ab0..d2994480 100644
--- a/lib/i915/intel_mocs.c
+++ b/lib/i915/intel_mocs.c
@@ -11,6 +11,8 @@
#define DG1_MOCS_WB_IDX 5
#define DG2_MOCS_UC_IDX 1
#define DG2_MOCS_WB_IDX 3
+#define MTL_MOCS_UC_IDX 5
+#define MTL_MOCS_WB_IDX 10
#define GEN12_MOCS_UC_IDX 3
#define GEN12_MOCS_WB_IDX 2
#define XY_BLOCK_COPY_BLT_MOCS_SHIFT 21
@@ -38,7 +40,9 @@ static void get_mocs_index(int fd, struct drm_i915_mocs_index *mocs)
} else if (IS_DG2(devid)) {
mocs->uc_index = DG2_MOCS_UC_IDX;
mocs->wb_index = DG2_MOCS_WB_IDX;
-
+ } else if (IS_METEORLAKE(devid)) {
+ mocs->uc_index = MTL_MOCS_UC_IDX;
+ mocs->wb_index = MTL_MOCS_WB_IDX;
} else if (IS_GEN12(devid)) {
mocs->uc_index = GEN12_MOCS_UC_IDX;
mocs->wb_index = GEN12_MOCS_WB_IDX;
diff --git a/lib/igt_draw.c b/lib/igt_draw.c
index 975d65cd..b02ad2a8 100644
--- a/lib/igt_draw.c
+++ b/lib/igt_draw.c
@@ -36,6 +36,7 @@
#include "i830_reg.h"
#include "i915/gem_create.h"
#include "i915/gem_mman.h"
+#include "i915/intel_mocs.h"
#ifndef PAGE_ALIGN
#ifndef PAGE_SIZE
@@ -702,8 +703,7 @@ static void draw_rect_blt(int fd, struct cmd_data *cmd_data,
pitch = tiling ? buf->stride / 4 : buf->stride;
intel_bb_out(ibb, XY_FAST_COLOR_BLT | blt_cmd_depth);
- /* DG2 MOCS entry 2 is "UC - Non-Coherent; GO:Memory" */
- intel_bb_out(ibb, blt_cmd_tiling | 2 << 21 | (pitch-1));
+ intel_bb_out(ibb, blt_cmd_tiling | intel_get_wb_mocs(fd) << 21 | (pitch-1));
intel_bb_out(ibb, (rect->y << 16) | rect->x);
intel_bb_out(ibb, ((rect->y + rect->h) << 16) | (rect->x + rect->w));
intel_bb_emit_reloc_fenced(ibb, dst->handle, 0,
--
2.36.0
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [igt-dev] [PATCH i-g-t v3] lib/igt_draw: Change MOCS settings for MTL
2022-12-22 9:38 Jeevan B
@ 2022-12-22 15:35 ` Lucas De Marchi
0 siblings, 0 replies; 4+ messages in thread
From: Lucas De Marchi @ 2022-12-22 15:35 UTC (permalink / raw)
To: Jeevan B; +Cc: igt-dev
On Thu, Dec 22, 2022 at 03:08:21PM +0530, Jeevan B wrote:
>On MTL, we want the table entry labelled "UC (GO:Mem)"
>which has index 5. This means that the MOCS value is 10.
>
>v2: Add define for MOCS settings. (Lucas)
>v3: Extending get_mocs_index and using get_mocs_index
> to get mocs val. (Zbigniew)
>
>Signed-off-by: Jeevan B <jeevan.b@intel.com>
>---
> lib/i915/intel_mocs.c | 6 +++++-
> lib/igt_draw.c | 4 ++--
> 2 files changed, 7 insertions(+), 3 deletions(-)
>
>diff --git a/lib/i915/intel_mocs.c b/lib/i915/intel_mocs.c
>index df541ab0..d2994480 100644
>--- a/lib/i915/intel_mocs.c
>+++ b/lib/i915/intel_mocs.c
>@@ -11,6 +11,8 @@
> #define DG1_MOCS_WB_IDX 5
> #define DG2_MOCS_UC_IDX 1
> #define DG2_MOCS_WB_IDX 3
>+#define MTL_MOCS_UC_IDX 5
>+#define MTL_MOCS_WB_IDX 10
> #define GEN12_MOCS_UC_IDX 3
> #define GEN12_MOCS_WB_IDX 2
> #define XY_BLOCK_COPY_BLT_MOCS_SHIFT 21
>@@ -38,7 +40,9 @@ static void get_mocs_index(int fd, struct drm_i915_mocs_index *mocs)
> } else if (IS_DG2(devid)) {
> mocs->uc_index = DG2_MOCS_UC_IDX;
> mocs->wb_index = DG2_MOCS_WB_IDX;
>-
>+ } else if (IS_METEORLAKE(devid)) {
>+ mocs->uc_index = MTL_MOCS_UC_IDX;
>+ mocs->wb_index = MTL_MOCS_WB_IDX;
convention is latest platform first, so this needs to come above DG2.
MTL
DG2
DG1
GEN12
..
> } else if (IS_GEN12(devid)) {
> mocs->uc_index = GEN12_MOCS_UC_IDX;
> mocs->wb_index = GEN12_MOCS_WB_IDX;
>diff --git a/lib/igt_draw.c b/lib/igt_draw.c
>index 975d65cd..b02ad2a8 100644
>--- a/lib/igt_draw.c
>+++ b/lib/igt_draw.c
>@@ -36,6 +36,7 @@
> #include "i830_reg.h"
> #include "i915/gem_create.h"
> #include "i915/gem_mman.h"
>+#include "i915/intel_mocs.h"
>
> #ifndef PAGE_ALIGN
> #ifndef PAGE_SIZE
>@@ -702,8 +703,7 @@ static void draw_rect_blt(int fd, struct cmd_data *cmd_data,
> pitch = tiling ? buf->stride / 4 : buf->stride;
>
> intel_bb_out(ibb, XY_FAST_COLOR_BLT | blt_cmd_depth);
>- /* DG2 MOCS entry 2 is "UC - Non-Coherent; GO:Memory" */
>- intel_bb_out(ibb, blt_cmd_tiling | 2 << 21 | (pitch-1));
>+ intel_bb_out(ibb, blt_cmd_tiling | intel_get_wb_mocs(fd) << 21 | (pitch-1));
weren't you supposed to use the intel_get_uc_mocs()?
Lucas De Marchi
> intel_bb_out(ibb, (rect->y << 16) | rect->x);
> intel_bb_out(ibb, ((rect->y + rect->h) << 16) | (rect->x + rect->w));
> intel_bb_emit_reloc_fenced(ibb, dst->handle, 0,
>--
>2.36.0
>
^ permalink raw reply [flat|nested] 4+ messages in thread
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2022-12-22 15:35 ` Lucas De Marchi
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