From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: igt-dev@lists.freedesktop.org
Subject: [igt-dev] [PATCH i-g-t 05/10] tools/intel_watermark: Extract is_cursor()
Date: Wed, 25 Jan 2023 06:55:17 +0200 [thread overview]
Message-ID: <20230125045522.18169-5-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20230125045522.18169-1-ville.syrjala@linux.intel.com>
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Make the code a bit less magical by pulling the
"is this plane cursor?" check into helper.
v2: One more
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
tools/intel_watermark.c | 25 +++++++++++++++----------
1 file changed, 15 insertions(+), 10 deletions(-)
diff --git a/tools/intel_watermark.c b/tools/intel_watermark.c
index eac40e4a5d17..19372db4506b 100644
--- a/tools/intel_watermark.c
+++ b/tools/intel_watermark.c
@@ -131,6 +131,11 @@ static char endis_ast(bool enabled)
return enabled ? '*' : ' ';
}
+static bool is_cursor(int plane)
+{
+ return plane == 0;
+}
+
static int skl_num_pipes(uint32_t d)
{
return intel_gen(d) >= 12 ? 4 : 3;
@@ -183,7 +188,7 @@ static const char *skl_plane_name(int plane)
{
static char name[32];
- if (plane == 0)
+ if (is_cursor(plane))
snprintf(name, sizeof(name), "CURSOR");
else
snprintf(name, sizeof(name), "PLANE_%1d", plane);
@@ -204,7 +209,7 @@ static const char *skl_plane_ctl_reg_name(int plane)
{
static char reg_name[32];
- if (plane == 0)
+ if (is_cursor(plane))
snprintf(reg_name, sizeof(reg_name), "CUR_CTL");
else
snprintf(reg_name, sizeof(reg_name), "PLANE_CTL_%1d", plane);
@@ -216,7 +221,7 @@ static const char *skl_wm_reg_name(int plane, int level)
{
static char reg_name[32];
- if (plane == 0)
+ if (is_cursor(plane))
snprintf(reg_name, sizeof(reg_name), "CUR_WM_%1d", level);
else
snprintf(reg_name, sizeof(reg_name), "PLANE_WM_%1d_%1d", plane, level);
@@ -228,7 +233,7 @@ static const char *skl_wm_trans_reg_name(int plane)
{
static char reg_name[32];
- if (plane == 0)
+ if (is_cursor(plane))
snprintf(reg_name, sizeof(reg_name), "CUR_WM_TRANS");
else
snprintf(reg_name, sizeof(reg_name), "PLANE_WM_TRANS_%1d", plane);
@@ -240,7 +245,7 @@ static const char *skl_wm_sagv_reg_name(int plane)
{
static char reg_name[32];
- if (plane == 0)
+ if (is_cursor(plane))
snprintf(reg_name, sizeof(reg_name), "CUR_WM_SAGV");
else
snprintf(reg_name, sizeof(reg_name), "PLANE_WM_SAGV_%1d", plane);
@@ -252,7 +257,7 @@ static const char *skl_wm_sagv_trans_reg_name(int plane)
{
static char reg_name[32];
- if (plane == 0)
+ if (is_cursor(plane))
snprintf(reg_name, sizeof(reg_name), "CUR_WM_SAGV_TRANS");
else
snprintf(reg_name, sizeof(reg_name), "PLANE_WM_SAGV_TRANS_%1d", plane);
@@ -264,7 +269,7 @@ static const char *skl_buf_cfg_reg_name(int plane)
{
static char reg_name[32];
- if (plane == 0)
+ if (is_cursor(plane))
snprintf(reg_name, sizeof(reg_name), "CUR_BUF_CFG");
else
snprintf(reg_name, sizeof(reg_name), "PLANE_BUF_CFG_%1d", plane);
@@ -328,7 +333,7 @@ static void skl_wm_dump(void)
plane_ctl[pipe][plane] = read_reg(addr + 0x80);
wm_trans[pipe][plane] = read_reg(addr + 0x00168);
buf_cfg[pipe][plane] = read_reg(addr + 0x0017C);
- if (plane != 0 && intel_gen(devid) < 11)
+ if (!is_cursor(plane) && intel_gen(devid) < 11)
nv12_buf_cfg[pipe][plane] = read_reg(addr + 0x00178);
else
nv12_buf_cfg[pipe][plane] = 0;
@@ -431,7 +436,7 @@ static void skl_wm_dump(void)
if (intel_gen(devid) >= 11)
continue;
- if (plane == 0)
+ if (is_cursor(plane))
continue;
printf("%21s\t", skl_nv12_buf_cfg_reg_name(plane));
@@ -458,7 +463,7 @@ static void skl_wm_dump(void)
printf(" LEVEL");
for (plane = 0; plane < num_planes; plane++) {
- if (plane == 0)
+ if (is_cursor(plane))
enable = REG_DECODE1(plane_ctl[pipe][plane], 0, 3) ||
REG_DECODE1(plane_ctl[pipe][plane], 5, 1);
else
--
2.39.1
next prev parent reply other threads:[~2023-01-25 4:55 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-25 4:55 [igt-dev] [PATCH i-g-t 01/10] tools/intel_watermark: Add missing intel_register_access_fini() for skl+ Ville Syrjala
2023-01-25 4:55 ` [igt-dev] [PATCH i-g-t 02/10] tools/intel_watermark: Don't do intel_register_access_fini() too early on hsw/bdw Ville Syrjala
2023-02-06 8:14 ` Govindapillai, Vinod
2023-01-25 4:55 ` [igt-dev] [PATCH i-g-t 03/10] tools/intel_watermark: Add missing newline Ville Syrjala
2023-02-06 8:15 ` Govindapillai, Vinod
2023-01-25 4:55 ` [igt-dev] [PATCH i-g-t 04/10] tools/intel_watermark: Read LP usage from FPGA_DBG on ivb Ville Syrjala
2023-02-06 11:43 ` Govindapillai, Vinod
2023-01-25 4:55 ` Ville Syrjala [this message]
2023-02-06 8:37 ` [igt-dev] [PATCH i-g-t 05/10] tools/intel_watermark: Extract is_cursor() Govindapillai, Vinod
2023-01-25 4:55 ` [igt-dev] [PATCH i-g-t 06/10] tools/intel_watermark: Decode plane enable bits for ilk-bdw Ville Syrjala
2023-02-06 8:53 ` Govindapillai, Vinod
2023-01-25 4:55 ` [igt-dev] [PATCH i-g-t 07/10] tools/intel_watermark: Dump all ARB_CTL registers on skl+ Ville Syrjala
2023-02-06 11:26 ` Govindapillai, Vinod
2023-01-25 4:55 ` [igt-dev] [PATCH i-g-t 08/10] tools/intel_watermark: Use intel_display_ver() Ville Syrjala
2023-02-06 11:30 ` Govindapillai, Vinod
2023-01-25 4:55 ` [igt-dev] [PATCH i-g-t 09/10] tools/intel_watermark: Introduce skl_has_nv12_buf_cfg() Ville Syrjala
2023-02-06 11:32 ` Govindapillai, Vinod
2023-01-25 4:55 ` [igt-dev] [PATCH i-g-t 10/10] tools/intel_watermark: Decode SAGV WM usage correctly on ADL+ Ville Syrjala
2023-02-06 11:40 ` Govindapillai, Vinod
2023-01-25 6:02 ` [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,01/10] tools/intel_watermark: Add missing intel_register_access_fini() for skl+ Patchwork
2023-01-25 12:27 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
2023-02-06 8:12 ` [igt-dev] [PATCH i-g-t 01/10] " Govindapillai, Vinod
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