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* [igt-dev] [PATCH i-g-t 0/2] Integrate igt_spin_new with Xe.
@ 2023-05-22 12:36 sai.gowtham.ch
  0 siblings, 0 replies; 13+ messages in thread
From: sai.gowtham.ch @ 2023-05-22 12:36 UTC (permalink / raw)
  To: igt-dev, zbigniew.kempczynski, sai.gowtham.ch

From: Sai Gowtham Ch <sai.gowtham.ch@intel.com>

Extending the spin_create implementation and allocator handle support in xe,
where it submits dummy work loads to engine. This Implementation is wrapped
around vm_bind and unbind as we are supposed to do it manually for xe.

Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Signed-off-by: Sai Gowtham Ch <sai.gowtham.ch@intel.com>

Sai Gowtham Ch (2):
  lib/xe/xe_spin: Integrate igt_spin_new with Xe.
  tests/xe/xe_spin_batch: Add new test to exercise igt_spin_new for xe.

 lib/igt_dummyload.c      |  24 ++++++---
 lib/igt_dummyload.h      |  11 ++++
 lib/xe/xe_spin.c         |  68 +++++++++++++++++++++++
 lib/xe/xe_spin.h         |   7 +++
 tests/meson.build        |   1 +
 tests/xe/xe_spin_batch.c | 113 +++++++++++++++++++++++++++++++++++++++
 6 files changed, 218 insertions(+), 6 deletions(-)
 create mode 100644 tests/xe/xe_spin_batch.c

-- 
2.39.1

^ permalink raw reply	[flat|nested] 13+ messages in thread

* [igt-dev] [PATCH i-g-t 0/2] Integrate igt_spin_new with Xe.
@ 2023-05-25  5:55 sai.gowtham.ch
  0 siblings, 0 replies; 13+ messages in thread
From: sai.gowtham.ch @ 2023-05-25  5:55 UTC (permalink / raw)
  To: igt-dev, zbigniew.kempczynski, sai.gowtham.ch

From: Sai Gowtham Ch <sai.gowtham.ch@intel.com>

Extending the spin_create implementation and allocator handle support in xe,
where it submits dummy work loads to engine. This Implementation is wrapped
around vm_bind and unbind as we are supposed to do it manually for xe.

Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Signed-off-by: Sai Gowtham Ch <sai.gowtham.ch@intel.com>

Sai Gowtham Ch (2):
  lib/xe/xe_spin: Integrate igt_spin_new with Xe.
  tests/xe/xe_spin_batch: Add new test to exercise igt_spin_new for xe.

 lib/igt_dummyload.c      |  24 +++++--
 lib/igt_dummyload.h      |  10 +++
 lib/xe/xe_spin.c         |  89 +++++++++++++++++++++++++
 lib/xe/xe_spin.h         |   7 ++
 tests/meson.build        |   1 +
 tests/xe/xe_spin_batch.c | 138 +++++++++++++++++++++++++++++++++++++++
 6 files changed, 263 insertions(+), 6 deletions(-)
 create mode 100644 tests/xe/xe_spin_batch.c

-- 
2.39.1

^ permalink raw reply	[flat|nested] 13+ messages in thread

* [igt-dev] [PATCH i-g-t 0/2] Integrate igt_spin_new with Xe.
@ 2023-05-30 10:08 sai.gowtham.ch
  0 siblings, 0 replies; 13+ messages in thread
From: sai.gowtham.ch @ 2023-05-30 10:08 UTC (permalink / raw)
  To: igt-dev, zbigniew.kempczynski, sai.gowtham.ch

From: Sai Gowtham Ch <sai.gowtham.ch@intel.com>

Extending the spin_create implementation and allocator handle support in xe,
where it submits dummy work loads to engine. This Implementation is wrapped
around vm_bind and unbind as we are supposed to do it manually for xe.

Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Signed-off-by: Sai Gowtham Ch <sai.gowtham.ch@intel.com>

Sai Gowtham Ch (2):
  lib/xe/xe_spin: Integrate igt_spin_new with Xe.
  tests/xe/xe_spin_batch: Add new test to exercise igt_spin_new for xe.

 lib/igt_dummyload.c      |  24 ++++--
 lib/igt_dummyload.h      |  10 +++
 lib/xe/xe_spin.c         |  91 +++++++++++++++++++++
 lib/xe/xe_spin.h         |   7 ++
 tests/meson.build        |   1 +
 tests/xe/xe_spin_batch.c | 168 +++++++++++++++++++++++++++++++++++++++
 6 files changed, 295 insertions(+), 6 deletions(-)
 create mode 100644 tests/xe/xe_spin_batch.c

-- 
2.39.1

^ permalink raw reply	[flat|nested] 13+ messages in thread

* [igt-dev] [PATCH i-g-t 0/2] Integrate igt_spin_new with Xe
@ 2023-06-04 19:16 sai.gowtham.ch
  2023-06-04 19:16 ` [igt-dev] [PATCH i-g-t 1/2] lib/xe/xe_spin: " sai.gowtham.ch
                   ` (2 more replies)
  0 siblings, 3 replies; 13+ messages in thread
From: sai.gowtham.ch @ 2023-06-04 19:16 UTC (permalink / raw)
  To: igt-dev, zbigniew.kempczynski, sai.gowtham.ch, janga.rahul.kumar,
	kamil.konieczny

From: Sai Gowtham Ch <sai.gowtham.ch@intel.com>

Extending the spin_create implementation and allocator handle support in xe,
where it submits dummy work loads to engine. This Implementation is wrapped
around vm_bind and unbind as we are supposed to do it manually for xe.

Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Signed-off-by: Sai Gowtham Ch <sai.gowtham.ch@intel.com>

Sai Gowtham Ch (2):
  lib/xe/xe_spin: Integrate igt_spin_new with Xe
  tests/xe/xe_spin_batch: Add new test to exercise igt_spin_new for xe

 lib/igt_dummyload.c      |  24 ++++--
 lib/igt_dummyload.h      |  12 +++
 lib/xe/xe_spin.c         | 121 ++++++++++++++++++++++++++++
 lib/xe/xe_spin.h         |   6 +-
 tests/meson.build        |   1 +
 tests/xe/xe_spin_batch.c | 168 +++++++++++++++++++++++++++++++++++++++
 6 files changed, 325 insertions(+), 7 deletions(-)
 create mode 100644 tests/xe/xe_spin_batch.c

-- 
2.39.1

^ permalink raw reply	[flat|nested] 13+ messages in thread

* [igt-dev] [PATCH i-g-t 1/2] lib/xe/xe_spin: Integrate igt_spin_new with Xe
  2023-06-04 19:16 [igt-dev] [PATCH i-g-t 0/2] Integrate igt_spin_new with Xe sai.gowtham.ch
@ 2023-06-04 19:16 ` sai.gowtham.ch
  2023-06-04 19:59   ` Ch, Sai Gowtham
  2023-06-04 19:16 ` [igt-dev] [PATCH i-g-t 2/2] tests/xe/xe_spin_batch: Add new test to exercise igt_spin_new for xe sai.gowtham.ch
  2023-06-04 19:56 ` [igt-dev] ✗ Fi.CI.BAT: failure for Integrate igt_spin_new with Xe Patchwork
  2 siblings, 1 reply; 13+ messages in thread
From: sai.gowtham.ch @ 2023-06-04 19:16 UTC (permalink / raw)
  To: igt-dev, zbigniew.kempczynski, sai.gowtham.ch, janga.rahul.kumar,
	kamil.konieczny

From: Sai Gowtham Ch <sai.gowtham.ch@intel.com>

Extending the spin_create implementation and allocator handle support in xe,
where it submits dummy work loads to engine. This Implementation is wrapped
around vm_bind and unbind as we are supposed to do it manually for xe.

Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Janga Rahul Kumar <janga.rahul.kumar@intel.com>
Cc: Kamil Konieczny <kamil.konieczny@linux.intel.com>
Signed-off-by: Sai Gowtham Ch <sai.gowtham.ch@intel.com>
---
 lib/igt_dummyload.c |  24 ++++++---
 lib/igt_dummyload.h |  12 +++++
 lib/xe/xe_spin.c    | 121 ++++++++++++++++++++++++++++++++++++++++++++
 lib/xe/xe_spin.h    |   6 ++-
 4 files changed, 156 insertions(+), 7 deletions(-)

diff --git a/lib/igt_dummyload.c b/lib/igt_dummyload.c
index 740a58f3..6e89b72d 100644
--- a/lib/igt_dummyload.c
+++ b/lib/igt_dummyload.c
@@ -46,6 +46,7 @@
 #include "intel_reg.h"
 #include "ioctl_wrappers.h"
 #include "sw_sync.h"
+#include "xe/xe_spin.h"
 
 /**
  * SECTION:igt_dummyload
@@ -447,7 +448,10 @@ spin_create(int fd, const struct igt_spin_factory *opts)
 igt_spin_t *
 __igt_spin_factory(int fd, const struct igt_spin_factory *opts)
 {
-	return spin_create(fd, opts);
+	if (is_xe_device(fd))
+		return xe_spin_create(fd, opts);
+	else
+		return spin_create(fd, opts);
 }
 
 /**
@@ -467,6 +471,11 @@ igt_spin_factory(int fd, const struct igt_spin_factory *opts)
 {
 	igt_spin_t *spin;
 
+	if (is_xe_device(fd)) {
+		spin = xe_spin_create(fd, opts);
+		return spin;
+	}
+
 	if ((opts->flags & IGT_SPIN_POLL_RUN) && opts->engine != ALL_ENGINES) {
 		unsigned int class;
 
@@ -647,11 +656,14 @@ void igt_spin_free(int fd, igt_spin_t *spin)
 	if (!spin)
 		return;
 
-	pthread_mutex_lock(&list_lock);
-	igt_list_del(&spin->link);
-	pthread_mutex_unlock(&list_lock);
-
-	__igt_spin_free(fd, spin);
+	if (is_xe_device(fd)) {
+		xe_spin_free(fd, spin);
+	} else {
+		pthread_mutex_lock(&list_lock);
+		igt_list_del(&spin->link);
+		pthread_mutex_unlock(&list_lock);
+		__igt_spin_free(fd, spin);
+	}
 }
 
 void igt_terminate_spins(void)
diff --git a/lib/igt_dummyload.h b/lib/igt_dummyload.h
index b247ab02..c5d7b993 100644
--- a/lib/igt_dummyload.h
+++ b/lib/igt_dummyload.h
@@ -54,6 +54,8 @@ typedef struct igt_spin_factory {
 	unsigned int flags;
 	int fence;
 	uint64_t ahnd;
+	struct drm_xe_engine_class_instance *hwe;
+	uint32_t vm;
 } igt_spin_factory_t;
 
 typedef struct igt_spin {
@@ -83,6 +85,16 @@ typedef struct igt_spin {
 #define SPIN_CLFLUSH (1 << 0)
 
 	struct igt_spin_factory opts;
+
+	struct xe_spin *xe_spin;
+	size_t bo_size;
+	uint64_t address;
+	unsigned int engine;
+	uint32_t vm;
+	uint32_t syncobj;
+	bool is_user_vm;
+	bool is_user_engine;
+
 } igt_spin_t;
 
 
diff --git a/lib/xe/xe_spin.c b/lib/xe/xe_spin.c
index 856d0ba2..b1ff6fe9 100644
--- a/lib/xe/xe_spin.c
+++ b/lib/xe/xe_spin.c
@@ -82,6 +82,127 @@ void xe_spin_end(struct xe_spin *spin)
 	spin->end = 0;
 }
 
+/**
+ * xe_spin_user_vm_engine:
+ * @spin: spin state from igt_spin_new()
+ * @opt: controlling options such as allocator handle, engine, vm etc
+ *
+ * Wrapper function collects the vm and engine data from the user,
+ * if engine is not given from the user, engine will be created.
+ *
+ */
+void xe_spin_user_vm_engine(int fd, const struct igt_spin_factory *opt, struct igt_spin *spin)
+{
+	spin->vm = opt->vm;
+	spin->is_user_vm = true;
+	if (opt->engine) {
+		spin->engine = opt->engine;
+		spin->is_user_engine = true;
+	} else {
+		if (opt->hwe)
+			spin->engine = xe_engine_create(fd, spin->vm, opt->hwe, 0);
+		else
+			spin->engine = xe_engine_create_class(fd, spin->vm, DRM_XE_ENGINE_CLASS_COPY);
+
+		spin->is_user_engine = false;
+	}
+}
+
+/**
+ * xe_spin_create:
+ *@opt: controlling options such as allocator handle, engine, vmetc
+ *
+ * igt_spin_new for xe, xe_spin_create submits a batch using xe_spin_init
+ * which wraps around vm bind and unbinding the object associated to it.
+ * This returs a spinner after submitting a dummy load.
+ *
+ */
+igt_spin_t *
+xe_spin_create(int fd, const struct igt_spin_factory *opt)
+{
+	size_t bo_size = xe_get_default_alignment(fd);
+	uint64_t ahnd = opt->ahnd, addr;
+	struct igt_spin *spin;
+	struct xe_spin *xe_spin;
+	struct drm_xe_sync sync = {
+		.flags = DRM_XE_SYNC_SYNCOBJ | DRM_XE_SYNC_SIGNAL,
+	};
+	struct drm_xe_exec exec = {
+		.num_batch_buffer = 1,
+		.num_syncs = 1,
+		.syncs = to_user_pointer(&sync),
+	};
+
+	igt_assert(ahnd);
+	spin = calloc(1, sizeof(struct igt_spin));
+	igt_assert(spin);
+
+	spin->syncobj = syncobj_create(fd, 0);
+
+	if (opt->vm) {
+		xe_spin_user_vm_engine(fd, opt, spin);
+
+	} else {
+		spin->vm = xe_vm_create(fd, 0, 0);
+		if (opt->hwe)
+			spin->engine = xe_engine_create(fd, spin->vm, opt->hwe, 0);
+		else
+			spin->engine = xe_engine_create_class(fd, spin->vm, DRM_XE_ENGINE_CLASS_RENDER);
+		spin->is_user_vm = false;
+		spin->is_user_engine = false;
+	}
+
+	spin->handle = xe_bo_create(fd, 0, spin->vm, bo_size);
+	xe_spin = xe_bo_map(fd, spin->handle, bo_size);
+	addr = intel_allocator_alloc_with_strategy(ahnd, spin->handle, bo_size, 0, ALLOC_STRATEGY_LOW_TO_HIGH);
+	xe_vm_bind_sync(fd, spin->vm, spin->handle, 0, addr, bo_size);
+
+	xe_spin_init(xe_spin, addr, true);
+	exec.engine_id = spin->engine;
+	exec.address = addr;
+	sync.handle = spin->syncobj;
+	igt_assert_eq(igt_ioctl(fd, DRM_IOCTL_XE_EXEC, &exec), 0);
+	xe_spin_wait_started(xe_spin);
+
+	spin->bo_size = bo_size;
+	spin->address = addr;
+	spin->xe_spin = xe_spin;
+
+	return spin;
+}
+
+void xe_spin_sync_wait(int fd, struct igt_spin *spin)
+{
+	igt_assert(syncobj_wait(fd, &spin->syncobj, 1, INT64_MAX, 0, NULL));
+}
+
+/*
+ * xe_spin_free:
+ *@spin: spin state from igt_spin_new()
+ *
+ * Wrapper to free spinner whhich is triggered by xe_spin_create.
+ * which distroys vm, engine and unbinds the vm which is binded to
+ * the engine and bo.
+ *
+ */
+void xe_spin_free(int fd, struct igt_spin *spin)
+{
+	xe_spin_end(spin->xe_spin);
+	xe_spin_sync_wait(fd, spin);
+	xe_vm_unbind_sync(fd, spin->vm, 0, spin->address, spin->bo_size);
+	syncobj_destroy(fd, spin->syncobj);
+	gem_munmap(spin->xe_spin, spin->bo_size);
+	gem_close(fd, spin->handle);
+
+	if (!spin->is_user_vm)
+		xe_vm_destroy(fd, spin->vm);
+
+	if (!spin->is_user_engine)
+		xe_engine_destroy(fd, spin->engine);
+
+	free(spin);
+}
+
 void xe_cork_init(int fd, struct drm_xe_engine_class_instance *hwe,
 		  struct xe_cork *cork)
 {
diff --git a/lib/xe/xe_spin.h b/lib/xe/xe_spin.h
index 73f9a026..60f6e751 100644
--- a/lib/xe/xe_spin.h
+++ b/lib/xe/xe_spin.h
@@ -13,6 +13,7 @@
 #include <stdbool.h>
 
 #include "xe_query.h"
+#include "lib/igt_dummyload.h"
 
 /* Mapped GPU object */
 struct xe_spin {
@@ -21,11 +22,14 @@ struct xe_spin {
 	uint32_t start;
 	uint32_t end;
 };
-
+void xe_spin_user_vm_engine(int fd, const struct igt_spin_factory *opt, struct igt_spin *spin);
+igt_spin_t *xe_spin_create(int fd, const struct igt_spin_factory *opt);
 void xe_spin_init(struct xe_spin *spin, uint64_t addr, bool preempt);
 bool xe_spin_started(struct xe_spin *spin);
+void xe_spin_sync_wait(int fd, struct igt_spin *spin);
 void xe_spin_wait_started(struct xe_spin *spin);
 void xe_spin_end(struct xe_spin *spin);
+void xe_spin_free(int fd, struct igt_spin *spin);
 
 struct xe_cork {
 	struct xe_spin *spin;
-- 
2.39.1

^ permalink raw reply related	[flat|nested] 13+ messages in thread

* [igt-dev] [PATCH i-g-t 2/2] tests/xe/xe_spin_batch: Add new test to exercise igt_spin_new for xe
  2023-06-04 19:16 [igt-dev] [PATCH i-g-t 0/2] Integrate igt_spin_new with Xe sai.gowtham.ch
  2023-06-04 19:16 ` [igt-dev] [PATCH i-g-t 1/2] lib/xe/xe_spin: " sai.gowtham.ch
@ 2023-06-04 19:16 ` sai.gowtham.ch
  2023-06-04 19:56 ` [igt-dev] ✗ Fi.CI.BAT: failure for Integrate igt_spin_new with Xe Patchwork
  2 siblings, 0 replies; 13+ messages in thread
From: sai.gowtham.ch @ 2023-06-04 19:16 UTC (permalink / raw)
  To: igt-dev, zbigniew.kempczynski, sai.gowtham.ch, janga.rahul.kumar,
	kamil.konieczny

From: Sai Gowtham Ch <sai.gowtham.ch@intel.com>

xe_spin_batch test exercises igt_spin_new submissions with different
combinations.

Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Signed-off-by: Sai Gowtham Ch <sai.gowtham.ch@intel.com>
---
 tests/meson.build        |   1 +
 tests/xe/xe_spin_batch.c | 168 +++++++++++++++++++++++++++++++++++++++
 2 files changed, 169 insertions(+)
 create mode 100644 tests/xe/xe_spin_batch.c

diff --git a/tests/meson.build b/tests/meson.build
index f71be1db..e794b75a 100644
--- a/tests/meson.build
+++ b/tests/meson.build
@@ -268,6 +268,7 @@ xe_progs = [
 	'xe_query',
 	'xe_vm',
 	'xe_waitfence',
+	'xe_spin_batch',
 ]
 
 msm_progs = [
diff --git a/tests/xe/xe_spin_batch.c b/tests/xe/xe_spin_batch.c
new file mode 100644
index 00000000..ac531110
--- /dev/null
+++ b/tests/xe/xe_spin_batch.c
@@ -0,0 +1,168 @@
+#include "igt.h"
+#include "lib/intel_reg.h"
+#include "xe_drm.h"
+#include "xe/xe_ioctl.h"
+#include "xe/xe_query.h"
+
+#define MAX_INSTANCE 9
+
+/**
+ * TEST: Basic test for spin batch submissons.
+ *
+ * SUBTEST: spin-basic
+ * Description: Basic test to submit spin batch submissons on copy engine.
+ * Run type: FULL
+ * TODO: change ``'Run type' == FULL`` to a better category
+ *
+ */
+
+static void spin_basic(int fd)
+{
+	uint64_t ahnd;
+	igt_spin_t *spin;
+
+	ahnd = intel_allocator_open(fd, 0, INTEL_ALLOCATOR_RELOC);
+	spin = __igt_spin_new(fd, .ahnd = ahnd);
+	igt_assert(spin);
+
+	igt_spin_free(fd, spin);
+	put_ahnd(ahnd);
+}
+
+/**
+ * TEST:Test for spin batch submissons.
+ *
+ * SUBTEST: spin-batch
+ * Description: Create vm and engine of hwe class and run the spinner on it.
+ * Run type: FULL
+ * TODO: change ``'Run type' == FULL`` to a better category
+ *
+ */
+
+static void spin(int fd, struct drm_xe_engine_class_instance *hwe)
+{
+	uint64_t ahnd;
+	unsigned int engine;
+	uint32_t vm;
+	igt_spin_t *spin;
+
+	vm = xe_vm_create(fd, 0, 0);
+	engine = xe_engine_create(fd, vm, hwe, 0);
+	ahnd = intel_allocator_open(fd, 0, INTEL_ALLOCATOR_RELOC);
+
+	spin = igt_spin_new(fd, .ahnd = ahnd, .engine = engine, .vm = vm);
+	igt_assert(spin);
+
+	igt_spin_free(fd, spin);
+	xe_engine_destroy(fd, engine);
+	xe_vm_destroy(fd, vm);
+
+	put_ahnd(ahnd);
+}
+
+/**
+ * TEST: Basic test for spin batch submission on all hwe.
+ *
+ * SUBTEST: spin-basic-all
+ * Description: Basic test which validates the functionality of spinner on all hwe.
+ * Run type: FULL
+ * TODO: change ``'Run type' == FULL`` to a better category
+ *
+ */
+static void spin_basic_all(int fd, struct drm_xe_engine_class_instance *hwe)
+{
+	uint64_t ahnd;
+	igt_spin_t *spin;
+
+	ahnd = intel_allocator_open(fd, 0, INTEL_ALLOCATOR_RELOC);
+	spin = __igt_spin_new(fd, .ahnd = ahnd, .hwe = hwe);
+	igt_assert(spin);
+
+	igt_spin_free(fd, spin);
+	put_ahnd(ahnd);
+}
+
+/**
+ * TEST: Test for spin batch submissions.
+ * SUBTEST: spin-all
+ * Description: Spinner test to run on all the engines!
+ * Run type: FULL
+ * TODO: change ``'Run type' == FULL`` to a better category
+ *
+ */
+
+static void spin_all (int fd, int gt, int class)
+{
+	uint64_t ahnd;
+	uint32_t engines[MAX_INSTANCE];
+	uint32_t vm[MAX_INSTANCE];
+	int i, num_placements = 0;
+	struct drm_xe_engine_class_instance eci[MAX_INSTANCE];
+	igt_spin_t *spin[MAX_INSTANCE];
+	struct drm_xe_engine_class_instance *hwe;
+
+	ahnd = intel_allocator_open(fd, 0, INTEL_ALLOCATOR_RELOC);
+
+	xe_for_each_hw_engine(fd, hwe) {
+		if (hwe->engine_class != class || hwe->gt_id != gt)
+			continue;
+		eci[num_placements++] = *hwe;
+	}
+	if (num_placements < 2)
+		return;
+
+	for (i = 0; i < num_placements; i++) {
+		struct drm_xe_engine_create create;
+		vm[i] = xe_vm_create(fd, 0, 0);
+
+		create.vm_id = vm[i];
+		create.width = 1;
+		create.num_placements = num_placements;
+		create.instances = to_user_pointer(eci);
+
+		igt_assert_eq(igt_ioctl(fd, DRM_IOCTL_XE_ENGINE_CREATE,
+					&create), 0);
+		engines[i] = create.engine_id;
+		spin[i] = __igt_spin_new(fd, .ahnd = ahnd, .engine = engines[i], .vm = vm[i]);
+	}
+
+	for (i = 0; i < num_placements; i++) {
+		igt_assert(spin[i]);
+		igt_spin_free(fd, spin[i]);
+	}
+	put_ahnd(ahnd);
+}
+
+igt_main
+{
+	struct drm_xe_engine_class_instance *hwe;
+	int fd;
+	int gt, class;
+
+	igt_fixture {
+		fd = drm_open_driver(DRIVER_XE);
+		xe_device_get(fd);
+	}
+
+	igt_subtest("spin-basic")
+		spin_basic(fd);
+
+	igt_subtest("spin-batch")
+		xe_for_each_hw_engine(fd, hwe)
+			spin(fd, hwe);
+
+	igt_subtest("spin-basic-all")
+		xe_for_each_hw_engine(fd, hwe)
+			spin_basic_all(fd, hwe);
+
+	igt_subtest("spin-all") {
+		xe_for_each_gt(fd, gt)
+			xe_for_each_hw_engine_class(class)
+				spin_all(fd, gt, class);
+	}
+
+	igt_fixture {
+		xe_device_put(fd);
+		close(fd);
+	}
+}
-- 
2.39.1

^ permalink raw reply related	[flat|nested] 13+ messages in thread

* [igt-dev] ✗ Fi.CI.BAT: failure for Integrate igt_spin_new with Xe
  2023-06-04 19:16 [igt-dev] [PATCH i-g-t 0/2] Integrate igt_spin_new with Xe sai.gowtham.ch
  2023-06-04 19:16 ` [igt-dev] [PATCH i-g-t 1/2] lib/xe/xe_spin: " sai.gowtham.ch
  2023-06-04 19:16 ` [igt-dev] [PATCH i-g-t 2/2] tests/xe/xe_spin_batch: Add new test to exercise igt_spin_new for xe sai.gowtham.ch
@ 2023-06-04 19:56 ` Patchwork
  2 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2023-06-04 19:56 UTC (permalink / raw)
  To: sai.gowtham.ch; +Cc: igt-dev

[-- Attachment #1: Type: text/plain, Size: 5077 bytes --]

== Series Details ==

Series: Integrate igt_spin_new with Xe
URL   : https://patchwork.freedesktop.org/series/118837/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_13226 -> IGTPW_9100
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with IGTPW_9100 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_9100, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9100/index.html

Participating hosts (37 -> 35)
------------------------------

  Missing    (2): bat-rpls-2 fi-snb-2520m 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_9100:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_module_load@load:
    - bat-adlm-1:         [PASS][1] -> [ABORT][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13226/bat-adlm-1/igt@i915_module_load@load.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9100/bat-adlm-1/igt@i915_module_load@load.html

  
Known issues
------------

  Here are the changes found in IGTPW_9100 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_chamelium_hpd@common-hpd-after-suspend:
    - fi-skl-6600u:       NOTRUN -> [SKIP][3] ([fdo#109271])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9100/fi-skl-6600u/igt@kms_chamelium_hpd@common-hpd-after-suspend.html

  * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-c-dp-1:
    - bat-dg2-8:          [PASS][4] -> [FAIL][5] ([i915#7932]) +1 similar issue
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13226/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-c-dp-1.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9100/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-c-dp-1.html

  
#### Possible fixes ####

  * igt@gem_exec_suspend@basic-s3@smem:
    - {bat-mtlp-8}:       [FAIL][6] ([fdo#103375]) -> [PASS][7] +6 similar issues
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13226/bat-mtlp-8/igt@gem_exec_suspend@basic-s3@smem.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9100/bat-mtlp-8/igt@gem_exec_suspend@basic-s3@smem.html

  * igt@i915_pm_rpm@basic-pci-d3-state:
    - fi-hsw-4770:        [SKIP][8] ([fdo#109271]) -> [PASS][9]
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13226/fi-hsw-4770/igt@i915_pm_rpm@basic-pci-d3-state.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9100/fi-hsw-4770/igt@i915_pm_rpm@basic-pci-d3-state.html

  * igt@i915_pm_rpm@basic-rte:
    - fi-hsw-4770:        [FAIL][10] ([i915#7364]) -> [PASS][11]
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13226/fi-hsw-4770/igt@i915_pm_rpm@basic-rte.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9100/fi-hsw-4770/igt@i915_pm_rpm@basic-rte.html

  * igt@i915_selftest@live@execlists:
    - fi-skl-6600u:       [ABORT][12] -> [PASS][13]
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13226/fi-skl-6600u/igt@i915_selftest@live@execlists.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9100/fi-skl-6600u/igt@i915_selftest@live@execlists.html

  * igt@i915_selftest@live@slpc:
    - bat-rpls-1:         [DMESG-WARN][14] ([i915#6367]) -> [PASS][15]
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13226/bat-rpls-1/igt@i915_selftest@live@slpc.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9100/bat-rpls-1/igt@i915_selftest@live@slpc.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [i915#4423]: https://gitlab.freedesktop.org/drm/intel/issues/4423
  [i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
  [i915#7364]: https://gitlab.freedesktop.org/drm/intel/issues/7364
  [i915#7932]: https://gitlab.freedesktop.org/drm/intel/issues/7932
  [i915#8011]: https://gitlab.freedesktop.org/drm/intel/issues/8011
  [i915#8497]: https://gitlab.freedesktop.org/drm/intel/issues/8497


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_7318 -> IGTPW_9100

  CI-20190529: 20190529
  CI_DRM_13226: 29c0f369e17ba0abf08c65ca065417aebab208c6 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_9100: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9100/index.html
  IGT_7318: c2d8ef8b9397d0976959f29dc1dd7c8a698d65fe @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git


Testlist changes
----------------

+igt@xe_spin_batch@spin-all
+igt@xe_spin_batch@spin-basic
+igt@xe_spin_batch@spin-basic-all
+igt@xe_spin_batch@spin-batch

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9100/index.html

[-- Attachment #2: Type: text/html, Size: 5768 bytes --]

^ permalink raw reply	[flat|nested] 13+ messages in thread

* [igt-dev] [PATCH i-g-t 0/2] Integrate igt_spin_new with Xe
@ 2023-06-04 19:58 sai.gowtham.ch
  0 siblings, 0 replies; 13+ messages in thread
From: sai.gowtham.ch @ 2023-06-04 19:58 UTC (permalink / raw)
  To: igt-dev, zbigniew.kempczynski, sai.gowtham.ch, janga.rahul.kumar,
	kamil.konieczny

From: Sai Gowtham Ch <sai.gowtham.ch@intel.com>

Extending the spin_create implementation and allocator handle support in xe,
where it submits dummy work loads to engine. This Implementation is wrapped
around vm_bind and unbind as we are supposed to do it manually for xe.

Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Signed-off-by: Sai Gowtham Ch <sai.gowtham.ch@intel.com>

Sai Gowtham Ch (2):
  lib/xe/xe_spin: Integrate igt_spin_new with Xe
  tests/xe/xe_spin_batch: Add new test to exercise igt_spin_new for xe

 lib/igt_dummyload.c      |  24 ++++--
 lib/igt_dummyload.h      |  12 +++
 lib/xe/xe_spin.c         | 121 ++++++++++++++++++++++++++++
 lib/xe/xe_spin.h         |   6 +-
 tests/meson.build        |   1 +
 tests/xe/xe_spin_batch.c | 168 +++++++++++++++++++++++++++++++++++++++
 6 files changed, 325 insertions(+), 7 deletions(-)
 create mode 100644 tests/xe/xe_spin_batch.c

-- 
2.39.1

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [igt-dev] [PATCH i-g-t 1/2] lib/xe/xe_spin: Integrate igt_spin_new with Xe
  2023-06-04 19:16 ` [igt-dev] [PATCH i-g-t 1/2] lib/xe/xe_spin: " sai.gowtham.ch
@ 2023-06-04 19:59   ` Ch, Sai Gowtham
  0 siblings, 0 replies; 13+ messages in thread
From: Ch, Sai Gowtham @ 2023-06-04 19:59 UTC (permalink / raw)
  To: igt-dev@lists.freedesktop.org, Kempczynski, Zbigniew,
	Kumar, Janga Rahul, kamil.konieczny@linux.intel.com

Please ignore this patch it has few corrections, I've resent a patch with corrections.

> -----Original Message-----
> From: Ch, Sai Gowtham <sai.gowtham.ch@intel.com>
> Sent: Monday, June 5, 2023 12:46 AM
> To: igt-dev@lists.freedesktop.org; Kempczynski, Zbigniew
> <zbigniew.kempczynski@intel.com>; Ch, Sai Gowtham
> <sai.gowtham.ch@intel.com>; Kumar, Janga Rahul
> <janga.rahul.kumar@intel.com>; kamil.konieczny@linux.intel.com
> Subject: [PATCH i-g-t 1/2] lib/xe/xe_spin: Integrate igt_spin_new with Xe
> 
> From: Sai Gowtham Ch <sai.gowtham.ch@intel.com>
> 
> Extending the spin_create implementation and allocator handle support in xe,
> where it submits dummy work loads to engine. This Implementation is wrapped
> around vm_bind and unbind as we are supposed to do it manually for xe.
> 
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> Cc: Janga Rahul Kumar <janga.rahul.kumar@intel.com>
> Cc: Kamil Konieczny <kamil.konieczny@linux.intel.com>
> Signed-off-by: Sai Gowtham Ch <sai.gowtham.ch@intel.com>
> ---
>  lib/igt_dummyload.c |  24 ++++++---
>  lib/igt_dummyload.h |  12 +++++
>  lib/xe/xe_spin.c    | 121 ++++++++++++++++++++++++++++++++++++++++++++
>  lib/xe/xe_spin.h    |   6 ++-
>  4 files changed, 156 insertions(+), 7 deletions(-)
> 
> diff --git a/lib/igt_dummyload.c b/lib/igt_dummyload.c index
> 740a58f3..6e89b72d 100644
> --- a/lib/igt_dummyload.c
> +++ b/lib/igt_dummyload.c
> @@ -46,6 +46,7 @@
>  #include "intel_reg.h"
>  #include "ioctl_wrappers.h"
>  #include "sw_sync.h"
> +#include "xe/xe_spin.h"
> 
>  /**
>   * SECTION:igt_dummyload
> @@ -447,7 +448,10 @@ spin_create(int fd, const struct igt_spin_factory *opts)
> igt_spin_t *  __igt_spin_factory(int fd, const struct igt_spin_factory *opts)  {
> -	return spin_create(fd, opts);
> +	if (is_xe_device(fd))
> +		return xe_spin_create(fd, opts);
> +	else
> +		return spin_create(fd, opts);
>  }
> 
>  /**
> @@ -467,6 +471,11 @@ igt_spin_factory(int fd, const struct igt_spin_factory
> *opts)  {
>  	igt_spin_t *spin;
> 
> +	if (is_xe_device(fd)) {
> +		spin = xe_spin_create(fd, opts);
> +		return spin;
> +	}
> +
>  	if ((opts->flags & IGT_SPIN_POLL_RUN) && opts->engine !=
> ALL_ENGINES) {
>  		unsigned int class;
> 
> @@ -647,11 +656,14 @@ void igt_spin_free(int fd, igt_spin_t *spin)
>  	if (!spin)
>  		return;
> 
> -	pthread_mutex_lock(&list_lock);
> -	igt_list_del(&spin->link);
> -	pthread_mutex_unlock(&list_lock);
> -
> -	__igt_spin_free(fd, spin);
> +	if (is_xe_device(fd)) {
> +		xe_spin_free(fd, spin);
> +	} else {
> +		pthread_mutex_lock(&list_lock);
> +		igt_list_del(&spin->link);
> +		pthread_mutex_unlock(&list_lock);
> +		__igt_spin_free(fd, spin);
> +	}
>  }
> 
>  void igt_terminate_spins(void)
> diff --git a/lib/igt_dummyload.h b/lib/igt_dummyload.h index
> b247ab02..c5d7b993 100644
> --- a/lib/igt_dummyload.h
> +++ b/lib/igt_dummyload.h
> @@ -54,6 +54,8 @@ typedef struct igt_spin_factory {
>  	unsigned int flags;
>  	int fence;
>  	uint64_t ahnd;
> +	struct drm_xe_engine_class_instance *hwe;
> +	uint32_t vm;
>  } igt_spin_factory_t;
> 
>  typedef struct igt_spin {
> @@ -83,6 +85,16 @@ typedef struct igt_spin {  #define SPIN_CLFLUSH (1 << 0)
> 
>  	struct igt_spin_factory opts;
> +
> +	struct xe_spin *xe_spin;
> +	size_t bo_size;
> +	uint64_t address;
> +	unsigned int engine;
> +	uint32_t vm;
> +	uint32_t syncobj;
> +	bool is_user_vm;
> +	bool is_user_engine;
> +
>  } igt_spin_t;
> 
> 
> diff --git a/lib/xe/xe_spin.c b/lib/xe/xe_spin.c index 856d0ba2..b1ff6fe9 100644
> --- a/lib/xe/xe_spin.c
> +++ b/lib/xe/xe_spin.c
> @@ -82,6 +82,127 @@ void xe_spin_end(struct xe_spin *spin)
>  	spin->end = 0;
>  }
> 
> +/**
> + * xe_spin_user_vm_engine:
> + * @spin: spin state from igt_spin_new()
> + * @opt: controlling options such as allocator handle, engine, vm etc
> + *
> + * Wrapper function collects the vm and engine data from the user,
> + * if engine is not given from the user, engine will be created.
> + *
> + */
> +void xe_spin_user_vm_engine(int fd, const struct igt_spin_factory *opt,
> +struct igt_spin *spin) {
> +	spin->vm = opt->vm;
> +	spin->is_user_vm = true;
> +	if (opt->engine) {
> +		spin->engine = opt->engine;
> +		spin->is_user_engine = true;
> +	} else {
> +		if (opt->hwe)
> +			spin->engine = xe_engine_create(fd, spin->vm, opt-
> >hwe, 0);
> +		else
> +			spin->engine = xe_engine_create_class(fd, spin->vm,
> +DRM_XE_ENGINE_CLASS_COPY);
> +
> +		spin->is_user_engine = false;
> +	}
> +}
> +
> +/**
> + * xe_spin_create:
> + *@opt: controlling options such as allocator handle, engine, vmetc
> + *
> + * igt_spin_new for xe, xe_spin_create submits a batch using
> +xe_spin_init
> + * which wraps around vm bind and unbinding the object associated to it.
> + * This returs a spinner after submitting a dummy load.
> + *
> + */
> +igt_spin_t *
> +xe_spin_create(int fd, const struct igt_spin_factory *opt) {
> +	size_t bo_size = xe_get_default_alignment(fd);
> +	uint64_t ahnd = opt->ahnd, addr;
> +	struct igt_spin *spin;
> +	struct xe_spin *xe_spin;
> +	struct drm_xe_sync sync = {
> +		.flags = DRM_XE_SYNC_SYNCOBJ | DRM_XE_SYNC_SIGNAL,
> +	};
> +	struct drm_xe_exec exec = {
> +		.num_batch_buffer = 1,
> +		.num_syncs = 1,
> +		.syncs = to_user_pointer(&sync),
> +	};
> +
> +	igt_assert(ahnd);
> +	spin = calloc(1, sizeof(struct igt_spin));
> +	igt_assert(spin);
> +
> +	spin->syncobj = syncobj_create(fd, 0);
> +
> +	if (opt->vm) {
> +		xe_spin_user_vm_engine(fd, opt, spin);
> +
> +	} else {
> +		spin->vm = xe_vm_create(fd, 0, 0);
> +		if (opt->hwe)
> +			spin->engine = xe_engine_create(fd, spin->vm, opt-
> >hwe, 0);
> +		else
> +			spin->engine = xe_engine_create_class(fd, spin->vm,
> DRM_XE_ENGINE_CLASS_RENDER);
> +		spin->is_user_vm = false;
> +		spin->is_user_engine = false;
> +	}
> +
> +	spin->handle = xe_bo_create(fd, 0, spin->vm, bo_size);
> +	xe_spin = xe_bo_map(fd, spin->handle, bo_size);
> +	addr = intel_allocator_alloc_with_strategy(ahnd, spin->handle, bo_size,
> 0, ALLOC_STRATEGY_LOW_TO_HIGH);
> +	xe_vm_bind_sync(fd, spin->vm, spin->handle, 0, addr, bo_size);
> +
> +	xe_spin_init(xe_spin, addr, true);
> +	exec.engine_id = spin->engine;
> +	exec.address = addr;
> +	sync.handle = spin->syncobj;
> +	igt_assert_eq(igt_ioctl(fd, DRM_IOCTL_XE_EXEC, &exec), 0);
> +	xe_spin_wait_started(xe_spin);
> +
> +	spin->bo_size = bo_size;
> +	spin->address = addr;
> +	spin->xe_spin = xe_spin;
> +
> +	return spin;
> +}
> +
> +void xe_spin_sync_wait(int fd, struct igt_spin *spin) {
> +	igt_assert(syncobj_wait(fd, &spin->syncobj, 1, INT64_MAX, 0, NULL)); }
> +
> +/*
> + * xe_spin_free:
> + *@spin: spin state from igt_spin_new()
> + *
> + * Wrapper to free spinner whhich is triggered by xe_spin_create.
> + * which distroys vm, engine and unbinds the vm which is binded to
> + * the engine and bo.
> + *
> + */
> +void xe_spin_free(int fd, struct igt_spin *spin) {
> +	xe_spin_end(spin->xe_spin);
> +	xe_spin_sync_wait(fd, spin);
> +	xe_vm_unbind_sync(fd, spin->vm, 0, spin->address, spin->bo_size);
> +	syncobj_destroy(fd, spin->syncobj);
> +	gem_munmap(spin->xe_spin, spin->bo_size);
> +	gem_close(fd, spin->handle);
> +
> +	if (!spin->is_user_vm)
> +		xe_vm_destroy(fd, spin->vm);
> +
> +	if (!spin->is_user_engine)
> +		xe_engine_destroy(fd, spin->engine);
> +
> +	free(spin);
> +}
> +
>  void xe_cork_init(int fd, struct drm_xe_engine_class_instance *hwe,
>  		  struct xe_cork *cork)
>  {
> diff --git a/lib/xe/xe_spin.h b/lib/xe/xe_spin.h index 73f9a026..60f6e751 100644
> --- a/lib/xe/xe_spin.h
> +++ b/lib/xe/xe_spin.h
> @@ -13,6 +13,7 @@
>  #include <stdbool.h>
> 
>  #include "xe_query.h"
> +#include "lib/igt_dummyload.h"
> 
>  /* Mapped GPU object */
>  struct xe_spin {
> @@ -21,11 +22,14 @@ struct xe_spin {
>  	uint32_t start;
>  	uint32_t end;
>  };
> -
> +void xe_spin_user_vm_engine(int fd, const struct igt_spin_factory *opt,
> +struct igt_spin *spin); igt_spin_t *xe_spin_create(int fd, const struct
> +igt_spin_factory *opt);
>  void xe_spin_init(struct xe_spin *spin, uint64_t addr, bool preempt);  bool
> xe_spin_started(struct xe_spin *spin);
> +void xe_spin_sync_wait(int fd, struct igt_spin *spin);
>  void xe_spin_wait_started(struct xe_spin *spin);  void xe_spin_end(struct
> xe_spin *spin);
> +void xe_spin_free(int fd, struct igt_spin *spin);
> 
>  struct xe_cork {
>  	struct xe_spin *spin;
> --
> 2.39.1


^ permalink raw reply	[flat|nested] 13+ messages in thread

* [igt-dev] [PATCH i-g-t 0/2] Integrate igt_spin_new with Xe
@ 2023-06-06  8:50 sai.gowtham.ch
  0 siblings, 0 replies; 13+ messages in thread
From: sai.gowtham.ch @ 2023-06-06  8:50 UTC (permalink / raw)
  To: igt-dev, zbigniew.kempczynski, sai.gowtham.ch

From: Sai Gowtham Ch <sai.gowtham.ch@intel.com>

Extending the spin_create implementation and allocator handle support in xe,
where it submits dummy work loads to engine. This Implementation is wrapped
around vm_bind and unbind as we are supposed to do it manually for xe.

Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Signed-off-by: Sai Gowtham Ch <sai.gowtham.ch@intel.com>

Sai Gowtham Ch (2):
  lib/xe/xe_spin: Integrate igt_spin_new with Xe
  tests/xe/xe_spin_batch: Add new test to exercise igt_spin_new for xe

 lib/igt_dummyload.c      |  38 +++++++--
 lib/igt_dummyload.h      |  11 +++
 lib/xe/xe_spin.c         |  97 ++++++++++++++++++++++
 lib/xe/xe_spin.h         |   6 +-
 tests/meson.build        |   1 +
 tests/xe/xe_spin_batch.c | 168 +++++++++++++++++++++++++++++++++++++++
 6 files changed, 315 insertions(+), 6 deletions(-)
 create mode 100644 tests/xe/xe_spin_batch.c

-- 
2.39.1

^ permalink raw reply	[flat|nested] 13+ messages in thread

* [igt-dev] [PATCH i-g-t 0/2] Integrate igt_spin_new with Xe
@ 2023-06-12  8:59 sai.gowtham.ch
  0 siblings, 0 replies; 13+ messages in thread
From: sai.gowtham.ch @ 2023-06-12  8:59 UTC (permalink / raw)
  To: igt-dev, zbigniew.kempczynski, sai.gowtham.ch

From: Sai Gowtham Ch <sai.gowtham.ch@intel.com>

Extending the spin_create implementation and allocator handle support in xe,
where it submits dummy work loads to engine. This Implementation is wrapped
around vm_bind and unbind as we are supposed to do it manually for xe.

Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Signed-off-by: Sai Gowtham Ch <sai.gowtham.ch@intel.com>

Sai Gowtham Ch (2):
  lib/xe/xe_spin: Integrate igt_spin_new with Xe
  tests/xe/xe_spin_batch: Add new test to exercise igt_spin_new for xe

 lib/igt_dummyload.c      |  38 +++++++--
 lib/igt_dummyload.h      |  11 +++
 lib/xe/xe_spin.c         |  96 +++++++++++++++++++++
 lib/xe/xe_spin.h         |   6 +-
 tests/meson.build        |   1 +
 tests/xe/xe_spin_batch.c | 180 +++++++++++++++++++++++++++++++++++++++
 6 files changed, 326 insertions(+), 6 deletions(-)
 create mode 100644 tests/xe/xe_spin_batch.c

-- 
2.39.1

^ permalink raw reply	[flat|nested] 13+ messages in thread

* [igt-dev] [PATCH i-g-t 0/2] Integrate igt_spin_new with Xe
@ 2023-06-13 12:42 sai.gowtham.ch
  0 siblings, 0 replies; 13+ messages in thread
From: sai.gowtham.ch @ 2023-06-13 12:42 UTC (permalink / raw)
  To: igt-dev, zbigniew.kempczynski, sai.gowtham.ch

From: Sai Gowtham Ch <sai.gowtham.ch@intel.com>

Extending the spin_create implementation and allocator handle support in xe,
where it submits dummy work loads to engine. This Implementation is wrapped
around vm_bind and unbind as we are supposed to do it manually for xe.

Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Signed-off-by: Sai Gowtham Ch <sai.gowtham.ch@intel.com>

Sai Gowtham Ch (2):
  lib/xe/xe_spin: Integrate igt_spin_new with Xe
  tests/xe/xe_spin_batch: Add new test to exercise igt_spin_new for xe

 lib/igt_dummyload.c      |  38 ++++++--
 lib/igt_dummyload.h      |  11 +++
 lib/xe/xe_spin.c         |  96 +++++++++++++++++++++
 lib/xe/xe_spin.h         |   6 +-
 tests/meson.build        |   1 +
 tests/xe/xe_spin_batch.c | 182 +++++++++++++++++++++++++++++++++++++++
 6 files changed, 328 insertions(+), 6 deletions(-)
 create mode 100644 tests/xe/xe_spin_batch.c

-- 
2.39.1

^ permalink raw reply	[flat|nested] 13+ messages in thread

* [igt-dev] [PATCH i-g-t 0/2] Integrate igt_spin_new with Xe
@ 2023-06-15 10:59 sai.gowtham.ch
  0 siblings, 0 replies; 13+ messages in thread
From: sai.gowtham.ch @ 2023-06-15 10:59 UTC (permalink / raw)
  To: igt-dev, zbigniew.kempczynski, sai.gowtham.ch

From: Sai Gowtham Ch <sai.gowtham.ch@intel.com>

Extending the spin_create implementation and allocator handle support in xe,
where it submits dummy work loads to engine. This Implementation is wrapped
around vm_bind and unbind as we are supposed to do it manually for xe.

Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Signed-off-by: Sai Gowtham Ch <sai.gowtham.ch@intel.com>

Sai Gowtham Ch (2):
  lib/xe/xe_spin: Integrate igt_spin_new with Xe
  tests/xe/xe_spin_batch: Add new test to exercise igt_spin_new for xe

 lib/igt_dummyload.c      |  40 +++++++--
 lib/igt_dummyload.h      |  12 +++
 lib/xe/xe_spin.c         |  97 +++++++++++++++++++++
 lib/xe/xe_spin.h         |   5 +-
 tests/meson.build        |   1 +
 tests/xe/xe_spin_batch.c | 179 +++++++++++++++++++++++++++++++++++++++
 6 files changed, 328 insertions(+), 6 deletions(-)
 create mode 100644 tests/xe/xe_spin_batch.c

-- 
2.39.1

^ permalink raw reply	[flat|nested] 13+ messages in thread

end of thread, other threads:[~2023-06-15 11:00 UTC | newest]

Thread overview: 13+ messages (download: mbox.gz follow: Atom feed
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2023-06-04 19:16 [igt-dev] [PATCH i-g-t 0/2] Integrate igt_spin_new with Xe sai.gowtham.ch
2023-06-04 19:16 ` [igt-dev] [PATCH i-g-t 1/2] lib/xe/xe_spin: " sai.gowtham.ch
2023-06-04 19:59   ` Ch, Sai Gowtham
2023-06-04 19:16 ` [igt-dev] [PATCH i-g-t 2/2] tests/xe/xe_spin_batch: Add new test to exercise igt_spin_new for xe sai.gowtham.ch
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2023-06-06  8:50 sai.gowtham.ch
2023-06-04 19:58 sai.gowtham.ch
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