* [igt-dev] [PATCH i-g-t 0/2] Integrate igt_spin_new with Xe
@ 2023-06-13 12:42 sai.gowtham.ch
2023-06-13 12:42 ` [igt-dev] [PATCH i-g-t 1/2] lib/xe/xe_spin: " sai.gowtham.ch
` (3 more replies)
0 siblings, 4 replies; 15+ messages in thread
From: sai.gowtham.ch @ 2023-06-13 12:42 UTC (permalink / raw)
To: igt-dev, zbigniew.kempczynski, sai.gowtham.ch
From: Sai Gowtham Ch <sai.gowtham.ch@intel.com>
Extending the spin_create implementation and allocator handle support in xe,
where it submits dummy work loads to engine. This Implementation is wrapped
around vm_bind and unbind as we are supposed to do it manually for xe.
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Signed-off-by: Sai Gowtham Ch <sai.gowtham.ch@intel.com>
Sai Gowtham Ch (2):
lib/xe/xe_spin: Integrate igt_spin_new with Xe
tests/xe/xe_spin_batch: Add new test to exercise igt_spin_new for xe
lib/igt_dummyload.c | 38 ++++++--
lib/igt_dummyload.h | 11 +++
lib/xe/xe_spin.c | 96 +++++++++++++++++++++
lib/xe/xe_spin.h | 6 +-
tests/meson.build | 1 +
tests/xe/xe_spin_batch.c | 182 +++++++++++++++++++++++++++++++++++++++
6 files changed, 328 insertions(+), 6 deletions(-)
create mode 100644 tests/xe/xe_spin_batch.c
--
2.39.1
^ permalink raw reply [flat|nested] 15+ messages in thread* [igt-dev] [PATCH i-g-t 1/2] lib/xe/xe_spin: Integrate igt_spin_new with Xe 2023-06-13 12:42 [igt-dev] [PATCH i-g-t 0/2] Integrate igt_spin_new with Xe sai.gowtham.ch @ 2023-06-13 12:42 ` sai.gowtham.ch 2023-06-14 17:33 ` Zbigniew Kempczyński 2023-06-13 12:42 ` [igt-dev] [PATCH i-g-t 2/2] tests/xe/xe_spin_batch: Add new test to exercise igt_spin_new for xe sai.gowtham.ch ` (2 subsequent siblings) 3 siblings, 1 reply; 15+ messages in thread From: sai.gowtham.ch @ 2023-06-13 12:42 UTC (permalink / raw) To: igt-dev, zbigniew.kempczynski, sai.gowtham.ch From: Sai Gowtham Ch <sai.gowtham.ch@intel.com> Extending the spin_create implementation and allocator handle support in xe, where it submits dummy work loads to engine. This Implementation is wrapped around vm_bind and unbind as we are supposed to do it manually for xe. Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Signed-off-by: Sai Gowtham Ch <sai.gowtham.ch@intel.com> --- lib/igt_dummyload.c | 38 +++++++++++++++--- lib/igt_dummyload.h | 11 ++++++ lib/xe/xe_spin.c | 96 +++++++++++++++++++++++++++++++++++++++++++++ lib/xe/xe_spin.h | 6 ++- 4 files changed, 145 insertions(+), 6 deletions(-) diff --git a/lib/igt_dummyload.c b/lib/igt_dummyload.c index 740a58f3..2b2f2141 100644 --- a/lib/igt_dummyload.c +++ b/lib/igt_dummyload.c @@ -46,6 +46,7 @@ #include "intel_reg.h" #include "ioctl_wrappers.h" #include "sw_sync.h" +#include "xe/xe_spin.h" /** * SECTION:igt_dummyload @@ -447,7 +448,18 @@ spin_create(int fd, const struct igt_spin_factory *opts) igt_spin_t * __igt_spin_factory(int fd, const struct igt_spin_factory *opts) { - return spin_create(fd, opts); + if (is_xe_device(fd)) { + igt_spin_t *spin; + + spin = xe_spin_create(fd, opts); + + pthread_mutex_lock(&list_lock); + igt_list_add(&spin->link, &spin_list); + pthread_mutex_unlock(&list_lock); + + return spin; + } else + return spin_create(fd, opts); } /** @@ -467,6 +479,16 @@ igt_spin_factory(int fd, const struct igt_spin_factory *opts) { igt_spin_t *spin; + if (is_xe_device(fd)) { + spin = xe_spin_create(fd, opts); + + pthread_mutex_lock(&list_lock); + igt_list_add(&spin->link, &spin_list); + pthread_mutex_unlock(&list_lock); + + return spin; + } + if ((opts->flags & IGT_SPIN_POLL_RUN) && opts->engine != ALL_ENGINES) { unsigned int class; @@ -597,8 +619,12 @@ void igt_spin_end(igt_spin_t *spin) if (!spin) return; - igt_gettime(&spin->last_signal); - sync_write(spin, MI_BATCH_BUFFER_END); + if ((spin->driver == DRIVER_XE)) { + xe_spin_end(spin->xe_spin); + } else { + igt_gettime(&spin->last_signal); + sync_write(spin, MI_BATCH_BUFFER_END); + } } static void __igt_spin_free(int fd, igt_spin_t *spin) @@ -646,12 +672,14 @@ void igt_spin_free(int fd, igt_spin_t *spin) { if (!spin) return; - pthread_mutex_lock(&list_lock); igt_list_del(&spin->link); pthread_mutex_unlock(&list_lock); - __igt_spin_free(fd, spin); + if (is_xe_device(fd)) + xe_spin_free(fd, spin); + else + __igt_spin_free(fd, spin); } void igt_terminate_spins(void) diff --git a/lib/igt_dummyload.h b/lib/igt_dummyload.h index b247ab02..ebed19bb 100644 --- a/lib/igt_dummyload.h +++ b/lib/igt_dummyload.h @@ -54,6 +54,8 @@ typedef struct igt_spin_factory { unsigned int flags; int fence; uint64_t ahnd; + struct drm_xe_engine_class_instance *hwe; + uint32_t vm; } igt_spin_factory_t; typedef struct igt_spin { @@ -83,6 +85,15 @@ typedef struct igt_spin { #define SPIN_CLFLUSH (1 << 0) struct igt_spin_factory opts; + + struct xe_spin *xe_spin; + int driver; + size_t bo_size; + uint64_t address; + unsigned int engine; + uint32_t vm; + uint32_t syncobj; + } igt_spin_t; diff --git a/lib/xe/xe_spin.c b/lib/xe/xe_spin.c index 856d0ba2..b375463a 100644 --- a/lib/xe/xe_spin.c +++ b/lib/xe/xe_spin.c @@ -82,6 +82,102 @@ void xe_spin_end(struct xe_spin *spin) spin->end = 0; } +/** + * xe_spin_create: + *@opt: controlling options such as allocator handle, engine, vmetc + * + * igt_spin_new for xe, xe_spin_create submits a batch using xe_spin_init + * which wraps around vm bind and unbinding the object associated to it. + * This returs a spinner after submitting a dummy load. + * + */ +igt_spin_t * +xe_spin_create(int fd, const struct igt_spin_factory *opt) +{ + size_t bo_size = xe_get_default_alignment(fd); + uint64_t ahnd = opt->ahnd, addr; + struct igt_spin *spin; + struct xe_spin *xe_spin; + struct drm_xe_sync sync = { + .flags = DRM_XE_SYNC_SYNCOBJ | DRM_XE_SYNC_SIGNAL, + }; + struct drm_xe_exec exec = { + .num_batch_buffer = 1, + .num_syncs = 1, + .syncs = to_user_pointer(&sync), + }; + + igt_assert(ahnd); + spin = calloc(1, sizeof(struct igt_spin)); + igt_assert(spin); + + spin->driver = DRIVER_XE; + spin->syncobj = syncobj_create(fd, 0); + spin->vm = opt->vm; + spin->engine = opt->engine; + + if (!spin->vm) + spin->vm = xe_vm_create(fd, 0, 0); + + if (!spin->engine) { + if (opt->hwe) + spin->engine = xe_engine_create(fd, spin->vm, opt->hwe, 0); + else + spin->engine = xe_engine_create_class(fd, spin->vm, DRM_XE_ENGINE_CLASS_COPY); + } + + spin->handle = xe_bo_create(fd, 0, spin->vm, bo_size); + xe_spin = xe_bo_map(fd, spin->handle, bo_size); + addr = intel_allocator_alloc_with_strategy(ahnd, spin->handle, bo_size, 0, ALLOC_STRATEGY_LOW_TO_HIGH); + xe_vm_bind_sync(fd, spin->vm, spin->handle, 0, addr, bo_size); + + xe_spin_init(xe_spin, addr, true); + exec.engine_id = spin->engine; + exec.address = addr; + sync.handle = spin->syncobj; + igt_assert_eq(igt_ioctl(fd, DRM_IOCTL_XE_EXEC, &exec), 0); + xe_spin_wait_started(xe_spin); + + spin->bo_size = bo_size; + spin->address = addr; + spin->xe_spin = xe_spin; + spin->opts = *opt; + + return spin; +} + +void xe_spin_sync_wait(int fd, struct igt_spin *spin) +{ + igt_assert(syncobj_wait(fd, &spin->syncobj, 1, INT64_MAX, 0, NULL)); +} + +/* + * xe_spin_free: + *@spin: spin state from igt_spin_new() + * + * Wrapper to free spinner whhich is triggered by xe_spin_create. + * which distroys vm, engine and unbinds the vm which is binded to + * the engine and bo. + * + */ +void xe_spin_free(int fd, struct igt_spin *spin) +{ + xe_spin_end(spin->xe_spin); + xe_spin_sync_wait(fd, spin); + xe_vm_unbind_sync(fd, spin->vm, 0, spin->address, spin->bo_size); + syncobj_destroy(fd, spin->syncobj); + gem_munmap(spin->xe_spin, spin->bo_size); + gem_close(fd, spin->handle); + + if (!spin->opts.engine) + xe_engine_destroy(fd, spin->engine); + + if (!spin->opts.vm) + xe_vm_destroy(fd, spin->vm); + + free(spin); +} + void xe_cork_init(int fd, struct drm_xe_engine_class_instance *hwe, struct xe_cork *cork) { diff --git a/lib/xe/xe_spin.h b/lib/xe/xe_spin.h index 73f9a026..60f6e751 100644 --- a/lib/xe/xe_spin.h +++ b/lib/xe/xe_spin.h @@ -13,6 +13,7 @@ #include <stdbool.h> #include "xe_query.h" +#include "lib/igt_dummyload.h" /* Mapped GPU object */ struct xe_spin { @@ -21,11 +22,14 @@ struct xe_spin { uint32_t start; uint32_t end; }; - +void xe_spin_user_vm_engine(int fd, const struct igt_spin_factory *opt, struct igt_spin *spin); +igt_spin_t *xe_spin_create(int fd, const struct igt_spin_factory *opt); void xe_spin_init(struct xe_spin *spin, uint64_t addr, bool preempt); bool xe_spin_started(struct xe_spin *spin); +void xe_spin_sync_wait(int fd, struct igt_spin *spin); void xe_spin_wait_started(struct xe_spin *spin); void xe_spin_end(struct xe_spin *spin); +void xe_spin_free(int fd, struct igt_spin *spin); struct xe_cork { struct xe_spin *spin; -- 2.39.1 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 1/2] lib/xe/xe_spin: Integrate igt_spin_new with Xe 2023-06-13 12:42 ` [igt-dev] [PATCH i-g-t 1/2] lib/xe/xe_spin: " sai.gowtham.ch @ 2023-06-14 17:33 ` Zbigniew Kempczyński 0 siblings, 0 replies; 15+ messages in thread From: Zbigniew Kempczyński @ 2023-06-14 17:33 UTC (permalink / raw) To: sai.gowtham.ch; +Cc: igt-dev On Tue, Jun 13, 2023 at 06:12:46PM +0530, sai.gowtham.ch@intel.com wrote: > From: Sai Gowtham Ch <sai.gowtham.ch@intel.com> > > Extending the spin_create implementation and allocator handle support in xe, > where it submits dummy work loads to engine. This Implementation is wrapped > around vm_bind and unbind as we are supposed to do it manually for xe. > > Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> > Signed-off-by: Sai Gowtham Ch <sai.gowtham.ch@intel.com> > --- > lib/igt_dummyload.c | 38 +++++++++++++++--- > lib/igt_dummyload.h | 11 ++++++ > lib/xe/xe_spin.c | 96 +++++++++++++++++++++++++++++++++++++++++++++ > lib/xe/xe_spin.h | 6 ++- > 4 files changed, 145 insertions(+), 6 deletions(-) > > diff --git a/lib/igt_dummyload.c b/lib/igt_dummyload.c > index 740a58f3..2b2f2141 100644 > --- a/lib/igt_dummyload.c > +++ b/lib/igt_dummyload.c > @@ -46,6 +46,7 @@ > #include "intel_reg.h" > #include "ioctl_wrappers.h" > #include "sw_sync.h" > +#include "xe/xe_spin.h" > > /** > * SECTION:igt_dummyload > @@ -447,7 +448,18 @@ spin_create(int fd, const struct igt_spin_factory *opts) > igt_spin_t * > __igt_spin_factory(int fd, const struct igt_spin_factory *opts) > { > - return spin_create(fd, opts); > + if (is_xe_device(fd)) { > + igt_spin_t *spin; > + > + spin = xe_spin_create(fd, opts); > + > + pthread_mutex_lock(&list_lock); > + igt_list_add(&spin->link, &spin_list); > + pthread_mutex_unlock(&list_lock); > + > + return spin; > + } else Use { and } if one of the if/else block has more than single line: else { > + return spin_create(fd, opts); } > } > > /** > @@ -467,6 +479,16 @@ igt_spin_factory(int fd, const struct igt_spin_factory *opts) > { > igt_spin_t *spin; > > + if (is_xe_device(fd)) { > + spin = xe_spin_create(fd, opts); > + > + pthread_mutex_lock(&list_lock); > + igt_list_add(&spin->link, &spin_list); > + pthread_mutex_unlock(&list_lock); > + > + return spin; > + } > + > if ((opts->flags & IGT_SPIN_POLL_RUN) && opts->engine != ALL_ENGINES) { > unsigned int class; > > @@ -597,8 +619,12 @@ void igt_spin_end(igt_spin_t *spin) > if (!spin) > return; > > - igt_gettime(&spin->last_signal); > - sync_write(spin, MI_BATCH_BUFFER_END); > + if ((spin->driver == DRIVER_XE)) { You don't need double parentheses. Apart of that I wanted to use enum intel_driver defined in drmtest.h to have sth like this: if (spin->driver == INTEL_DRIVER_XE) ... > + xe_spin_end(spin->xe_spin); > + } else { > + igt_gettime(&spin->last_signal); > + sync_write(spin, MI_BATCH_BUFFER_END); > + } > } > > static void __igt_spin_free(int fd, igt_spin_t *spin) > @@ -646,12 +672,14 @@ void igt_spin_free(int fd, igt_spin_t *spin) > { > if (!spin) > return; > - > pthread_mutex_lock(&list_lock); > igt_list_del(&spin->link); > pthread_mutex_unlock(&list_lock); > > - __igt_spin_free(fd, spin); > + if (is_xe_device(fd)) Use if (spin->driver == INTEL_DRIVER_XE) instead > + xe_spin_free(fd, spin); > + else > + __igt_spin_free(fd, spin); > } > > void igt_terminate_spins(void) > diff --git a/lib/igt_dummyload.h b/lib/igt_dummyload.h > index b247ab02..ebed19bb 100644 > --- a/lib/igt_dummyload.h > +++ b/lib/igt_dummyload.h > @@ -54,6 +54,8 @@ typedef struct igt_spin_factory { > unsigned int flags; > int fence; > uint64_t ahnd; > + struct drm_xe_engine_class_instance *hwe; > + uint32_t vm; > } igt_spin_factory_t; > > typedef struct igt_spin { > @@ -83,6 +85,15 @@ typedef struct igt_spin { > #define SPIN_CLFLUSH (1 << 0) > > struct igt_spin_factory opts; > + > + struct xe_spin *xe_spin; > + int driver; Use enum intel_driver instead. You need to include drmtest.h to achieve this. > + size_t bo_size; > + uint64_t address; > + unsigned int engine; > + uint32_t vm; > + uint32_t syncobj; > + > } igt_spin_t; > > > diff --git a/lib/xe/xe_spin.c b/lib/xe/xe_spin.c > index 856d0ba2..b375463a 100644 > --- a/lib/xe/xe_spin.c > +++ b/lib/xe/xe_spin.c > @@ -82,6 +82,102 @@ void xe_spin_end(struct xe_spin *spin) > spin->end = 0; > } > > +/** > + * xe_spin_create: > + *@opt: controlling options such as allocator handle, engine, vmetc s/vmetc/vm etc/ > + * > + * igt_spin_new for xe, xe_spin_create submits a batch using xe_spin_init > + * which wraps around vm bind and unbinding the object associated to it. > + * This returs a spinner after submitting a dummy load. > + * > + */ > +igt_spin_t * > +xe_spin_create(int fd, const struct igt_spin_factory *opt) > +{ > + size_t bo_size = xe_get_default_alignment(fd); > + uint64_t ahnd = opt->ahnd, addr; > + struct igt_spin *spin; > + struct xe_spin *xe_spin; > + struct drm_xe_sync sync = { > + .flags = DRM_XE_SYNC_SYNCOBJ | DRM_XE_SYNC_SIGNAL, > + }; > + struct drm_xe_exec exec = { > + .num_batch_buffer = 1, > + .num_syncs = 1, > + .syncs = to_user_pointer(&sync), > + }; > + > + igt_assert(ahnd); > + spin = calloc(1, sizeof(struct igt_spin)); > + igt_assert(spin); > + > + spin->driver = DRIVER_XE; I wanted to use directly enum intel_driver here to have: spin->driver = INTEL_DRIVER_XE; You should add appropriate initialization in i915 code to be consistent with all driver codepaths. > + spin->syncobj = syncobj_create(fd, 0); > + spin->vm = opt->vm; > + spin->engine = opt->engine; > + > + if (!spin->vm) > + spin->vm = xe_vm_create(fd, 0, 0); > + > + if (!spin->engine) { > + if (opt->hwe) > + spin->engine = xe_engine_create(fd, spin->vm, opt->hwe, 0); > + else > + spin->engine = xe_engine_create_class(fd, spin->vm, DRM_XE_ENGINE_CLASS_COPY); > + } > + > + spin->handle = xe_bo_create(fd, 0, spin->vm, bo_size); > + xe_spin = xe_bo_map(fd, spin->handle, bo_size); > + addr = intel_allocator_alloc_with_strategy(ahnd, spin->handle, bo_size, 0, ALLOC_STRATEGY_LOW_TO_HIGH); > + xe_vm_bind_sync(fd, spin->vm, spin->handle, 0, addr, bo_size); > + > + xe_spin_init(xe_spin, addr, true); > + exec.engine_id = spin->engine; > + exec.address = addr; > + sync.handle = spin->syncobj; > + igt_assert_eq(igt_ioctl(fd, DRM_IOCTL_XE_EXEC, &exec), 0); > + xe_spin_wait_started(xe_spin); > + > + spin->bo_size = bo_size; > + spin->address = addr; > + spin->xe_spin = xe_spin; > + spin->opts = *opt; > + > + return spin; > +} > + > +void xe_spin_sync_wait(int fd, struct igt_spin *spin) > +{ > + igt_assert(syncobj_wait(fd, &spin->syncobj, 1, INT64_MAX, 0, NULL)); > +} > + > +/* > + * xe_spin_free: > + *@spin: spin state from igt_spin_new() > + * > + * Wrapper to free spinner whhich is triggered by xe_spin_create. > + * which distroys vm, engine and unbinds the vm which is binded to > + * the engine and bo. > + * > + */ > +void xe_spin_free(int fd, struct igt_spin *spin) > +{ I would also add: igt_assert(spin->driver == INTEL_DRIVER_XE); to catch unforseen paths for the future changes. Please change and resubmit. -- Zbigniew > + xe_spin_end(spin->xe_spin); > + xe_spin_sync_wait(fd, spin); > + xe_vm_unbind_sync(fd, spin->vm, 0, spin->address, spin->bo_size); > + syncobj_destroy(fd, spin->syncobj); > + gem_munmap(spin->xe_spin, spin->bo_size); > + gem_close(fd, spin->handle); > + > + if (!spin->opts.engine) > + xe_engine_destroy(fd, spin->engine); > + > + if (!spin->opts.vm) > + xe_vm_destroy(fd, spin->vm); > + > + free(spin); > +} > + > void xe_cork_init(int fd, struct drm_xe_engine_class_instance *hwe, > struct xe_cork *cork) > { > diff --git a/lib/xe/xe_spin.h b/lib/xe/xe_spin.h > index 73f9a026..60f6e751 100644 > --- a/lib/xe/xe_spin.h > +++ b/lib/xe/xe_spin.h > @@ -13,6 +13,7 @@ > #include <stdbool.h> > > #include "xe_query.h" > +#include "lib/igt_dummyload.h" > > /* Mapped GPU object */ > struct xe_spin { > @@ -21,11 +22,14 @@ struct xe_spin { > uint32_t start; > uint32_t end; > }; > - > +void xe_spin_user_vm_engine(int fd, const struct igt_spin_factory *opt, struct igt_spin *spin); > +igt_spin_t *xe_spin_create(int fd, const struct igt_spin_factory *opt); > void xe_spin_init(struct xe_spin *spin, uint64_t addr, bool preempt); > bool xe_spin_started(struct xe_spin *spin); > +void xe_spin_sync_wait(int fd, struct igt_spin *spin); > void xe_spin_wait_started(struct xe_spin *spin); > void xe_spin_end(struct xe_spin *spin); > +void xe_spin_free(int fd, struct igt_spin *spin); > > struct xe_cork { > struct xe_spin *spin; > -- > 2.39.1 > ^ permalink raw reply [flat|nested] 15+ messages in thread
* [igt-dev] [PATCH i-g-t 2/2] tests/xe/xe_spin_batch: Add new test to exercise igt_spin_new for xe 2023-06-13 12:42 [igt-dev] [PATCH i-g-t 0/2] Integrate igt_spin_new with Xe sai.gowtham.ch 2023-06-13 12:42 ` [igt-dev] [PATCH i-g-t 1/2] lib/xe/xe_spin: " sai.gowtham.ch @ 2023-06-13 12:42 ` sai.gowtham.ch 2023-06-14 17:43 ` Zbigniew Kempczyński 2023-06-13 13:39 ` [igt-dev] ✓ Fi.CI.BAT: success for Integrate igt_spin_new with Xe (rev5) Patchwork 2023-06-13 14:56 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork 3 siblings, 1 reply; 15+ messages in thread From: sai.gowtham.ch @ 2023-06-13 12:42 UTC (permalink / raw) To: igt-dev, zbigniew.kempczynski, sai.gowtham.ch From: Sai Gowtham Ch <sai.gowtham.ch@intel.com> xe_spin_batch test exercises igt_spin_new submissions with different combination. Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Signed-off-by: Sai Gowtham Ch <sai.gowtham.ch@intel.com> --- tests/meson.build | 1 + tests/xe/xe_spin_batch.c | 182 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 183 insertions(+) create mode 100644 tests/xe/xe_spin_batch.c diff --git a/tests/meson.build b/tests/meson.build index f908ae88..454b0060 100644 --- a/tests/meson.build +++ b/tests/meson.build @@ -268,6 +268,7 @@ xe_progs = [ 'xe_query', 'xe_vm', 'xe_waitfence', + 'xe_spin_batch', ] msm_progs = [ diff --git a/tests/xe/xe_spin_batch.c b/tests/xe/xe_spin_batch.c new file mode 100644 index 00000000..435daaf6 --- /dev/null +++ b/tests/xe/xe_spin_batch.c @@ -0,0 +1,182 @@ +#include "igt.h" +#include "lib/intel_reg.h" +#include "xe_drm.h" +#include "xe/xe_ioctl.h" +#include "xe/xe_query.h" + +#define MAX_INSTANCE 9 + +/** + * TEST: Basic test for spin batch submissons. + * + * SUBTEST: spin-basic + * Description: Basic test to submit spin batch submissons on copy engine. + * Run type: FULL + * TODO: change ``'Run type' == FULL`` to a better category + * + */ + +static void spin_basic(int fd) +{ + uint64_t ahnd; + igt_spin_t *spin; + + ahnd = intel_allocator_open(fd, 0, INTEL_ALLOCATOR_RELOC); + spin = __igt_spin_new(fd, .ahnd = ahnd); + igt_assert(spin); + + igt_spin_free(fd, spin); + put_ahnd(ahnd); +} + +/** + * TEST:Test for spin batch submissons. + * + * SUBTEST: spin-batch + * Description: Create vm and engine of hwe class and run the spinner on it. + * Run type: FULL + * TODO: change ``'Run type' == FULL`` to a better category + * + */ + +static void spin(int fd, struct drm_xe_engine_class_instance *hwe) +{ + uint64_t ahnd; + unsigned int engine; + uint32_t vm; + igt_spin_t *spin; + + vm = xe_vm_create(fd, 0, 0); + engine = xe_engine_create(fd, vm, hwe, 0); + ahnd = intel_allocator_open(fd, 0, INTEL_ALLOCATOR_RELOC); + + spin = igt_spin_new(fd, .ahnd = ahnd, .engine = engine, .vm = vm); + igt_assert(spin); + + igt_spin_free(fd, spin); + xe_engine_destroy(fd, engine); + xe_vm_destroy(fd, vm); + + put_ahnd(ahnd); +} + +/** + * TEST: Basic test for spin batch submission on all hwe. + * + * SUBTEST: spin-basic-all + * Description: Basic test which validates the functionality of spinner on all hwe. + * Run type: FULL + * TODO: change ``'Run type' == FULL`` to a better category + * + */ +static void spin_basic_all(int fd) +{ + struct drm_xe_engine_class_instance *hwe; + uint64_t ahnd; + uint32_t vm; + igt_spin_t **spin; + int i = 0; + + vm = xe_vm_create(fd, 0, 0); + ahnd = intel_allocator_open(fd, vm, INTEL_ALLOCATOR_RELOC); + spin = malloc(sizeof(*spin) * xe_number_hw_engines(fd)); + xe_for_each_hw_engine(fd, hwe) { + igt_debug("Run on engine: %s:%d\n", + xe_engine_class_string(hwe->engine_class), hwe->engine_instance); + spin[i] = igt_spin_new(fd, .ahnd = ahnd, .vm = vm, .hwe = hwe); + igt_assert(spin[i]); + i++; + } + + while (--i>=0) + igt_spin_free(fd, spin[i]); + + put_ahnd(ahnd); + xe_vm_destroy(fd, vm); + free(spin); +} + +/** + * TEST: Test for spin batch submissions. + * SUBTEST: spin-all + * Description: Spinner test to run on all the engines! + * Run type: FULL + * TODO: change ``'Run type' == FULL`` to a better category + * + */ + +static void spin_all(int fd, int gt, int class) +{ + uint64_t ahnd; + uint32_t engines[MAX_INSTANCE], vm; + int i, num_placements = 0; + struct drm_xe_engine_class_instance eci[MAX_INSTANCE]; + igt_spin_t *spin[MAX_INSTANCE]; + struct drm_xe_engine_class_instance *hwe; + + ahnd = intel_allocator_open(fd, 0, INTEL_ALLOCATOR_RELOC); + + xe_for_each_hw_engine(fd, hwe) { + if (hwe->engine_class != class || hwe->gt_id != gt) + continue; + eci[num_placements++] = *hwe; + } + if (num_placements < 2) + return; + vm = xe_vm_create(fd, 0, 0); + + for (i = 0; i < num_placements; i++) { + struct drm_xe_engine_create create = { + .vm_id = vm, + .width = 1, + .num_placements = num_placements, + .instances = to_user_pointer(eci), + }; + + igt_assert_eq(igt_ioctl(fd, DRM_IOCTL_XE_ENGINE_CREATE, + &create), 0); + engines[i] = create.engine_id; + spin[i] = igt_spin_new(fd, .ahnd = ahnd, .engine = engines[i], .vm = vm); + } + + for (i = 0; i < num_placements; i++) { + igt_assert(spin[i]); + igt_spin_free(fd, spin[i]); + } + + put_ahnd(ahnd); + xe_vm_destroy(fd, vm); +} + +igt_main +{ + struct drm_xe_engine_class_instance *hwe; + int fd; + int gt, class; + + igt_fixture { + fd = drm_open_driver(DRIVER_XE); + xe_device_get(fd); + } + + igt_subtest("spin-basic") + spin_basic(fd); + + igt_subtest("spin-batch") + xe_for_each_hw_engine(fd, hwe) + spin(fd, hwe); + + igt_subtest("spin-basic-all") + spin_basic_all(fd); + + igt_subtest("spin-all") { + xe_for_each_gt(fd, gt) + xe_for_each_hw_engine_class(class) + spin_all(fd, gt, class); + } + + igt_fixture { + xe_device_put(fd); + close(fd); + } +} -- 2.39.1 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 2/2] tests/xe/xe_spin_batch: Add new test to exercise igt_spin_new for xe 2023-06-13 12:42 ` [igt-dev] [PATCH i-g-t 2/2] tests/xe/xe_spin_batch: Add new test to exercise igt_spin_new for xe sai.gowtham.ch @ 2023-06-14 17:43 ` Zbigniew Kempczyński 0 siblings, 0 replies; 15+ messages in thread From: Zbigniew Kempczyński @ 2023-06-14 17:43 UTC (permalink / raw) To: sai.gowtham.ch; +Cc: igt-dev On Tue, Jun 13, 2023 at 06:12:47PM +0530, sai.gowtham.ch@intel.com wrote: > From: Sai Gowtham Ch <sai.gowtham.ch@intel.com> > > xe_spin_batch test exercises igt_spin_new submissions with different > combination. > > Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> > Signed-off-by: Sai Gowtham Ch <sai.gowtham.ch@intel.com> > --- > tests/meson.build | 1 + > tests/xe/xe_spin_batch.c | 182 +++++++++++++++++++++++++++++++++++++++ > 2 files changed, 183 insertions(+) > create mode 100644 tests/xe/xe_spin_batch.c > > diff --git a/tests/meson.build b/tests/meson.build > index f908ae88..454b0060 100644 > --- a/tests/meson.build > +++ b/tests/meson.build > @@ -268,6 +268,7 @@ xe_progs = [ > 'xe_query', > 'xe_vm', > 'xe_waitfence', > + 'xe_spin_batch', > ] > > msm_progs = [ > diff --git a/tests/xe/xe_spin_batch.c b/tests/xe/xe_spin_batch.c > new file mode 100644 > index 00000000..435daaf6 > --- /dev/null > +++ b/tests/xe/xe_spin_batch.c > @@ -0,0 +1,182 @@ > +#include "igt.h" > +#include "lib/intel_reg.h" > +#include "xe_drm.h" > +#include "xe/xe_ioctl.h" > +#include "xe/xe_query.h" > + > +#define MAX_INSTANCE 9 > + > +/** > + * TEST: Basic test for spin batch submissons. > + * > + * SUBTEST: spin-basic > + * Description: Basic test to submit spin batch submissons on copy engine. > + * Run type: FULL > + * TODO: change ``'Run type' == FULL`` to a better category > + * > + */ > + > +static void spin_basic(int fd) > +{ > + uint64_t ahnd; > + igt_spin_t *spin; > + > + ahnd = intel_allocator_open(fd, 0, INTEL_ALLOCATOR_RELOC); > + spin = __igt_spin_new(fd, .ahnd = ahnd); If you want directly use __igt_spin_new() ok, but I thought you want to use igt_spin_new() here. > + igt_assert(spin); This assert is not necessary, you may drop it as you have assert check in xe_spin_create() codepath which excludes returning spin == NULL: xe_spin.c: xe_spin_create(): + spin = calloc(1, sizeof(struct igt_spin)); + igt_assert(spin); > + > + igt_spin_free(fd, spin); > + put_ahnd(ahnd); > +} > + > +/** > + * TEST:Test for spin batch submissons. > + * > + * SUBTEST: spin-batch > + * Description: Create vm and engine of hwe class and run the spinner on it. > + * Run type: FULL > + * TODO: change ``'Run type' == FULL`` to a better category > + * > + */ > + > +static void spin(int fd, struct drm_xe_engine_class_instance *hwe) > +{ > + uint64_t ahnd; > + unsigned int engine; > + uint32_t vm; > + igt_spin_t *spin; > + > + vm = xe_vm_create(fd, 0, 0); > + engine = xe_engine_create(fd, vm, hwe, 0); > + ahnd = intel_allocator_open(fd, 0, INTEL_ALLOCATOR_RELOC); > + > + spin = igt_spin_new(fd, .ahnd = ahnd, .engine = engine, .vm = vm); > + igt_assert(spin); You may drop this assert. > + > + igt_spin_free(fd, spin); > + xe_engine_destroy(fd, engine); > + xe_vm_destroy(fd, vm); > + > + put_ahnd(ahnd); > +} > + > +/** > + * TEST: Basic test for spin batch submission on all hwe. > + * > + * SUBTEST: spin-basic-all > + * Description: Basic test which validates the functionality of spinner on all hwe. > + * Run type: FULL > + * TODO: change ``'Run type' == FULL`` to a better category > + * > + */ > +static void spin_basic_all(int fd) > +{ > + struct drm_xe_engine_class_instance *hwe; > + uint64_t ahnd; > + uint32_t vm; > + igt_spin_t **spin; > + int i = 0; > + > + vm = xe_vm_create(fd, 0, 0); > + ahnd = intel_allocator_open(fd, vm, INTEL_ALLOCATOR_RELOC); > + spin = malloc(sizeof(*spin) * xe_number_hw_engines(fd)); > + xe_for_each_hw_engine(fd, hwe) { > + igt_debug("Run on engine: %s:%d\n", > + xe_engine_class_string(hwe->engine_class), hwe->engine_instance); > + spin[i] = igt_spin_new(fd, .ahnd = ahnd, .vm = vm, .hwe = hwe); > + igt_assert(spin[i]); This assert as well. > + i++; > + } > + > + while (--i>=0) Minor nit, use: while (--i >= 0) for better readability. > + igt_spin_free(fd, spin[i]); > + > + put_ahnd(ahnd); > + xe_vm_destroy(fd, vm); > + free(spin); > +} > + > +/** > + * TEST: Test for spin batch submissions. > + * SUBTEST: spin-all > + * Description: Spinner test to run on all the engines! > + * Run type: FULL > + * TODO: change ``'Run type' == FULL`` to a better category > + * > + */ > + > +static void spin_all(int fd, int gt, int class) > +{ > + uint64_t ahnd; > + uint32_t engines[MAX_INSTANCE], vm; > + int i, num_placements = 0; > + struct drm_xe_engine_class_instance eci[MAX_INSTANCE]; > + igt_spin_t *spin[MAX_INSTANCE]; > + struct drm_xe_engine_class_instance *hwe; > + > + ahnd = intel_allocator_open(fd, 0, INTEL_ALLOCATOR_RELOC); > + > + xe_for_each_hw_engine(fd, hwe) { > + if (hwe->engine_class != class || hwe->gt_id != gt) > + continue; > + eci[num_placements++] = *hwe; > + } > + if (num_placements < 2) > + return; > + vm = xe_vm_create(fd, 0, 0); > + > + for (i = 0; i < num_placements; i++) { > + struct drm_xe_engine_create create = { > + .vm_id = vm, > + .width = 1, > + .num_placements = num_placements, > + .instances = to_user_pointer(eci), > + }; > + > + igt_assert_eq(igt_ioctl(fd, DRM_IOCTL_XE_ENGINE_CREATE, > + &create), 0); > + engines[i] = create.engine_id; > + spin[i] = igt_spin_new(fd, .ahnd = ahnd, .engine = engines[i], .vm = vm); > + } > + > + for (i = 0; i < num_placements; i++) { > + igt_assert(spin[i]); This assert is not necessary. > + igt_spin_free(fd, spin[i]); But you're not destroying the engines. They are not destroyed in the spinner code as spinner is not its owner. Add: + xe_engine_destroy(fd, engines[i]); Other things looks good. Resubmit and likely you'll got my rb in next turn. -- Zbigniew > + } > + > + put_ahnd(ahnd); > + xe_vm_destroy(fd, vm); > +} > + > +igt_main > +{ > + struct drm_xe_engine_class_instance *hwe; > + int fd; > + int gt, class; > + > + igt_fixture { > + fd = drm_open_driver(DRIVER_XE); > + xe_device_get(fd); > + } > + > + igt_subtest("spin-basic") > + spin_basic(fd); > + > + igt_subtest("spin-batch") > + xe_for_each_hw_engine(fd, hwe) > + spin(fd, hwe); > + > + igt_subtest("spin-basic-all") > + spin_basic_all(fd); > + > + igt_subtest("spin-all") { > + xe_for_each_gt(fd, gt) > + xe_for_each_hw_engine_class(class) > + spin_all(fd, gt, class); > + } > + > + igt_fixture { > + xe_device_put(fd); > + close(fd); > + } > +} > -- > 2.39.1 > ^ permalink raw reply [flat|nested] 15+ messages in thread
* [igt-dev] ✓ Fi.CI.BAT: success for Integrate igt_spin_new with Xe (rev5) 2023-06-13 12:42 [igt-dev] [PATCH i-g-t 0/2] Integrate igt_spin_new with Xe sai.gowtham.ch 2023-06-13 12:42 ` [igt-dev] [PATCH i-g-t 1/2] lib/xe/xe_spin: " sai.gowtham.ch 2023-06-13 12:42 ` [igt-dev] [PATCH i-g-t 2/2] tests/xe/xe_spin_batch: Add new test to exercise igt_spin_new for xe sai.gowtham.ch @ 2023-06-13 13:39 ` Patchwork 2023-06-13 14:56 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork 3 siblings, 0 replies; 15+ messages in thread From: Patchwork @ 2023-06-13 13:39 UTC (permalink / raw) To: sai.gowtham.ch; +Cc: igt-dev [-- Attachment #1: Type: text/plain, Size: 7144 bytes --] == Series Details == Series: Integrate igt_spin_new with Xe (rev5) URL : https://patchwork.freedesktop.org/series/118837/ State : success == Summary == CI Bug Log - changes from CI_DRM_13265 -> IGTPW_9157 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/index.html Participating hosts (39 -> 38) ------------------------------ Additional (1): fi-bsw-n3050 Missing (2): bat-rpls-2 fi-snb-2520m Known issues ------------ Here are the changes found in IGTPW_9157 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@core_auth@basic-auth: - bat-adlp-11: NOTRUN -> [ABORT][1] ([i915#8011]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/bat-adlp-11/igt@core_auth@basic-auth.html * igt@gem_lmem_swapping@random-engines: - fi-bsw-n3050: NOTRUN -> [SKIP][2] ([fdo#109271]) +25 similar issues [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/fi-bsw-n3050/igt@gem_lmem_swapping@random-engines.html * igt@i915_selftest@live@gt_mocs: - bat-mtlp-8: [PASS][3] -> [DMESG-FAIL][4] ([i915#7059]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13265/bat-mtlp-8/igt@i915_selftest@live@gt_mocs.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/bat-mtlp-8/igt@i915_selftest@live@gt_mocs.html - bat-mtlp-6: [PASS][5] -> [DMESG-FAIL][6] ([i915#7059]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13265/bat-mtlp-6/igt@i915_selftest@live@gt_mocs.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/bat-mtlp-6/igt@i915_selftest@live@gt_mocs.html * igt@i915_selftest@live@hangcheck: - bat-dg2-11: [PASS][7] -> [ABORT][8] ([i915#7913] / [i915#7979]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13265/bat-dg2-11/igt@i915_selftest@live@hangcheck.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/bat-dg2-11/igt@i915_selftest@live@hangcheck.html * igt@i915_selftest@live@requests: - bat-mtlp-6: [PASS][9] -> [DMESG-FAIL][10] ([i915#7269]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13265/bat-mtlp-6/igt@i915_selftest@live@requests.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/bat-mtlp-6/igt@i915_selftest@live@requests.html * igt@i915_selftest@live@slpc: - bat-mtlp-6: [PASS][11] -> [DMESG-WARN][12] ([i915#6367]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13265/bat-mtlp-6/igt@i915_selftest@live@slpc.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/bat-mtlp-6/igt@i915_selftest@live@slpc.html - bat-rpls-1: NOTRUN -> [DMESG-WARN][13] ([i915#6367]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/bat-rpls-1/igt@i915_selftest@live@slpc.html * igt@i915_selftest@live@workarounds: - bat-mtlp-6: [PASS][14] -> [DMESG-FAIL][15] ([i915#6763]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13265/bat-mtlp-6/igt@i915_selftest@live@workarounds.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/bat-mtlp-6/igt@i915_selftest@live@workarounds.html * igt@i915_suspend@basic-s3-without-i915: - bat-rpls-1: NOTRUN -> [ABORT][16] ([i915#6687] / [i915#7978]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/bat-rpls-1/igt@i915_suspend@basic-s3-without-i915.html * igt@kms_chamelium_hpd@common-hpd-after-suspend: - fi-pnv-d510: NOTRUN -> [SKIP][17] ([fdo#109271]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/fi-pnv-d510/igt@kms_chamelium_hpd@common-hpd-after-suspend.html * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-c-hdmi-a-2: - fi-bsw-n3050: NOTRUN -> [SKIP][18] ([fdo#109271] / [i915#4579]) +1 similar issue [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/fi-bsw-n3050/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-c-hdmi-a-2.html #### Possible fixes #### * igt@dmabuf@all-tests@dma_fence: - fi-pnv-d510: [DMESG-FAIL][19] ([i915#8143]) -> [PASS][20] [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13265/fi-pnv-d510/igt@dmabuf@all-tests@dma_fence.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/fi-pnv-d510/igt@dmabuf@all-tests@dma_fence.html * igt@dmabuf@all-tests@sanitycheck: - fi-pnv-d510: [ABORT][21] ([i915#8143]) -> [PASS][22] [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13265/fi-pnv-d510/igt@dmabuf@all-tests@sanitycheck.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/fi-pnv-d510/igt@dmabuf@all-tests@sanitycheck.html * igt@i915_selftest@live@requests: - bat-rpls-1: [ABORT][23] ([i915#4983] / [i915#7911] / [i915#7920]) -> [PASS][24] [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13265/bat-rpls-1/igt@i915_selftest@live@requests.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/bat-rpls-1/igt@i915_selftest@live@requests.html #### Warnings #### * igt@i915_module_load@load: - bat-adlp-11: [ABORT][25] ([i915#4423]) -> [DMESG-WARN][26] ([i915#4423]) [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13265/bat-adlp-11/igt@i915_module_load@load.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/bat-adlp-11/igt@i915_module_load@load.html [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [i915#4423]: https://gitlab.freedesktop.org/drm/intel/issues/4423 [i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579 [i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983 [i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367 [i915#6687]: https://gitlab.freedesktop.org/drm/intel/issues/6687 [i915#6763]: https://gitlab.freedesktop.org/drm/intel/issues/6763 [i915#7059]: https://gitlab.freedesktop.org/drm/intel/issues/7059 [i915#7269]: https://gitlab.freedesktop.org/drm/intel/issues/7269 [i915#7911]: https://gitlab.freedesktop.org/drm/intel/issues/7911 [i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913 [i915#7920]: https://gitlab.freedesktop.org/drm/intel/issues/7920 [i915#7978]: https://gitlab.freedesktop.org/drm/intel/issues/7978 [i915#7979]: https://gitlab.freedesktop.org/drm/intel/issues/7979 [i915#8011]: https://gitlab.freedesktop.org/drm/intel/issues/8011 [i915#8143]: https://gitlab.freedesktop.org/drm/intel/issues/8143 Build changes ------------- * CI: CI-20190529 -> None * IGT: IGT_7326 -> IGTPW_9157 CI-20190529: 20190529 CI_DRM_13265: 46ceea7e1f841890e7cb53f0df602a30c6b41d6a @ git://anongit.freedesktop.org/gfx-ci/linux IGTPW_9157: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/index.html IGT_7326: 02c2cf17628b6203d6105d4a91dfe8a101d482ce @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Testlist changes ---------------- +igt@xe_spin_batch@spin-all +igt@xe_spin_batch@spin-basic +igt@xe_spin_batch@spin-basic-all +igt@xe_spin_batch@spin-batch == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/index.html [-- Attachment #2: Type: text/html, Size: 8532 bytes --] ^ permalink raw reply [flat|nested] 15+ messages in thread
* [igt-dev] ✓ Fi.CI.IGT: success for Integrate igt_spin_new with Xe (rev5) 2023-06-13 12:42 [igt-dev] [PATCH i-g-t 0/2] Integrate igt_spin_new with Xe sai.gowtham.ch ` (2 preceding siblings ...) 2023-06-13 13:39 ` [igt-dev] ✓ Fi.CI.BAT: success for Integrate igt_spin_new with Xe (rev5) Patchwork @ 2023-06-13 14:56 ` Patchwork 3 siblings, 0 replies; 15+ messages in thread From: Patchwork @ 2023-06-13 14:56 UTC (permalink / raw) To: sai.gowtham.ch; +Cc: igt-dev [-- Attachment #1: Type: text/plain, Size: 40697 bytes --] == Series Details == Series: Integrate igt_spin_new with Xe (rev5) URL : https://patchwork.freedesktop.org/series/118837/ State : success == Summary == CI Bug Log - changes from CI_DRM_13265_full -> IGTPW_9157_full ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/index.html Participating hosts (8 -> 7) ------------------------------ Missing (1): shard-rkl0 New tests --------- New tests have been introduced between CI_DRM_13265_full and IGTPW_9157_full: ### New IGT tests (18) ### * igt@kms_async_flips@crc@pipe-a-vga-1: - Statuses : 1 pass(s) - Exec time: [0.0] s * igt@kms_async_flips@crc@pipe-b-vga-1: - Statuses : 1 pass(s) - Exec time: [0.0] s * igt@kms_plane_scaling@plane-upscale-with-modifiers-20x20@pipe-a-hdmi-a-3: - Statuses : 1 pass(s) - Exec time: [0.0] s * igt@kms_plane_scaling@plane-upscale-with-modifiers-20x20@pipe-b-hdmi-a-3: - Statuses : 1 pass(s) - Exec time: [0.0] s * igt@kms_plane_scaling@plane-upscale-with-modifiers-20x20@pipe-c-hdmi-a-3: - Statuses : 1 pass(s) - Exec time: [0.0] s * igt@kms_plane_scaling@plane-upscale-with-modifiers-20x20@pipe-d-hdmi-a-3: - Statuses : 1 pass(s) - Exec time: [0.0] s * igt@kms_plane_scaling@plane-upscale-with-pixel-format-factor-0-25@pipe-a-hdmi-a-3: - Statuses : 1 pass(s) - Exec time: [0.0] s * igt@kms_plane_scaling@plane-upscale-with-pixel-format-factor-0-25@pipe-b-hdmi-a-3: - Statuses : 1 pass(s) - Exec time: [0.0] s * igt@kms_plane_scaling@plane-upscale-with-pixel-format-factor-0-25@pipe-c-hdmi-a-3: - Statuses : 1 pass(s) - Exec time: [0.0] s * igt@kms_plane_scaling@plane-upscale-with-pixel-format-factor-0-25@pipe-d-hdmi-a-3: - Statuses : 1 pass(s) - Exec time: [0.0] s * igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-a-hdmi-a-3: - Statuses : 1 pass(s) - Exec time: [0.0] s * igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-b-hdmi-a-3: - Statuses : 1 pass(s) - Exec time: [0.0] s * igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-c-hdmi-a-3: - Statuses : 1 pass(s) - Exec time: [0.0] s * igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-d-hdmi-a-3: - Statuses : 1 pass(s) - Exec time: [0.0] s * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75@pipe-a-hdmi-a-3: - Statuses : 1 pass(s) - Exec time: [0.0] s * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75@pipe-b-hdmi-a-3: - Statuses : 1 pass(s) - Exec time: [0.0] s * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75@pipe-c-hdmi-a-3: - Statuses : 1 pass(s) - Exec time: [0.0] s * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75@pipe-d-hdmi-a-3: - Statuses : 1 pass(s) - Exec time: [0.0] s Known issues ------------ Here are the changes found in IGTPW_9157_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@feature_discovery@psr1: - shard-tglu: NOTRUN -> [SKIP][1] ([i915#658]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-tglu-6/igt@feature_discovery@psr1.html * igt@feature_discovery@psr2: - shard-rkl: NOTRUN -> [SKIP][2] ([i915#658]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-2/igt@feature_discovery@psr2.html * igt@gem_barrier_race@remote-request@rcs0: - shard-tglu: [PASS][3] -> [ABORT][4] ([i915#8211] / [i915#8234]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13265/shard-tglu-4/igt@gem_barrier_race@remote-request@rcs0.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-tglu-4/igt@gem_barrier_race@remote-request@rcs0.html * igt@gem_ccs@ctrl-surf-copy-new-ctx: - shard-rkl: NOTRUN -> [SKIP][5] ([i915#4098] / [i915#4579] / [i915#5325]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-4/igt@gem_ccs@ctrl-surf-copy-new-ctx.html * igt@gem_ctx_exec@basic-nohangcheck: - shard-rkl: NOTRUN -> [FAIL][6] ([i915#6268]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-1/igt@gem_ctx_exec@basic-nohangcheck.html * igt@gem_ctx_persistence@legacy-engines-mixed-process: - shard-snb: NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#1099]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-snb5/igt@gem_ctx_persistence@legacy-engines-mixed-process.html * igt@gem_exec_balancer@parallel-out-fence: - shard-rkl: NOTRUN -> [SKIP][8] ([i915#4525]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-1/igt@gem_exec_balancer@parallel-out-fence.html * igt@gem_exec_fair@basic-deadline: - shard-rkl: [PASS][9] -> [FAIL][10] ([i915#2846]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13265/shard-rkl-3/igt@gem_exec_fair@basic-deadline.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-3/igt@gem_exec_fair@basic-deadline.html * igt@gem_exec_fair@basic-none-rrul@rcs0: - shard-rkl: NOTRUN -> [FAIL][11] ([i915#2842]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-7/igt@gem_exec_fair@basic-none-rrul@rcs0.html * igt@gem_exec_fair@basic-none-share@rcs0: - shard-tglu: NOTRUN -> [FAIL][12] ([i915#2842]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-tglu-10/igt@gem_exec_fair@basic-none-share@rcs0.html * igt@gem_exec_fair@basic-pace-share@rcs0: - shard-glk: [PASS][13] -> [FAIL][14] ([i915#2842]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13265/shard-glk1/igt@gem_exec_fair@basic-pace-share@rcs0.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-glk7/igt@gem_exec_fair@basic-pace-share@rcs0.html - shard-rkl: [PASS][15] -> [FAIL][16] ([i915#2842]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13265/shard-rkl-3/igt@gem_exec_fair@basic-pace-share@rcs0.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-1/igt@gem_exec_fair@basic-pace-share@rcs0.html * igt@gem_exec_flush@basic-batch-kernel-default-cmd: - shard-tglu: NOTRUN -> [SKIP][17] ([fdo#109313]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-tglu-3/igt@gem_exec_flush@basic-batch-kernel-default-cmd.html * igt@gem_exec_params@secure-non-root: - shard-rkl: NOTRUN -> [SKIP][18] ([fdo#112283]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-4/igt@gem_exec_params@secure-non-root.html * igt@gem_exec_reloc@basic-scanout: - shard-rkl: NOTRUN -> [SKIP][19] ([i915#3281]) +4 similar issues [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-6/igt@gem_exec_reloc@basic-scanout.html * igt@gem_exec_suspend@basic-s4-devices@smem: - shard-rkl: NOTRUN -> [ABORT][20] ([i915#7975] / [i915#8213]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-1/igt@gem_exec_suspend@basic-s4-devices@smem.html * igt@gem_lmem_swapping@random: - shard-rkl: NOTRUN -> [SKIP][21] ([i915#4613]) +1 similar issue [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-4/igt@gem_lmem_swapping@random.html * igt@gem_pread@uncached: - shard-rkl: NOTRUN -> [SKIP][22] ([i915#3282]) +4 similar issues [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-7/igt@gem_pread@uncached.html * igt@gem_pxp@create-regular-context-1: - shard-tglu: NOTRUN -> [SKIP][23] ([i915#4270]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-tglu-4/igt@gem_pxp@create-regular-context-1.html * igt@gem_pxp@verify-pxp-execution-after-suspend-resume: - shard-rkl: NOTRUN -> [SKIP][24] ([i915#4270]) +1 similar issue [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-3/igt@gem_pxp@verify-pxp-execution-after-suspend-resume.html * igt@gem_softpin@evict-snoop: - shard-tglu: NOTRUN -> [SKIP][25] ([fdo#109312]) [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-tglu-6/igt@gem_softpin@evict-snoop.html * igt@gem_userptr_blits@unsync-unmap-cycles: - shard-tglu: NOTRUN -> [SKIP][26] ([i915#3297]) [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-tglu-3/igt@gem_userptr_blits@unsync-unmap-cycles.html * igt@gen7_exec_parse@basic-offset: - shard-rkl: NOTRUN -> [SKIP][27] ([fdo#109289]) +1 similar issue [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-3/igt@gen7_exec_parse@basic-offset.html * igt@gen9_exec_parse@allowed-single: - shard-tglu: NOTRUN -> [SKIP][28] ([i915#2527] / [i915#2856]) [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-tglu-6/igt@gen9_exec_parse@allowed-single.html * igt@gen9_exec_parse@bb-start-out: - shard-rkl: NOTRUN -> [SKIP][29] ([i915#2527]) +1 similar issue [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-7/igt@gen9_exec_parse@bb-start-out.html * igt@i915_pm_backlight@fade-with-suspend: - shard-rkl: NOTRUN -> [SKIP][30] ([i915#7561]) [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-4/igt@i915_pm_backlight@fade-with-suspend.html * igt@i915_pm_dc@dc9-dpms: - shard-rkl: NOTRUN -> [SKIP][31] ([i915#3361]) [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-4/igt@i915_pm_dc@dc9-dpms.html * igt@i915_pm_rpm@dpms-mode-unset-lpsp: - shard-rkl: [PASS][32] -> [SKIP][33] ([i915#1397]) +1 similar issue [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13265/shard-rkl-7/igt@i915_pm_rpm@dpms-mode-unset-lpsp.html [33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-2/igt@i915_pm_rpm@dpms-mode-unset-lpsp.html * igt@i915_pm_rpm@gem-execbuf-stress-pc8: - shard-glk: NOTRUN -> [SKIP][34] ([fdo#109271]) +20 similar issues [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-glk8/igt@i915_pm_rpm@gem-execbuf-stress-pc8.html - shard-rkl: NOTRUN -> [SKIP][35] ([fdo#109506]) [35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-2/igt@i915_pm_rpm@gem-execbuf-stress-pc8.html - shard-tglu: NOTRUN -> [SKIP][36] ([fdo#109506]) [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-tglu-4/igt@i915_pm_rpm@gem-execbuf-stress-pc8.html * igt@kms_big_fb@4-tiled-16bpp-rotate-0: - shard-rkl: NOTRUN -> [SKIP][37] ([i915#5286]) +2 similar issues [37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-4/igt@kms_big_fb@4-tiled-16bpp-rotate-0.html * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-async-flip: - shard-snb: NOTRUN -> [SKIP][38] ([fdo#109271]) +85 similar issues [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-snb4/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html * igt@kms_big_fb@linear-64bpp-rotate-90: - shard-rkl: NOTRUN -> [SKIP][39] ([fdo#111614] / [i915#3638]) +1 similar issue [39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-3/igt@kms_big_fb@linear-64bpp-rotate-90.html - shard-tglu: NOTRUN -> [SKIP][40] ([fdo#111614]) [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-tglu-8/igt@kms_big_fb@linear-64bpp-rotate-90.html * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip: - shard-rkl: NOTRUN -> [SKIP][41] ([fdo#110723]) +3 similar issues [41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-7/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip.html - shard-tglu: NOTRUN -> [SKIP][42] ([fdo#111615]) +1 similar issue [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-tglu-5/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip.html * igt@kms_ccs@pipe-a-crc-primary-basic-4_tiled_dg2_rc_ccs_cc: - shard-tglu: NOTRUN -> [SKIP][43] ([i915#5354] / [i915#6095]) +2 similar issues [43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-tglu-5/igt@kms_ccs@pipe-a-crc-primary-basic-4_tiled_dg2_rc_ccs_cc.html * igt@kms_ccs@pipe-a-random-ccs-data-yf_tiled_ccs: - shard-rkl: NOTRUN -> [SKIP][44] ([i915#3734] / [i915#5354] / [i915#6095]) [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-1/igt@kms_ccs@pipe-a-random-ccs-data-yf_tiled_ccs.html * igt@kms_ccs@pipe-b-bad-rotation-90-y_tiled_gen12_mc_ccs: - shard-apl: NOTRUN -> [SKIP][45] ([fdo#109271] / [i915#3886]) +1 similar issue [45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-apl4/igt@kms_ccs@pipe-b-bad-rotation-90-y_tiled_gen12_mc_ccs.html * igt@kms_ccs@pipe-b-crc-primary-basic-4_tiled_mtl_mc_ccs: - shard-rkl: NOTRUN -> [SKIP][46] ([i915#5354] / [i915#6095]) +9 similar issues [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-3/igt@kms_ccs@pipe-b-crc-primary-basic-4_tiled_mtl_mc_ccs.html * igt@kms_ccs@pipe-b-crc-primary-basic-y_tiled_gen12_mc_ccs: - shard-tglu: NOTRUN -> [SKIP][47] ([i915#3689] / [i915#3886] / [i915#5354] / [i915#6095]) [47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-tglu-2/igt@kms_ccs@pipe-b-crc-primary-basic-y_tiled_gen12_mc_ccs.html - shard-glk: NOTRUN -> [SKIP][48] ([fdo#109271] / [i915#3886]) [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-glk3/igt@kms_ccs@pipe-b-crc-primary-basic-y_tiled_gen12_mc_ccs.html * igt@kms_ccs@pipe-b-crc-primary-rotation-180-4_tiled_dg2_rc_ccs: - shard-tglu: NOTRUN -> [SKIP][49] ([i915#3689] / [i915#5354] / [i915#6095]) [49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-tglu-9/igt@kms_ccs@pipe-b-crc-primary-rotation-180-4_tiled_dg2_rc_ccs.html * igt@kms_ccs@pipe-b-missing-ccs-buffer-y_tiled_gen12_mc_ccs: - shard-rkl: NOTRUN -> [SKIP][50] ([i915#3886] / [i915#5354] / [i915#6095]) +2 similar issues [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-7/igt@kms_ccs@pipe-b-missing-ccs-buffer-y_tiled_gen12_mc_ccs.html * igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_ccs: - shard-rkl: NOTRUN -> [SKIP][51] ([i915#5354]) +14 similar issues [51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-2/igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_ccs.html * igt@kms_ccs@pipe-d-missing-ccs-buffer-yf_tiled_ccs: - shard-tglu: NOTRUN -> [SKIP][52] ([fdo#111615] / [i915#3689] / [i915#5354] / [i915#6095]) [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-tglu-10/igt@kms_ccs@pipe-d-missing-ccs-buffer-yf_tiled_ccs.html * igt@kms_chamelium_color@ctm-negative: - shard-rkl: NOTRUN -> [SKIP][53] ([fdo#111827]) +1 similar issue [53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-2/igt@kms_chamelium_color@ctm-negative.html * igt@kms_chamelium_edid@hdmi-edid-stress-resolution-non-4k: - shard-tglu: NOTRUN -> [SKIP][54] ([i915#7828]) [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-tglu-6/igt@kms_chamelium_edid@hdmi-edid-stress-resolution-non-4k.html * igt@kms_chamelium_hpd@vga-hpd-for-each-pipe: - shard-rkl: NOTRUN -> [SKIP][55] ([i915#7828]) +3 similar issues [55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-7/igt@kms_chamelium_hpd@vga-hpd-for-each-pipe.html * igt@kms_content_protection@dp-mst-lic-type-1: - shard-rkl: NOTRUN -> [SKIP][56] ([i915#3116]) [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-4/igt@kms_content_protection@dp-mst-lic-type-1.html * igt@kms_content_protection@legacy: - shard-rkl: NOTRUN -> [SKIP][57] ([i915#4579] / [i915#7118]) [57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-1/igt@kms_content_protection@legacy.html * igt@kms_cursor_crc@cursor-random-512x170: - shard-rkl: NOTRUN -> [SKIP][58] ([i915#3359]) [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-3/igt@kms_cursor_crc@cursor-random-512x170.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic: - shard-rkl: NOTRUN -> [SKIP][59] ([i915#4103]) [59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html * igt@kms_cursor_legacy@cursorb-vs-flipa-legacy: - shard-tglu: NOTRUN -> [SKIP][60] ([fdo#109274]) +1 similar issue [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-tglu-10/igt@kms_cursor_legacy@cursorb-vs-flipa-legacy.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions: - shard-apl: [PASS][61] -> [FAIL][62] ([i915#2346]) [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13265/shard-apl7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html [62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-apl7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html * igt@kms_cursor_legacy@forked-move@pipe-b: - shard-rkl: [PASS][63] -> [INCOMPLETE][64] ([i915#8011]) [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13265/shard-rkl-4/igt@kms_cursor_legacy@forked-move@pipe-b.html [64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-7/igt@kms_cursor_legacy@forked-move@pipe-b.html * igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-2: - shard-rkl: NOTRUN -> [SKIP][65] ([i915#3804] / [i915#4579]) [65]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-4/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-2.html * igt@kms_dsc@dsc-with-bpc-formats: - shard-rkl: NOTRUN -> [SKIP][66] ([i915#3840] / [i915#4579]) [66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-7/igt@kms_dsc@dsc-with-bpc-formats.html * igt@kms_flip@2x-flip-vs-dpms: - shard-rkl: NOTRUN -> [SKIP][67] ([fdo#111825]) +11 similar issues [67]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-4/igt@kms_flip@2x-flip-vs-dpms.html - shard-tglu: NOTRUN -> [SKIP][68] ([fdo#109274] / [i915#3637]) +2 similar issues [68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-tglu-6/igt@kms_flip@2x-flip-vs-dpms.html * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-valid-mode: - shard-rkl: NOTRUN -> [SKIP][69] ([i915#2672] / [i915#4579]) +1 similar issue [69]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-3/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-valid-mode.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-pwrite: - shard-tglu: NOTRUN -> [SKIP][70] ([fdo#109280]) +6 similar issues [70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-tglu-3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-pwrite.html * igt@kms_frontbuffer_tracking@fbc-tiling-4: - shard-rkl: NOTRUN -> [SKIP][71] ([i915#5439]) [71]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-3/igt@kms_frontbuffer_tracking@fbc-tiling-4.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt: - shard-rkl: NOTRUN -> [SKIP][72] ([fdo#111825] / [i915#1825]) +19 similar issues [72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-7/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt.html * igt@kms_frontbuffer_tracking@fbcpsr-modesetfrombusy: - shard-tglu: NOTRUN -> [SKIP][73] ([fdo#110189]) +7 similar issues [73]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-tglu-10/igt@kms_frontbuffer_tracking@fbcpsr-modesetfrombusy.html * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-pwrite: - shard-rkl: NOTRUN -> [SKIP][74] ([i915#3023]) +15 similar issues [74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-3/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-pwrite.html * igt@kms_hdr@invalid-hdr: - shard-glk: NOTRUN -> [SKIP][75] ([fdo#109271] / [i915#4579]) +1 similar issue [75]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-glk3/igt@kms_hdr@invalid-hdr.html - shard-rkl: NOTRUN -> [SKIP][76] ([i915#4579] / [i915#6953] / [i915#8228]) [76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-2/igt@kms_hdr@invalid-hdr.html - shard-tglu: NOTRUN -> [SKIP][77] ([i915#4579] / [i915#6953] / [i915#8228]) [77]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-tglu-9/igt@kms_hdr@invalid-hdr.html * igt@kms_panel_fitting@legacy: - shard-rkl: NOTRUN -> [SKIP][78] ([i915#4579] / [i915#6301]) [78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-3/igt@kms_panel_fitting@legacy.html * igt@kms_pipe_b_c_ivb@enable-pipe-c-while-b-has-3-lanes: - shard-tglu: NOTRUN -> [SKIP][79] ([fdo#109289]) [79]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-tglu-6/igt@kms_pipe_b_c_ivb@enable-pipe-c-while-b-has-3-lanes.html * igt@kms_plane_multiple@tiling-yf: - shard-rkl: NOTRUN -> [SKIP][80] ([i915#3555] / [i915#4579]) +1 similar issue [80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-3/igt@kms_plane_multiple@tiling-yf.html * igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-2: - shard-rkl: NOTRUN -> [FAIL][81] ([i915#8292]) [81]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-3/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-2.html * igt@kms_plane_scaling@plane-downscale-with-pixel-format-factor-0-25@pipe-b-hdmi-a-2: - shard-rkl: NOTRUN -> [SKIP][82] ([i915#4579] / [i915#5176]) +2 similar issues [82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-6/igt@kms_plane_scaling@plane-downscale-with-pixel-format-factor-0-25@pipe-b-hdmi-a-2.html * igt@kms_plane_scaling@plane-downscale-with-pixel-format-factor-0-25@pipe-c-dp-1: - shard-apl: NOTRUN -> [SKIP][83] ([fdo#109271] / [i915#4579]) +3 similar issues [83]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-apl6/igt@kms_plane_scaling@plane-downscale-with-pixel-format-factor-0-25@pipe-c-dp-1.html * igt@kms_plane_scaling@plane-downscale-with-pixel-format-factor-0-25@pipe-c-hdmi-a-1: - shard-tglu: NOTRUN -> [SKIP][84] ([i915#5176]) +2 similar issues [84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-tglu-10/igt@kms_plane_scaling@plane-downscale-with-pixel-format-factor-0-25@pipe-c-hdmi-a-1.html * igt@kms_plane_scaling@plane-downscale-with-pixel-format-factor-0-25@pipe-d-hdmi-a-1: - shard-tglu: NOTRUN -> [SKIP][85] ([i915#4579] / [i915#5176]) [85]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-tglu-10/igt@kms_plane_scaling@plane-downscale-with-pixel-format-factor-0-25@pipe-d-hdmi-a-1.html * igt@kms_plane_scaling@plane-upscale-with-rotation-factor-0-25@pipe-a-hdmi-a-2: - shard-rkl: NOTRUN -> [SKIP][86] ([i915#5176]) +2 similar issues [86]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-4/igt@kms_plane_scaling@plane-upscale-with-rotation-factor-0-25@pipe-a-hdmi-a-2.html * igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-b-hdmi-a-2: - shard-rkl: NOTRUN -> [SKIP][87] ([i915#4579] / [i915#5235]) +1 similar issue [87]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-4/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-b-hdmi-a-2.html * igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-a-hdmi-a-2: - shard-rkl: NOTRUN -> [SKIP][88] ([i915#5235]) +1 similar issue [88]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-2/igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-a-hdmi-a-2.html * igt@kms_plane_scaling@planes-downscale-factor-0-5-upscale-20x20@pipe-b-vga-1: - shard-snb: NOTRUN -> [SKIP][89] ([fdo#109271] / [i915#4579]) +17 similar issues [89]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-snb2/igt@kms_plane_scaling@planes-downscale-factor-0-5-upscale-20x20@pipe-b-vga-1.html * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-big-fb: - shard-apl: NOTRUN -> [SKIP][90] ([fdo#109271] / [i915#658]) [90]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-apl4/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-big-fb.html * igt@kms_psr@primary_render: - shard-rkl: NOTRUN -> [SKIP][91] ([i915#1072]) +4 similar issues [91]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-7/igt@kms_psr@primary_render.html * igt@kms_psr@psr2_sprite_plane_onoff: - shard-apl: NOTRUN -> [SKIP][92] ([fdo#109271]) +88 similar issues [92]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-apl7/igt@kms_psr@psr2_sprite_plane_onoff.html * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180: - shard-rkl: NOTRUN -> [SKIP][93] ([fdo#111615] / [i915#5289]) [93]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-2/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html * igt@kms_setmode@basic@pipe-a-hdmi-a-1: - shard-snb: NOTRUN -> [FAIL][94] ([i915#5465]) +1 similar issue [94]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-snb1/igt@kms_setmode@basic@pipe-a-hdmi-a-1.html * igt@kms_setmode@invalid-clone-single-crtc: - shard-rkl: NOTRUN -> [SKIP][95] ([i915#3555] / [i915#4098] / [i915#4579]) [95]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-4/igt@kms_setmode@invalid-clone-single-crtc.html * igt@kms_vblank@pipe-c-wait-forked-busy-hang: - shard-rkl: NOTRUN -> [SKIP][96] ([i915#4070] / [i915#6768]) +1 similar issue [96]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-3/igt@kms_vblank@pipe-c-wait-forked-busy-hang.html * igt@kms_vblank@pipe-d-ts-continuation-idle: - shard-rkl: NOTRUN -> [SKIP][97] ([i915#4070] / [i915#533] / [i915#6768]) +3 similar issues [97]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-2/igt@kms_vblank@pipe-d-ts-continuation-idle.html * igt@kms_writeback@writeback-pixel-formats: - shard-rkl: NOTRUN -> [SKIP][98] ([i915#2437]) [98]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-3/igt@kms_writeback@writeback-pixel-formats.html * igt@v3d/v3d_submit_csd@bad-multisync-pad: - shard-rkl: NOTRUN -> [SKIP][99] ([fdo#109315]) +5 similar issues [99]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-3/igt@v3d/v3d_submit_csd@bad-multisync-pad.html * igt@v3d/v3d_submit_csd@multiple-job-submission: - shard-tglu: NOTRUN -> [SKIP][100] ([fdo#109315] / [i915#2575]) +1 similar issue [100]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-tglu-10/igt@v3d/v3d_submit_csd@multiple-job-submission.html * igt@vc4/vc4_purgeable_bo@mark-unpurgeable-check-retained: - shard-rkl: NOTRUN -> [SKIP][101] ([i915#7711]) +3 similar issues [101]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-4/igt@vc4/vc4_purgeable_bo@mark-unpurgeable-check-retained.html #### Possible fixes #### * igt@device_reset@unbind-reset-rebind: - shard-rkl: [ABORT][102] ([i915#5507]) -> [PASS][103] [102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13265/shard-rkl-2/igt@device_reset@unbind-reset-rebind.html [103]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-2/igt@device_reset@unbind-reset-rebind.html - shard-apl: [ABORT][104] ([i915#5507]) -> [PASS][105] [104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13265/shard-apl6/igt@device_reset@unbind-reset-rebind.html [105]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-apl7/igt@device_reset@unbind-reset-rebind.html - shard-tglu: [ABORT][106] ([i915#5507]) -> [PASS][107] [106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13265/shard-tglu-8/igt@device_reset@unbind-reset-rebind.html [107]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-tglu-5/igt@device_reset@unbind-reset-rebind.html - shard-glk: [ABORT][108] ([i915#5507]) -> [PASS][109] [108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13265/shard-glk9/igt@device_reset@unbind-reset-rebind.html [109]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-glk5/igt@device_reset@unbind-reset-rebind.html * igt@gem_eio@in-flight-suspend: - shard-apl: [ABORT][110] ([i915#180]) -> [PASS][111] +1 similar issue [110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13265/shard-apl7/igt@gem_eio@in-flight-suspend.html [111]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-apl7/igt@gem_eio@in-flight-suspend.html * igt@gem_eio@unwedge-stress: - {shard-dg1}: [FAIL][112] ([i915#5784]) -> [PASS][113] [112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13265/shard-dg1-15/igt@gem_eio@unwedge-stress.html [113]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-dg1-18/igt@gem_eio@unwedge-stress.html * igt@gem_exec_fair@basic-deadline: - shard-glk: [FAIL][114] ([i915#2846]) -> [PASS][115] [114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13265/shard-glk7/igt@gem_exec_fair@basic-deadline.html [115]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-glk1/igt@gem_exec_fair@basic-deadline.html * igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-hdmi-a: - shard-rkl: [SKIP][116] ([i915#1937] / [i915#4579]) -> [PASS][117] [116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13265/shard-rkl-2/igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-hdmi-a.html [117]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-7/igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-hdmi-a.html * igt@i915_pm_rpm@modeset-lpsp: - shard-rkl: [SKIP][118] ([i915#1397]) -> [PASS][119] [118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13265/shard-rkl-4/igt@i915_pm_rpm@modeset-lpsp.html [119]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-7/igt@i915_pm_rpm@modeset-lpsp.html * igt@i915_pm_rpm@modeset-non-lpsp: - {shard-dg1}: [SKIP][120] ([i915#1397]) -> [PASS][121] [120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13265/shard-dg1-19/igt@i915_pm_rpm@modeset-non-lpsp.html [121]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-dg1-16/igt@i915_pm_rpm@modeset-non-lpsp.html * igt@i915_pm_rps@reset: - shard-snb: [INCOMPLETE][122] ([i915#7790]) -> [PASS][123] [122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13265/shard-snb5/igt@i915_pm_rps@reset.html [123]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-snb1/igt@i915_pm_rps@reset.html * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-async-flip: - shard-rkl: [FAIL][124] ([i915#3743]) -> [PASS][125] [124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13265/shard-rkl-7/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html [125]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-6/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html * igt@kms_cursor_legacy@cursor-vs-flip-toggle: - shard-snb: [SKIP][126] ([fdo#109271]) -> [PASS][127] +1 similar issue [126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13265/shard-snb4/igt@kms_cursor_legacy@cursor-vs-flip-toggle.html [127]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-snb2/igt@kms_cursor_legacy@cursor-vs-flip-toggle.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions: - shard-glk: [FAIL][128] ([i915#2346]) -> [PASS][129] [128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13265/shard-glk8/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html [129]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-glk5/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size: - shard-apl: [FAIL][130] ([i915#2346]) -> [PASS][131] [130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13265/shard-apl2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html [131]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-apl3/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html * igt@kms_flip@plain-flip-ts-check-interruptible@a-hdmi-a1: - shard-glk: [FAIL][132] ([i915#2122]) -> [PASS][133] [132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13265/shard-glk8/igt@kms_flip@plain-flip-ts-check-interruptible@a-hdmi-a1.html [133]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-glk7/igt@kms_flip@plain-flip-ts-check-interruptible@a-hdmi-a1.html #### Warnings #### * igt@kms_multipipe_modeset@basic-max-pipe-crc-check: - shard-rkl: [SKIP][134] ([i915#4070] / [i915#4816]) -> [SKIP][135] ([i915#4816]) [134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13265/shard-rkl-2/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html [135]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/shard-rkl-3/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274 [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280 [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289 [fdo#109300]: https://bugs.freedesktop.org/show_bug.cgi?id=109300 [fdo#109312]: https://bugs.freedesktop.org/show_bug.cgi?id=109312 [fdo#109313]: https://bugs.freedesktop.org/show_bug.cgi?id=109313 [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315 [fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506 [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189 [fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723 [fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614 [fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615 [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825 [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827 [fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283 [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072 [i915#1099]: https://gitlab.freedesktop.org/drm/intel/issues/1099 [i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397 [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180 [i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825 [i915#1937]: https://gitlab.freedesktop.org/drm/intel/issues/1937 [i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122 [i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346 [i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437 [i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527 [i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575 [i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672 [i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842 [i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846 [i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856 [i915#3023]: https://gitlab.freedesktop.org/drm/intel/issues/3023 [i915#3116]: https://gitlab.freedesktop.org/drm/intel/issues/3116 [i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281 [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282 [i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297 [i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359 [i915#3361]: https://gitlab.freedesktop.org/drm/intel/issues/3361 [i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458 [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555 [i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591 [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637 [i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638 [i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689 [i915#3734]: https://gitlab.freedesktop.org/drm/intel/issues/3734 [i915#3743]: https://gitlab.freedesktop.org/drm/intel/issues/3743 [i915#3804]: https://gitlab.freedesktop.org/drm/intel/issues/3804 [i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840 [i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886 [i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070 [i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078 [i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098 [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103 [i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270 [i915#4349]: https://gitlab.freedesktop.org/drm/intel/issues/4349 [i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525 [i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538 [i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579 [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613 [i915#4816]: https://gitlab.freedesktop.org/drm/intel/issues/4816 [i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176 [i915#5234]: https://gitlab.freedesktop.org/drm/intel/issues/5234 [i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235 [i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286 [i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289 [i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325 [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533 [i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354 [i915#5439]: https://gitlab.freedesktop.org/drm/intel/issues/5439 [i915#5465]: https://gitlab.freedesktop.org/drm/intel/issues/5465 [i915#5493]: https://gitlab.freedesktop.org/drm/intel/issues/5493 [i915#5507]: https://gitlab.freedesktop.org/drm/intel/issues/5507 [i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784 [i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095 [i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268 [i915#6301]: https://gitlab.freedesktop.org/drm/intel/issues/6301 [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658 [i915#6768]: https://gitlab.freedesktop.org/drm/intel/issues/6768 [i915#6953]: https://gitlab.freedesktop.org/drm/intel/issues/6953 [i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116 [i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118 [i915#7561]: https://gitlab.freedesktop.org/drm/intel/issues/7561 [i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711 [i915#7790]: https://gitlab.freedesktop.org/drm/intel/issues/7790 [i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828 [i915#7975]: https://gitlab.freedesktop.org/drm/intel/issues/7975 [i915#8011]: https://gitlab.freedesktop.org/drm/intel/issues/8011 [i915#8211]: https://gitlab.freedesktop.org/drm/intel/issues/8211 [i915#8213]: https://gitlab.freedesktop.org/drm/intel/issues/8213 [i915#8228]: https://gitlab.freedesktop.org/drm/intel/issues/8228 [i915#8234]: https://gitlab.freedesktop.org/drm/intel/issues/8234 [i915#8292]: https://gitlab.freedesktop.org/drm/intel/issues/8292 [i915#8347]: https://gitlab.freedesktop.org/drm/intel/issues/8347 Build changes ------------- * CI: CI-20190529 -> None * IGT: IGT_7326 -> IGTPW_9157 * Piglit: piglit_4509 -> None CI-20190529: 20190529 CI_DRM_13265: 46ceea7e1f841890e7cb53f0df602a30c6b41d6a @ git://anongit.freedesktop.org/gfx-ci/linux IGTPW_9157: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/index.html IGT_7326: 02c2cf17628b6203d6105d4a91dfe8a101d482ce @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9157/index.html [-- Attachment #2: Type: text/html, Size: 49111 bytes --] ^ permalink raw reply [flat|nested] 15+ messages in thread
* [igt-dev] [PATCH i-g-t 0/2] Integrate igt_spin_new with Xe @ 2023-06-15 10:59 sai.gowtham.ch 0 siblings, 0 replies; 15+ messages in thread From: sai.gowtham.ch @ 2023-06-15 10:59 UTC (permalink / raw) To: igt-dev, zbigniew.kempczynski, sai.gowtham.ch From: Sai Gowtham Ch <sai.gowtham.ch@intel.com> Extending the spin_create implementation and allocator handle support in xe, where it submits dummy work loads to engine. This Implementation is wrapped around vm_bind and unbind as we are supposed to do it manually for xe. Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Signed-off-by: Sai Gowtham Ch <sai.gowtham.ch@intel.com> Sai Gowtham Ch (2): lib/xe/xe_spin: Integrate igt_spin_new with Xe tests/xe/xe_spin_batch: Add new test to exercise igt_spin_new for xe lib/igt_dummyload.c | 40 +++++++-- lib/igt_dummyload.h | 12 +++ lib/xe/xe_spin.c | 97 +++++++++++++++++++++ lib/xe/xe_spin.h | 5 +- tests/meson.build | 1 + tests/xe/xe_spin_batch.c | 179 +++++++++++++++++++++++++++++++++++++++ 6 files changed, 328 insertions(+), 6 deletions(-) create mode 100644 tests/xe/xe_spin_batch.c -- 2.39.1 ^ permalink raw reply [flat|nested] 15+ messages in thread
* [igt-dev] [PATCH i-g-t 0/2] Integrate igt_spin_new with Xe @ 2023-06-12 8:59 sai.gowtham.ch 0 siblings, 0 replies; 15+ messages in thread From: sai.gowtham.ch @ 2023-06-12 8:59 UTC (permalink / raw) To: igt-dev, zbigniew.kempczynski, sai.gowtham.ch From: Sai Gowtham Ch <sai.gowtham.ch@intel.com> Extending the spin_create implementation and allocator handle support in xe, where it submits dummy work loads to engine. This Implementation is wrapped around vm_bind and unbind as we are supposed to do it manually for xe. Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Signed-off-by: Sai Gowtham Ch <sai.gowtham.ch@intel.com> Sai Gowtham Ch (2): lib/xe/xe_spin: Integrate igt_spin_new with Xe tests/xe/xe_spin_batch: Add new test to exercise igt_spin_new for xe lib/igt_dummyload.c | 38 +++++++-- lib/igt_dummyload.h | 11 +++ lib/xe/xe_spin.c | 96 +++++++++++++++++++++ lib/xe/xe_spin.h | 6 +- tests/meson.build | 1 + tests/xe/xe_spin_batch.c | 180 +++++++++++++++++++++++++++++++++++++++ 6 files changed, 326 insertions(+), 6 deletions(-) create mode 100644 tests/xe/xe_spin_batch.c -- 2.39.1 ^ permalink raw reply [flat|nested] 15+ messages in thread
* [igt-dev] [PATCH i-g-t 0/2] Integrate igt_spin_new with Xe @ 2023-06-06 8:50 sai.gowtham.ch 0 siblings, 0 replies; 15+ messages in thread From: sai.gowtham.ch @ 2023-06-06 8:50 UTC (permalink / raw) To: igt-dev, zbigniew.kempczynski, sai.gowtham.ch From: Sai Gowtham Ch <sai.gowtham.ch@intel.com> Extending the spin_create implementation and allocator handle support in xe, where it submits dummy work loads to engine. This Implementation is wrapped around vm_bind and unbind as we are supposed to do it manually for xe. Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Signed-off-by: Sai Gowtham Ch <sai.gowtham.ch@intel.com> Sai Gowtham Ch (2): lib/xe/xe_spin: Integrate igt_spin_new with Xe tests/xe/xe_spin_batch: Add new test to exercise igt_spin_new for xe lib/igt_dummyload.c | 38 +++++++-- lib/igt_dummyload.h | 11 +++ lib/xe/xe_spin.c | 97 ++++++++++++++++++++++ lib/xe/xe_spin.h | 6 +- tests/meson.build | 1 + tests/xe/xe_spin_batch.c | 168 +++++++++++++++++++++++++++++++++++++++ 6 files changed, 315 insertions(+), 6 deletions(-) create mode 100644 tests/xe/xe_spin_batch.c -- 2.39.1 ^ permalink raw reply [flat|nested] 15+ messages in thread
* [igt-dev] [PATCH i-g-t 0/2] Integrate igt_spin_new with Xe @ 2023-06-04 19:58 sai.gowtham.ch 0 siblings, 0 replies; 15+ messages in thread From: sai.gowtham.ch @ 2023-06-04 19:58 UTC (permalink / raw) To: igt-dev, zbigniew.kempczynski, sai.gowtham.ch, janga.rahul.kumar, kamil.konieczny From: Sai Gowtham Ch <sai.gowtham.ch@intel.com> Extending the spin_create implementation and allocator handle support in xe, where it submits dummy work loads to engine. This Implementation is wrapped around vm_bind and unbind as we are supposed to do it manually for xe. Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Signed-off-by: Sai Gowtham Ch <sai.gowtham.ch@intel.com> Sai Gowtham Ch (2): lib/xe/xe_spin: Integrate igt_spin_new with Xe tests/xe/xe_spin_batch: Add new test to exercise igt_spin_new for xe lib/igt_dummyload.c | 24 ++++-- lib/igt_dummyload.h | 12 +++ lib/xe/xe_spin.c | 121 ++++++++++++++++++++++++++++ lib/xe/xe_spin.h | 6 +- tests/meson.build | 1 + tests/xe/xe_spin_batch.c | 168 +++++++++++++++++++++++++++++++++++++++ 6 files changed, 325 insertions(+), 7 deletions(-) create mode 100644 tests/xe/xe_spin_batch.c -- 2.39.1 ^ permalink raw reply [flat|nested] 15+ messages in thread
* [igt-dev] [PATCH i-g-t 0/2] Integrate igt_spin_new with Xe @ 2023-06-04 19:16 sai.gowtham.ch 0 siblings, 0 replies; 15+ messages in thread From: sai.gowtham.ch @ 2023-06-04 19:16 UTC (permalink / raw) To: igt-dev, zbigniew.kempczynski, sai.gowtham.ch, janga.rahul.kumar, kamil.konieczny From: Sai Gowtham Ch <sai.gowtham.ch@intel.com> Extending the spin_create implementation and allocator handle support in xe, where it submits dummy work loads to engine. This Implementation is wrapped around vm_bind and unbind as we are supposed to do it manually for xe. Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Signed-off-by: Sai Gowtham Ch <sai.gowtham.ch@intel.com> Sai Gowtham Ch (2): lib/xe/xe_spin: Integrate igt_spin_new with Xe tests/xe/xe_spin_batch: Add new test to exercise igt_spin_new for xe lib/igt_dummyload.c | 24 ++++-- lib/igt_dummyload.h | 12 +++ lib/xe/xe_spin.c | 121 ++++++++++++++++++++++++++++ lib/xe/xe_spin.h | 6 +- tests/meson.build | 1 + tests/xe/xe_spin_batch.c | 168 +++++++++++++++++++++++++++++++++++++++ 6 files changed, 325 insertions(+), 7 deletions(-) create mode 100644 tests/xe/xe_spin_batch.c -- 2.39.1 ^ permalink raw reply [flat|nested] 15+ messages in thread
* [igt-dev] [PATCH i-g-t 0/2] Integrate igt_spin_new with Xe. @ 2023-05-30 10:08 sai.gowtham.ch 0 siblings, 0 replies; 15+ messages in thread From: sai.gowtham.ch @ 2023-05-30 10:08 UTC (permalink / raw) To: igt-dev, zbigniew.kempczynski, sai.gowtham.ch From: Sai Gowtham Ch <sai.gowtham.ch@intel.com> Extending the spin_create implementation and allocator handle support in xe, where it submits dummy work loads to engine. This Implementation is wrapped around vm_bind and unbind as we are supposed to do it manually for xe. Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Signed-off-by: Sai Gowtham Ch <sai.gowtham.ch@intel.com> Sai Gowtham Ch (2): lib/xe/xe_spin: Integrate igt_spin_new with Xe. tests/xe/xe_spin_batch: Add new test to exercise igt_spin_new for xe. lib/igt_dummyload.c | 24 ++++-- lib/igt_dummyload.h | 10 +++ lib/xe/xe_spin.c | 91 +++++++++++++++++++++ lib/xe/xe_spin.h | 7 ++ tests/meson.build | 1 + tests/xe/xe_spin_batch.c | 168 +++++++++++++++++++++++++++++++++++++++ 6 files changed, 295 insertions(+), 6 deletions(-) create mode 100644 tests/xe/xe_spin_batch.c -- 2.39.1 ^ permalink raw reply [flat|nested] 15+ messages in thread
* [igt-dev] [PATCH i-g-t 0/2] Integrate igt_spin_new with Xe. @ 2023-05-25 5:55 sai.gowtham.ch 0 siblings, 0 replies; 15+ messages in thread From: sai.gowtham.ch @ 2023-05-25 5:55 UTC (permalink / raw) To: igt-dev, zbigniew.kempczynski, sai.gowtham.ch From: Sai Gowtham Ch <sai.gowtham.ch@intel.com> Extending the spin_create implementation and allocator handle support in xe, where it submits dummy work loads to engine. This Implementation is wrapped around vm_bind and unbind as we are supposed to do it manually for xe. Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Signed-off-by: Sai Gowtham Ch <sai.gowtham.ch@intel.com> Sai Gowtham Ch (2): lib/xe/xe_spin: Integrate igt_spin_new with Xe. tests/xe/xe_spin_batch: Add new test to exercise igt_spin_new for xe. lib/igt_dummyload.c | 24 +++++-- lib/igt_dummyload.h | 10 +++ lib/xe/xe_spin.c | 89 +++++++++++++++++++++++++ lib/xe/xe_spin.h | 7 ++ tests/meson.build | 1 + tests/xe/xe_spin_batch.c | 138 +++++++++++++++++++++++++++++++++++++++ 6 files changed, 263 insertions(+), 6 deletions(-) create mode 100644 tests/xe/xe_spin_batch.c -- 2.39.1 ^ permalink raw reply [flat|nested] 15+ messages in thread
* [igt-dev] [PATCH i-g-t 0/2] Integrate igt_spin_new with Xe. @ 2023-05-22 12:36 sai.gowtham.ch 0 siblings, 0 replies; 15+ messages in thread From: sai.gowtham.ch @ 2023-05-22 12:36 UTC (permalink / raw) To: igt-dev, zbigniew.kempczynski, sai.gowtham.ch From: Sai Gowtham Ch <sai.gowtham.ch@intel.com> Extending the spin_create implementation and allocator handle support in xe, where it submits dummy work loads to engine. This Implementation is wrapped around vm_bind and unbind as we are supposed to do it manually for xe. Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Signed-off-by: Sai Gowtham Ch <sai.gowtham.ch@intel.com> Sai Gowtham Ch (2): lib/xe/xe_spin: Integrate igt_spin_new with Xe. tests/xe/xe_spin_batch: Add new test to exercise igt_spin_new for xe. lib/igt_dummyload.c | 24 ++++++--- lib/igt_dummyload.h | 11 ++++ lib/xe/xe_spin.c | 68 +++++++++++++++++++++++ lib/xe/xe_spin.h | 7 +++ tests/meson.build | 1 + tests/xe/xe_spin_batch.c | 113 +++++++++++++++++++++++++++++++++++++++ 6 files changed, 218 insertions(+), 6 deletions(-) create mode 100644 tests/xe/xe_spin_batch.c -- 2.39.1 ^ permalink raw reply [flat|nested] 15+ messages in thread
end of thread, other threads:[~2023-06-15 11:00 UTC | newest] Thread overview: 15+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2023-06-13 12:42 [igt-dev] [PATCH i-g-t 0/2] Integrate igt_spin_new with Xe sai.gowtham.ch 2023-06-13 12:42 ` [igt-dev] [PATCH i-g-t 1/2] lib/xe/xe_spin: " sai.gowtham.ch 2023-06-14 17:33 ` Zbigniew Kempczyński 2023-06-13 12:42 ` [igt-dev] [PATCH i-g-t 2/2] tests/xe/xe_spin_batch: Add new test to exercise igt_spin_new for xe sai.gowtham.ch 2023-06-14 17:43 ` Zbigniew Kempczyński 2023-06-13 13:39 ` [igt-dev] ✓ Fi.CI.BAT: success for Integrate igt_spin_new with Xe (rev5) Patchwork 2023-06-13 14:56 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork -- strict thread matches above, loose matches on Subject: below -- 2023-06-15 10:59 [igt-dev] [PATCH i-g-t 0/2] Integrate igt_spin_new with Xe sai.gowtham.ch 2023-06-12 8:59 sai.gowtham.ch 2023-06-06 8:50 sai.gowtham.ch 2023-06-04 19:58 sai.gowtham.ch 2023-06-04 19:16 sai.gowtham.ch 2023-05-30 10:08 sai.gowtham.ch 2023-05-25 5:55 sai.gowtham.ch 2023-05-22 12:36 sai.gowtham.ch
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