* [PATCH v3 0/4] lib/gpgpu_shader: simplify load/store shaders and add Xe3 support
@ 2024-11-21 17:12 Andrzej Hajda
2024-11-21 17:12 ` [PATCH v3 1/4] scripts/generate_iga64_codes: add iga64_macros.h to checksum calculation Andrzej Hajda
` (7 more replies)
0 siblings, 8 replies; 15+ messages in thread
From: Andrzej Hajda @ 2024-11-21 17:12 UTC (permalink / raw)
To: igt-dev
Cc: Dominik Grzegorzek, Zbigniew Kempczyński, Gwan-gyeong Mun,
Kamil Konieczny, Christoph Manszewski, Andrzej Hajda
The patchset tries to simplify and unify iga64 load/store assemblies.
Moreover it adds support for Xe3 platforms (PTL).
v2:
- addressed comments to v1, details in patches
v3:
- added passing surface descriptor via COMPUTE_WALKER/inline_data,
required for stateless load/stores in Xe3.
- added support for Xe3 platforms.
Signed-off-by: Andrzej Hajda <andrzej.hajda@intel.com>
---
- Link to v1: https://lore.kernel.org/r/20241114-gpgpu_send_rework-v1-0-e0914e09e7b2@intel.com
- Link to v2: https://lore.kernel.org/r/20241115-gpgpu_send_rework-v2-0-d1c84135aaaf@intel.com
---
Andrzej Hajda (4):
scripts/generate_iga64_codes: add iga64_macros.h to checksum calculation
lib/gpgpu_shader: simplify load/store shaders
lib/gpgpu_shader: pass surface desription to shaders via inline data
lib/gpgpu_shader: add support for Xe3 platforms
lib/gpgpu_shader.c | 188 +++++++------------------
lib/iga64_generated_codes.c | 329 +++++++++++++++++++++----------------------
lib/iga64_macros.h | 77 +++++++++-
lib/meson.build | 1 +
scripts/generate_iga64_codes | 2 +-
5 files changed, 285 insertions(+), 312 deletions(-)
---
base-commit: 190dec96be5487f86c45b7e6cf11b8174ebabf31
change-id: 20241106-gpgpu_send_rework-817a3e4f464e
Best regards,
--
Andrzej Hajda <andrzej.hajda@intel.com>
^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH v3 1/4] scripts/generate_iga64_codes: add iga64_macros.h to checksum calculation 2024-11-21 17:12 [PATCH v3 0/4] lib/gpgpu_shader: simplify load/store shaders and add Xe3 support Andrzej Hajda @ 2024-11-21 17:12 ` Andrzej Hajda 2024-11-21 17:12 ` [PATCH v3 2/4] lib/gpgpu_shader: simplify load/store shaders Andrzej Hajda ` (6 subsequent siblings) 7 siblings, 0 replies; 15+ messages in thread From: Andrzej Hajda @ 2024-11-21 17:12 UTC (permalink / raw) To: igt-dev Cc: Dominik Grzegorzek, Zbigniew Kempczyński, Gwan-gyeong Mun, Kamil Konieczny, Christoph Manszewski, Andrzej Hajda Since generated code depends on iga64_macros.h assemblies should be recompiled on it's change as well. v2: - added warning to iga64_macros.h (Zbigniew) Signed-off-by: Andrzej Hajda <andrzej.hajda@intel.com> Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> --- lib/iga64_generated_codes.c | 2 +- lib/iga64_macros.h | 5 ++++- lib/meson.build | 1 + scripts/generate_iga64_codes | 2 +- 4 files changed, 7 insertions(+), 3 deletions(-) diff --git a/lib/iga64_generated_codes.c b/lib/iga64_generated_codes.c index 6638be07b356..41be66f74486 100644 --- a/lib/iga64_generated_codes.c +++ b/lib/iga64_generated_codes.c @@ -3,7 +3,7 @@ #include "gpgpu_shader.h" -#define MD5_SUM_IGA64_ASMS ec9d477415eebb7d6983395f1bcde78f +#define MD5_SUM_IGA64_ASMS 09d72b5fd1f62c8c2905caa80f400567 struct iga64_template const iga64_code_gpgpu_fill[] = { { .gen_ver = 2000, .size = 44, .code = (const uint32_t []) { diff --git a/lib/iga64_macros.h b/lib/iga64_macros.h index 03cc726d48c2..6459b524c3fd 100644 --- a/lib/iga64_macros.h +++ b/lib/iga64_macros.h @@ -1,7 +1,10 @@ /* SPDX-License-Identifier: MIT */ /* Copyright © 2024 Intel Corporation */ -/* Header used during pre-process phase of iga64 assembly. */ +/* Header used during pre-process phase of iga64 assembly. + * WARNING: changing this file causes rebuild of all shaders. + * Do not touch without current version of iga64 compiler. + */ #ifndef IGA64_MACROS_H #define IGA64_MACROS_H diff --git a/lib/meson.build b/lib/meson.build index c3556a921adf..cec148388b77 100644 --- a/lib/meson.build +++ b/lib/meson.build @@ -248,6 +248,7 @@ iga64_generated_codes = custom_target( 'iga64_generated_codes.c', input : [ 'iga64_generated_codes.c' ] + iga64_assembly_libs, output : 'iga64_generated_codes.c', + depend_files : 'iga64_macros.h', command : [ generate_iga64_codes, '-o', '@OUTPUT@', '-i', '@INPUT@' ] ) diff --git a/scripts/generate_iga64_codes b/scripts/generate_iga64_codes index bbf1f7008242..652bf01a080c 100755 --- a/scripts/generate_iga64_codes +++ b/scripts/generate_iga64_codes @@ -40,7 +40,7 @@ while read -d $'\0' asm; do done < <(for f in $LIBS; do objcopy --dump-section .iga64_assembly=/dev/stdout $f.p/*.o /dev/null; done) # check if we need to recompile - checksum difference and compiler present -MD5_ASMS="$(md5sum <<< "${ASMS[@]}" | cut -b1-32)" +MD5_ASMS="$(md5sum <<< "$(< ../lib/iga64_macros.h) ${ASMS[@]}" | cut -b1-32)" MD5_PRE="$(grep -Po '(?<=^#define MD5_SUM_IGA64_ASMS )\S{32,32}' $INPUT 2>/dev/null)" if [ "$MD5_ASMS" = "$MD5_PRE" ]; then -- 2.34.1 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v3 2/4] lib/gpgpu_shader: simplify load/store shaders 2024-11-21 17:12 [PATCH v3 0/4] lib/gpgpu_shader: simplify load/store shaders and add Xe3 support Andrzej Hajda 2024-11-21 17:12 ` [PATCH v3 1/4] scripts/generate_iga64_codes: add iga64_macros.h to checksum calculation Andrzej Hajda @ 2024-11-21 17:12 ` Andrzej Hajda 2024-11-22 14:05 ` Grzegorzek, Dominik 2024-11-21 17:12 ` [PATCH v3 3/4] lib/gpgpu_shader: pass surface desription to shaders via inline data Andrzej Hajda ` (5 subsequent siblings) 7 siblings, 1 reply; 15+ messages in thread From: Andrzej Hajda @ 2024-11-21 17:12 UTC (permalink / raw) To: igt-dev Cc: Dominik Grzegorzek, Zbigniew Kempczyński, Gwan-gyeong Mun, Kamil Konieczny, Christoph Manszewski, Andrzej Hajda There is lot of redundancy in shaders code regarding load/store messages. It makes the code barely readable. Simplify it by using macros in iga64 assembler. Every load/store operation is split into two phases: 1. Load address/descriptor (from) where data should be stored/loaded. 2. Issue load/store instruction. Shader threads needs two types of memory access: 3. Private area per thread. 4. Area shared per all threads. Different platforms access surface in different ways: 5. Using media block messages. 6. Using untyped 2d block messages. 7. Future platforms will use different messages. All this is simplified to two macros per message in shader: load_(shared|thread)_space_addr(dst,y,width) (load|store)_space_dw(dst, src) v2: - captialze introduced macros (Dominik) - fixed thread -> shared call (Zbigniew) Signed-off-by: Andrzej Hajda <andrzej.hajda@intel.com> --- lib/gpgpu_shader.c | 160 +++------------------- lib/iga64_generated_codes.c | 318 +++++++++++++++++++++----------------------- lib/iga64_macros.h | 43 ++++++ 3 files changed, 215 insertions(+), 306 deletions(-) diff --git a/lib/gpgpu_shader.c b/lib/gpgpu_shader.c index 4e1b8d5e9009..363435e7efd3 100644 --- a/lib/gpgpu_shader.c +++ b/lib/gpgpu_shader.c @@ -431,22 +431,8 @@ void gpgpu_shader__jump_neq(struct gpgpu_shader *shdr, int label_id, size = emit_iga64_code(shdr, jump_dw_neq, " \n\ L0: \n\ -(W) mov (16|M0) r30.0<1>:ud 0x0:ud \n\ -#if GEN_VER < 2000 // Media Block Write \n\ - // Y offset of the block in rows := thread group id Y \n\ -(W) mov (1|M0) r30.1<1>:ud ARG(0):ud \n\ - // block width [0,63] representing 1 to 64 bytes, we want dword \n\ -(W) mov (1|M0) r30.2<1>:ud 0x3:ud \n\ - // FFTID := FFTID from R0 header \n\ -(W) mov (1|M0) r30.4<1>:ud r0.5<0;1,0>:ud \n\ -(W) send.dc1 (16|M0) r31 r30 null 0x0 0x2190000 \n\ -#else // Typed 2D Block Store \n\ - // Store X and Y block start (160:191 and 192:223) \n\ -(W) mov (1|M0) r30.6<1>:ud ARG(0):ud \n\ - // Store X and Y block size (224:231 and 232:239) \n\ -(W) mov (1|M0) r30.7<1>:ud 0x3:ud \n\ -(W) send.tgm (16|M0) r31 r30 null:0 0x0 0x62100003 \n\ -#endif \n\ + SET_SHARED_SPACE_ADDR(r30, ARG(0):ud, 4) \n\ +(W) LOAD_SPACE_DW(r31, r30) \n\ // clear the flag register \n\ (W) mov (1|M0) f0.0<1>:ud 0x0:ud \n\ (W) cmp (1|M0) (ne)f0.0 null<1>:ud r31.0<0;1,0>:ud ARG(1):ud \n\ @@ -511,28 +497,13 @@ void gpgpu_shader__common_target_write(struct gpgpu_shader *shdr, uint32_t y_offset, const uint32_t value[4]) { emit_iga64_code(shdr, common_target_write, " \n\ -(W) mov (16|M0) r30.0<1>:ud 0x0:ud \n\ (W) mov (16|M0) r31.0<1>:ud 0x0:ud \n\ (W) mov (1|M0) r31.0<1>:ud ARG(1):ud \n\ (W) mov (1|M0) r31.1<1>:ud ARG(2):ud \n\ (W) mov (1|M0) r31.2<1>:ud ARG(3):ud \n\ (W) mov (1|M0) r31.3<1>:ud ARG(4):ud \n\ -#if GEN_VER < 2000 // Media Block Write \n\ - // Y offset of the block in rows \n\ -(W) mov (1|M0) r30.1<1>:ud ARG(0):ud \n\ - // block width [0,63] representing 1 to 64 bytes \n\ -(W) mov (1|M0) r30.2<1>:ud 0xf:ud \n\ - // FFTID := FFTID from R0 header \n\ -(W) mov (1|M0) r30.4<1>:ud r0.5<0;1,0>:ud \n\ - // written value \n\ -(W) send.dc1 (16|M0) null r30 src1_null 0x0 0x40A8000 \n\ -#else // Typed 2D Block Store \n\ - // Store X and Y block start (160:191 and 192:223) \n\ -(W) mov (1|M0) r30.6<1>:ud ARG(0):ud \n\ - // Store X and Y block size (224:231 and 232:239) \n\ -(W) mov (1|M0) r30.7<1>:ud 0xf:ud \n\ -(W) send.tgm (16|M0) null r30 null:0 0x0 0x64000007 \n\ -#endif \n\ + SET_SHARED_SPACE_ADDR(r30, ARG(0):ud, 16) \n\ +(W) STORE_SPACE_DW(r30, r31) \n\ ", y_offset, value[0], value[1], value[2], value[3]); } @@ -565,31 +536,8 @@ void gpgpu_shader__write_aip(struct gpgpu_shader *shdr, uint32_t y_offset) emit_iga64_code(shdr, media_block_write_aip, " \n\ // Payload \n\ (W) mov (1|M0) r5.0<1>:ud cr0.2:ud \n\ -#if GEN_VER < 2000 // Media Block Write \n\ - // X offset of the block in bytes := (thread group id X << ARG(0)) \n\ -(W) shl (1|M0) r4.0<1>:ud r0.1<0;1,0>:ud 0x2:ud \n\ - // Y offset of the block in rows := thread group id Y \n\ -(W) mov (1|M0) r4.1<1>:ud r0.6<0;1,0>:ud \n\ -(W) add (1|M0) r4.1<1>:ud r4.1<0;1,0>:ud ARG(0):ud \n\ - // block width [0,63] representing 1 to 64 bytes \n\ -(W) mov (1|M0) r4.2<1>:ud 0x3:ud \n\ - // FFTID := FFTID from R0 header \n\ -(W) mov (1|M0) r4.4<1>:ud r0.5<0;1,0>:ud \n\ -(W) send.dc1 (16|M0) null r4 src1_null 0 0x40A8000 \n\ -#else // Typed 2D Block Store \n\ - // Load r2.0-3 with tg id X << ARG(0) \n\ -(W) shl (1|M0) r2.0<1>:ud r0.1<0;1,0>:ud 0x2:ud \n\ - // Load r2.4-7 with tg id Y + ARG(1):ud \n\ -(W) mov (1|M0) r2.1<1>:ud r0.6<0;1,0>:ud \n\ -(W) add (1|M0) r2.1<1>:ud r2.1<0;1,0>:ud ARG(0):ud \n\ - // payload setup \n\ -(W) mov (16|M0) r4.0<1>:ud 0x0:ud \n\ - // Store X and Y block start (160:191 and 192:223) \n\ -(W) mov (2|M0) r4.5<1>:ud r2.0<2;2,1>:ud \n\ - // Store X and Y block max_size (224:231 and 232:239) \n\ -(W) mov (1|M0) r4.7<1>:ud 0x3:ud \n\ -(W) send.tgm (16|M0) null r4 null:0 0 0x64000007 \n\ -#endif \n\ + SET_THREAD_SPACE_ADDR(r4, 0, ARG(0):ud, 4) \n\ +(W) STORE_SPACE_DW(r4, r5) \n\ ", y_offset); } @@ -618,38 +566,11 @@ void gpgpu_shader__increase_aip(struct gpgpu_shader *shdr, uint32_t value) void gpgpu_shader__write_dword(struct gpgpu_shader *shdr, uint32_t value, uint32_t y_offset) { - emit_iga64_code(shdr, media_block_write, " \n\ - // Clear message header \n\ -(W) mov (16|M0) r4.0<1>:ud 0x0:ud \n\ - // Payload \n\ -(W) mov (1|M0) r5.0<1>:ud ARG(3):ud \n\ -(W) mov (1|M0) r5.1<1>:ud ARG(4):ud \n\ -(W) mov (1|M0) r5.2<1>:ud ARG(5):ud \n\ -(W) mov (1|M0) r5.3<1>:ud ARG(6):ud \n\ -#if GEN_VER < 2000 // Media Block Write \n\ - // X offset of the block in bytes := (thread group id X << ARG(0)) \n\ -(W) shl (1|M0) r4.0<1>:ud r0.1<0;1,0>:ud ARG(0):ud \n\ - // Y offset of the block in rows := thread group id Y \n\ -(W) mov (1|M0) r4.1<1>:ud r0.6<0;1,0>:ud \n\ -(W) add (1|M0) r4.1<1>:ud r4.1<0;1,0>:ud ARG(1):ud \n\ - // block width [0,63] representing 1 to 64 bytes \n\ -(W) mov (1|M0) r4.2<1>:ud ARG(2):ud \n\ - // FFTID := FFTID from R0 header \n\ -(W) mov (1|M0) r4.4<1>:ud r0.5<0;1,0>:ud \n\ -(W) send.dc1 (16|M0) null r4 src1_null 0 0x40A8000 \n\ -#else // Typed 2D Block Store \n\ - // Load r2.0-3 with tg id X << ARG(0) \n\ -(W) shl (1|M0) r2.0<1>:ud r0.1<0;1,0>:ud ARG(0):ud \n\ - // Load r2.4-7 with tg id Y + ARG(1):ud \n\ -(W) mov (1|M0) r2.1<1>:ud r0.6<0;1,0>:ud \n\ -(W) add (1|M0) r2.1<1>:ud r2.1<0;1,0>:ud ARG(1):ud \n\ - // Store X and Y block start (160:191 and 192:223) \n\ -(W) mov (2|M0) r4.5<1>:ud r2.0<2;2,1>:ud \n\ - // Store X and Y block max_size (224:231 and 232:239) \n\ -(W) mov (1|M0) r4.7<1>:ud ARG(2):ud \n\ -(W) send.tgm (16|M0) null r4 null:0 0 0x64000007 \n\ -#endif \n\ - ", 2, y_offset, 3, value, value, value, value); + emit_iga64_code(shdr, media_block_write, " \n\ +(W) mov (1) r5.0<1>:ud ARG(1):ud \n\ + SET_THREAD_SPACE_ADDR(r4, 0, ARG(0):ud, 4) \n\ +(W) STORE_SPACE_DW(r4, r5) \n\ + ", y_offset, value); } /** @@ -697,41 +618,14 @@ void gpgpu_shader__write_on_exception(struct gpgpu_shader *shdr, uint32_t value, uint32_t y_offset, uint32_t mask, uint32_t expected) { emit_iga64_code(shdr, write_on_exception, " \n\ - // Clear message header \n\ -(W) mov (16|M0) r4.0<1>:ud 0x0:ud \n\ - // Payload \n\ -(W) mov (1|M0) r5.0<1>:ud ARG(4):ud \n\ -#if GEN_VER < 2000 // prepare Media Block Write \n\ - // X offset of the block in bytes := (thread group id X << ARG(0)) \n\ -(W) add (1|M0) r4.0<1>:ud r0.1<0;1,0>:ud ARG(1):ud \n\ -(W) shl (1|M0) r4.0<1>:ud r4.0<0;1,0>:ud ARG(0):ud \n\ - // Y offset of the block in rows := thread group id Y \n\ -(W) add (1|M0) r4.1<1>:ud r0.6<0;1,0>:ud ARG(2):ud \n\ - // block width [0,63] representing 1 to 64 bytes \n\ -(W) mov (1|M0) r4.2<1>:ud ARG(3):ud \n\ - // FFTID := FFTID from R0 header \n\ -(W) mov (1|M0) r4.4<1>:ud r0.5<0;1,0>:ud \n\ -#else // prepare Typed 2D Block Store \n\ - // Load r2.0 with tg id (X + ARG(1)) << ARG(0) \n\ -(W) add (1|M0) r2.0<1>:ud r0.1<0;1,0>:ud ARG(1):ud \n\ -(W) shl (1|M0) r2.0<1>:ud r2.0<0;1,0>:ud ARG(0):ud \n\ - // Load r2.4-7 with tg id Y + ARG(2):ud \n\ -(W) add (1|M0) r2.1<1>:ud r0.6<0;1,0>:ud ARG(2):ud \n\ - // Store X and Y block start (160:191 and 192:223) \n\ -(W) mov (2|M0) r4.5<1>:ud r2.0<2;2,1>:ud \n\ - // Store X and Y block max_size (224:231 and 232:239) \n\ -(W) mov (1|M0) r4.7<1>:ud ARG(3):ud \n\ -#endif \n\ +(W) mov (1|M0) r5.0<1>:ud ARG(2):ud \n\ + SET_THREAD_SPACE_ADDR(r4, ARG(0), ARG(1):ud, 4) \n\ // Check if masked exception is equal to provided value and write conditionally \n\ -(W) and (1|M0) r3.0<1>:ud cr0.1<0;1,0>:ud ARG(5):ud \n\ -(W) mov (1|M0) f0.0<1>:ud 0x0:ud \n\ -(W) cmp (1|M0) (eq)f0.0 null:ud r3.0<0;1,0>:ud ARG(6):ud \n\ -#if GEN_VER < 2000 // Media Block Write \n\ -(W&f0.0) send.dc1 (16|M0) null r4 src1_null 0 0x40A8000 \n\ -#else // Typed 2D Block Store \n\ -(W&f0.0) send.tgm (16|M0) null r4 null:0 0 0x64000007 \n\ -#endif \n\ - ", 2, x_offset, y_offset, 3, value, mask, expected); +(W) and (1|M0) r3.0<1>:ud cr0.1<0;1,0>:ud ARG(3):ud \n\ +(W) mov (1|M0) f0.0<1>:ud 0x0:ud \n\ +(W) cmp (1|M0) (eq)f0.0 null:ud r3.0<0;1,0>:ud ARG(4):ud \n\ +(W&f0.0) STORE_SPACE_DW(r4, r5) \n\ + ", 4 * x_offset, y_offset, value, mask, expected); } /** @@ -778,22 +672,8 @@ void gpgpu_shader__end_system_routine_step_if_eq(struct gpgpu_shader *shdr, emit_iga64_code(shdr, end_system_routine_step_if_eq, " \n\ (W) or (1|M0) cr0.0<1>:ud cr0.0<0;1,0>:ud 0x8000:ud \n\ (W) and (1|M0) cr0.1<1>:ud cr0.1<0;1,0>:ud ARG(0):ud \n\ -(W) mov (16|M0) r30.0<1>:ud 0x0:ud \n\ -#if GEN_VER < 2000 // Media Block Write \n\ - // Y offset of the block in rows := thread group id Y \n\ -(W) mov (1|M0) r30.1<1>:ud ARG(1):ud \n\ - // block width [0,63] representing 1 to 64 bytes, we want dword \n\ -(W) mov (1|M0) r30.2<1>:ud 0x3:ud \n\ - // FFTID := FFTID from R0 header \n\ -(W) mov (1|M0) r30.4<1>:ud r0.5<0;1,0>:ud \n\ -(W) send.dc1 (16|M0) r31 r30 null 0x0 0x2190000 \n\ -#else // Typed 2D Block Store \n\ - // Store X and Y block start (160:191 and 192:223) \n\ -(W) mov (1|M0) r30.6<1>:ud ARG(1):ud \n\ - // Store X and Y block size (224:231 and 232:239) \n\ -(W) mov (1|M0) r30.7<1>:ud 0x3:ud \n\ -(W) send.tgm (16|M0) r31 r30 null:0 0x0 0x62100003 \n\ -#endif \n\ + SET_SHARED_SPACE_ADDR(r30, ARG(0):ud, 4) \n\ +(W) LOAD_SPACE_DW(r31, r30) \n\ // clear the flag register \n\ (W) mov (1|M0) f0.0<1>:ud 0x0:ud \n\ (W) cmp (1|M0) (ne)f0.0 null<1>:ud r31.0<0;1,0>:ud ARG(2):ud \n\ diff --git a/lib/iga64_generated_codes.c b/lib/iga64_generated_codes.c index 41be66f74486..04015b0b6d29 100644 --- a/lib/iga64_generated_codes.c +++ b/lib/iga64_generated_codes.c @@ -3,7 +3,7 @@ #include "gpgpu_shader.h" -#define MD5_SUM_IGA64_ASMS 09d72b5fd1f62c8c2905caa80f400567 +#define MD5_SUM_IGA64_ASMS da66be3cf9bec819a61429de75943011 struct iga64_template const iga64_code_gpgpu_fill[] = { { .gen_ver = 2000, .size = 44, .code = (const uint32_t []) { @@ -83,10 +83,10 @@ struct iga64_template const iga64_code_end_system_routine_step_if_eq[] = { { .gen_ver = 2000, .size = 44, .code = (const uint32_t []) { 0x80000966, 0x80018220, 0x02008000, 0x00008000, 0x80000965, 0x80118220, 0x02008010, 0xc0ded000, - 0x80100961, 0x1e054220, 0x00000000, 0x00000000, - 0x80000061, 0x1e654220, 0x00000000, 0xc0ded001, + 0x800c0961, 0x1e054220, 0x00000000, 0x00000000, + 0x80000061, 0x1e654220, 0x00000000, 0xc0ded000, 0x80000061, 0x1e754220, 0x00000000, 0x00000003, - 0x80132031, 0x1f0c0000, 0xd0061e8c, 0x04000000, + 0x80032031, 0x1f0c0000, 0xd0061e8c, 0x04000000, 0x80000061, 0x30014220, 0x00000000, 0x00000000, 0x80008070, 0x00018220, 0x22001f04, 0xc0ded002, 0x84000965, 0x80118220, 0x02008010, 0xc0ded003, @@ -96,12 +96,12 @@ struct iga64_template const iga64_code_end_system_routine_step_if_eq[] = { { .gen_ver = 1270, .size = 52, .code = (const uint32_t []) { 0x80000966, 0x80018220, 0x02008000, 0x00008000, 0x80000965, 0x80218220, 0x02008020, 0xc0ded000, - 0x80040961, 0x1e054220, 0x00000000, 0x00000000, - 0x80000061, 0x1e254220, 0x00000000, 0xc0ded001, + 0x80030961, 0x1e054220, 0x00000000, 0x00000000, + 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, 0x80000061, 0x1e454220, 0x00000000, 0x00000003, 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, 0x80001901, 0x00010000, 0x00000000, 0x00000000, - 0x80044031, 0x1f0c0000, 0xc0001e0c, 0x02400000, + 0x80004031, 0x1f0c0000, 0xc0001e0c, 0x02400000, 0x80000061, 0x30014220, 0x00000000, 0x00000000, 0x80002070, 0x00018220, 0x22001f04, 0xc0ded002, 0x81000965, 0x80218220, 0x02008020, 0xc0ded003, @@ -111,11 +111,11 @@ struct iga64_template const iga64_code_end_system_routine_step_if_eq[] = { { .gen_ver = 1260, .size = 48, .code = (const uint32_t []) { 0x80000966, 0x80018220, 0x02008000, 0x00008000, 0x80000965, 0x80118220, 0x02008010, 0xc0ded000, - 0x80100961, 0x1e054220, 0x00000000, 0x00000000, - 0x80000061, 0x1e154220, 0x00000000, 0xc0ded001, + 0x800c0961, 0x1e054220, 0x00000000, 0x00000000, + 0x80000061, 0x1e154220, 0x00000000, 0xc0ded000, 0x80000061, 0x1e254220, 0x00000000, 0x00000003, 0x80000061, 0x1e450220, 0x00000054, 0x00000000, - 0x80132031, 0x1f0c0000, 0xc0001e0c, 0x02400000, + 0x80032031, 0x1f0c0000, 0xc0001e0c, 0x02400000, 0x80000061, 0x30014220, 0x00000000, 0x00000000, 0x80008070, 0x00018220, 0x22001f04, 0xc0ded002, 0x84000965, 0x80118220, 0x02008010, 0xc0ded003, @@ -125,12 +125,12 @@ struct iga64_template const iga64_code_end_system_routine_step_if_eq[] = { { .gen_ver = 1250, .size = 52, .code = (const uint32_t []) { 0x80000966, 0x80018220, 0x02008000, 0x00008000, 0x80000965, 0x80218220, 0x02008020, 0xc0ded000, - 0x80040961, 0x1e054220, 0x00000000, 0x00000000, - 0x80000061, 0x1e254220, 0x00000000, 0xc0ded001, + 0x80030961, 0x1e054220, 0x00000000, 0x00000000, + 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, 0x80000061, 0x1e454220, 0x00000000, 0x00000003, 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, 0x80001901, 0x00010000, 0x00000000, 0x00000000, - 0x80044031, 0x1f0c0000, 0xc0001e0c, 0x02400000, + 0x80004031, 0x1f0c0000, 0xc0001e0c, 0x02400000, 0x80000061, 0x30014220, 0x00000000, 0x00000000, 0x80002070, 0x00018220, 0x22001f04, 0xc0ded002, 0x81000965, 0x80218220, 0x02008020, 0xc0ded003, @@ -140,11 +140,11 @@ struct iga64_template const iga64_code_end_system_routine_step_if_eq[] = { { .gen_ver = 0, .size = 48, .code = (const uint32_t []) { 0x80000166, 0x80018220, 0x02008000, 0x00008000, 0x80000165, 0x80218220, 0x02008020, 0xc0ded000, - 0x80040161, 0x1e054220, 0x00000000, 0x00000000, - 0x80000061, 0x1e254220, 0x00000000, 0xc0ded001, + 0x80030161, 0x1e054220, 0x00000000, 0x00000000, + 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, 0x80000061, 0x1e454220, 0x00000000, 0x00000003, 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, - 0x80049031, 0x1f0c0000, 0xc0001e0c, 0x02400000, + 0x80009031, 0x1f0c0000, 0xc0001e0c, 0x02400000, 0x80000061, 0x30014220, 0x00000000, 0x00000000, 0x80002070, 0x00018220, 0x22001f04, 0xc0ded002, 0x81000165, 0x80218220, 0x02008020, 0xc0ded003, @@ -193,84 +193,83 @@ struct iga64_template const iga64_code_breakpoint_suppress[] = { }; struct iga64_template const iga64_code_write_on_exception[] = { - { .gen_ver = 2000, .size = 56, .code = (const uint32_t []) { - 0x80100061, 0x04054220, 0x00000000, 0x00000000, - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, - 0x80000040, 0x02058220, 0x02000014, 0xc0ded001, - 0x80001969, 0x02058220, 0x02000204, 0xc0ded000, - 0x80000040, 0x02158220, 0x02000064, 0xc0ded002, - 0x80041961, 0x04550220, 0x00220205, 0x00000000, - 0x80000061, 0x04754220, 0x00000000, 0xc0ded003, - 0x80000965, 0x03058220, 0x02008010, 0xc0ded005, + { .gen_ver = 2000, .size = 52, .code = (const uint32_t []) { + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, + 0x800c0061, 0x04054220, 0x00000000, 0x00000000, + 0x80000069, 0x04558220, 0x02000014, 0x00000002, + 0x80001940, 0x04558220, 0x02000454, 0xc0ded000, + 0x80000040, 0x04658220, 0x02000064, 0xc0ded001, + 0x80000061, 0x04754220, 0x00000000, 0x00000003, + 0x80000965, 0x03058220, 0x02008010, 0xc0ded003, 0x80000961, 0x30014220, 0x00000000, 0x00000000, - 0x80001a70, 0x00018220, 0x12000304, 0xc0ded006, - 0x84132031, 0x00000000, 0xd00e0494, 0x04000000, + 0x80001a70, 0x00018220, 0x12000304, 0xc0ded004, + 0x84032031, 0x00000000, 0xd00e0494, 0x04000000, 0x80000001, 0x00010000, 0x20000000, 0x00000000, 0x80000001, 0x00010000, 0x30000000, 0x00000000, 0x80000901, 0x00010000, 0x00000000, 0x00000000, }}, { .gen_ver = 1270, .size = 60, .code = (const uint32_t []) { - 0x80040061, 0x04054220, 0x00000000, 0x00000000, - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, - 0x80000040, 0x04058220, 0x02000024, 0xc0ded001, - 0x80001969, 0x04058220, 0x02000404, 0xc0ded000, - 0x80000040, 0x04258220, 0x020000c4, 0xc0ded002, - 0x80000061, 0x04454220, 0x00000000, 0xc0ded003, + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, + 0x80030061, 0x04054220, 0x00000000, 0x00000000, + 0x80000069, 0x04058220, 0x02000024, 0x00000002, + 0x80001940, 0x04058220, 0x02000404, 0xc0ded000, + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded001, + 0x80000061, 0x04454220, 0x00000000, 0x00000003, 0x80000061, 0x04850220, 0x000000a4, 0x00000000, - 0x80000965, 0x03058220, 0x02008020, 0xc0ded005, + 0x80000965, 0x03058220, 0x02008020, 0xc0ded003, 0x80000961, 0x30014220, 0x00000000, 0x00000000, - 0x80001a70, 0x00018220, 0x12000304, 0xc0ded006, + 0x80001a70, 0x00018220, 0x12000304, 0xc0ded004, 0x80001901, 0x00010000, 0x00000000, 0x00000000, - 0x81044031, 0x00000000, 0xc0000414, 0x02a00000, + 0x81004031, 0x00000000, 0xc0000414, 0x02a00000, 0x80000001, 0x00010000, 0x20000000, 0x00000000, 0x80000001, 0x00010000, 0x30000000, 0x00000000, 0x80000901, 0x00010000, 0x00000000, 0x00000000, }}, { .gen_ver = 1260, .size = 56, .code = (const uint32_t []) { - 0x80100061, 0x04054220, 0x00000000, 0x00000000, - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, - 0x80000040, 0x04058220, 0x02000014, 0xc0ded001, - 0x80001969, 0x04058220, 0x02000404, 0xc0ded000, - 0x80000040, 0x04158220, 0x02000064, 0xc0ded002, - 0x80000061, 0x04254220, 0x00000000, 0xc0ded003, + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, + 0x800c0061, 0x04054220, 0x00000000, 0x00000000, + 0x80000069, 0x04058220, 0x02000014, 0x00000002, + 0x80001940, 0x04058220, 0x02000404, 0xc0ded000, + 0x80000040, 0x04158220, 0x02000064, 0xc0ded001, + 0x80000061, 0x04254220, 0x00000000, 0x00000003, 0x80000061, 0x04450220, 0x00000054, 0x00000000, - 0x80000965, 0x03058220, 0x02008010, 0xc0ded005, + 0x80000965, 0x03058220, 0x02008010, 0xc0ded003, 0x80000961, 0x30014220, 0x00000000, 0x00000000, - 0x80001a70, 0x00018220, 0x12000304, 0xc0ded006, - 0x84132031, 0x00000000, 0xc0000414, 0x02a00000, + 0x80001a70, 0x00018220, 0x12000304, 0xc0ded004, + 0x84032031, 0x00000000, 0xc0000414, 0x02a00000, 0x80000001, 0x00010000, 0x20000000, 0x00000000, 0x80000001, 0x00010000, 0x30000000, 0x00000000, 0x80000901, 0x00010000, 0x00000000, 0x00000000, }}, { .gen_ver = 1250, .size = 60, .code = (const uint32_t []) { - 0x80040061, 0x04054220, 0x00000000, 0x00000000, - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, - 0x80000040, 0x04058220, 0x02000024, 0xc0ded001, - 0x80001969, 0x04058220, 0x02000404, 0xc0ded000, - 0x80000040, 0x04258220, 0x020000c4, 0xc0ded002, - 0x80000061, 0x04454220, 0x00000000, 0xc0ded003, + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, + 0x80030061, 0x04054220, 0x00000000, 0x00000000, + 0x80000069, 0x04058220, 0x02000024, 0x00000002, + 0x80001940, 0x04058220, 0x02000404, 0xc0ded000, + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded001, + 0x80000061, 0x04454220, 0x00000000, 0x00000003, 0x80000061, 0x04850220, 0x000000a4, 0x00000000, - 0x80000965, 0x03058220, 0x02008020, 0xc0ded005, + 0x80000965, 0x03058220, 0x02008020, 0xc0ded003, 0x80000961, 0x30014220, 0x00000000, 0x00000000, - 0x80001a70, 0x00018220, 0x12000304, 0xc0ded006, + 0x80001a70, 0x00018220, 0x12000304, 0xc0ded004, 0x80001901, 0x00010000, 0x00000000, 0x00000000, - 0x81044031, 0x00000000, 0xc0000414, 0x02a00000, + 0x81004031, 0x00000000, 0xc0000414, 0x02a00000, 0x80000001, 0x00010000, 0x20000000, 0x00000000, 0x80000001, 0x00010000, 0x30000000, 0x00000000, 0x80000901, 0x00010000, 0x00000000, 0x00000000, }}, { .gen_ver = 0, .size = 56, .code = (const uint32_t []) { - 0x80040061, 0x04054220, 0x00000000, 0x00000000, - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, - 0x80000040, 0x04058220, 0x02000024, 0xc0ded001, - 0x80000169, 0x04058220, 0x02000404, 0xc0ded000, - 0x80000040, 0x04258220, 0x020000c4, 0xc0ded002, - 0x80000061, 0x04454220, 0x00000000, 0xc0ded003, + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, + 0x80030061, 0x04054220, 0x00000000, 0x00000000, + 0x80000069, 0x04058220, 0x02000024, 0x00000002, + 0x80000140, 0x04058220, 0x02000404, 0xc0ded000, + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded001, + 0x80000061, 0x04454220, 0x00000000, 0x00000003, 0x80000061, 0x04850220, 0x000000a4, 0x00000000, - 0x80000165, 0x03058220, 0x02008020, 0xc0ded005, + 0x80000165, 0x03058220, 0x02008020, 0xc0ded003, 0x80000161, 0x30014220, 0x00000000, 0x00000000, - 0x80000270, 0x00018220, 0x12000304, 0xc0ded006, - 0x81049031, 0x00000000, 0xc0000414, 0x02a00000, + 0x80000270, 0x00018220, 0x12000304, 0xc0ded004, + 0x81009031, 0x00000000, 0xc0000414, 0x02a00000, 0x80000001, 0x00010000, 0x20000000, 0x00000000, 0x80000001, 0x00010000, 0x30000000, 0x00000000, 0x80000101, 0x00010000, 0x00000000, 0x00000000, @@ -324,84 +323,68 @@ struct iga64_template const iga64_code_clear_exception[] = { }; struct iga64_template const iga64_code_media_block_write[] = { - { .gen_ver = 2000, .size = 56, .code = (const uint32_t []) { - 0x80100061, 0x04054220, 0x00000000, 0x00000000, - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, - 0x80000061, 0x05154220, 0x00000000, 0xc0ded004, - 0x80000061, 0x05254220, 0x00000000, 0xc0ded005, - 0x80000061, 0x05354220, 0x00000000, 0xc0ded006, - 0x80000069, 0x02058220, 0x02000014, 0xc0ded000, - 0x80000061, 0x02150220, 0x00000064, 0x00000000, - 0x80001940, 0x02158220, 0x02000214, 0xc0ded001, - 0x80041961, 0x04550220, 0x00220205, 0x00000000, - 0x80000061, 0x04754220, 0x00000000, 0xc0ded002, - 0x80132031, 0x00000000, 0xd00e0494, 0x04000000, + { .gen_ver = 2000, .size = 40, .code = (const uint32_t []) { + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, + 0x800c0061, 0x04054220, 0x00000000, 0x00000000, + 0x80000069, 0x04558220, 0x02000014, 0x00000002, + 0x80001940, 0x04558220, 0x02000454, 0x00000000, + 0x80000040, 0x04658220, 0x02000064, 0xc0ded000, + 0x80000061, 0x04754220, 0x00000000, 0x00000003, + 0x80032031, 0x00000000, 0xd00e0494, 0x04000000, 0x80000001, 0x00010000, 0x20000000, 0x00000000, 0x80000001, 0x00010000, 0x30000000, 0x00000000, 0x80000901, 0x00010000, 0x00000000, 0x00000000, }}, - { .gen_ver = 1270, .size = 60, .code = (const uint32_t []) { - 0x80040061, 0x04054220, 0x00000000, 0x00000000, - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, - 0x80000061, 0x05254220, 0x00000000, 0xc0ded004, - 0x80000061, 0x05454220, 0x00000000, 0xc0ded005, - 0x80000061, 0x05654220, 0x00000000, 0xc0ded006, - 0x80000069, 0x04058220, 0x02000024, 0xc0ded000, - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, - 0x80001940, 0x04258220, 0x02000424, 0xc0ded001, - 0x80000061, 0x04454220, 0x00000000, 0xc0ded002, + { .gen_ver = 1270, .size = 48, .code = (const uint32_t []) { + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, + 0x80030061, 0x04054220, 0x00000000, 0x00000000, + 0x80000069, 0x04058220, 0x02000024, 0x00000002, + 0x80001940, 0x04058220, 0x02000404, 0x00000000, + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, + 0x80000061, 0x04454220, 0x00000000, 0x00000003, 0x80000061, 0x04850220, 0x000000a4, 0x00000000, 0x80001901, 0x00010000, 0x00000000, 0x00000000, - 0x80044031, 0x00000000, 0xc0000414, 0x02a00000, + 0x80004031, 0x00000000, 0xc0000414, 0x02a00000, 0x80000001, 0x00010000, 0x20000000, 0x00000000, 0x80000001, 0x00010000, 0x30000000, 0x00000000, 0x80000901, 0x00010000, 0x00000000, 0x00000000, }}, - { .gen_ver = 1260, .size = 56, .code = (const uint32_t []) { - 0x80100061, 0x04054220, 0x00000000, 0x00000000, - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, - 0x80000061, 0x05154220, 0x00000000, 0xc0ded004, - 0x80000061, 0x05254220, 0x00000000, 0xc0ded005, - 0x80000061, 0x05354220, 0x00000000, 0xc0ded006, - 0x80000069, 0x04058220, 0x02000014, 0xc0ded000, - 0x80000061, 0x04150220, 0x00000064, 0x00000000, - 0x80001940, 0x04158220, 0x02000414, 0xc0ded001, - 0x80000061, 0x04254220, 0x00000000, 0xc0ded002, + { .gen_ver = 1260, .size = 44, .code = (const uint32_t []) { + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, + 0x800c0061, 0x04054220, 0x00000000, 0x00000000, + 0x80000069, 0x04058220, 0x02000014, 0x00000002, + 0x80001940, 0x04058220, 0x02000404, 0x00000000, + 0x80000040, 0x04158220, 0x02000064, 0xc0ded000, + 0x80000061, 0x04254220, 0x00000000, 0x00000003, 0x80000061, 0x04450220, 0x00000054, 0x00000000, - 0x80132031, 0x00000000, 0xc0000414, 0x02a00000, + 0x80032031, 0x00000000, 0xc0000414, 0x02a00000, 0x80000001, 0x00010000, 0x20000000, 0x00000000, 0x80000001, 0x00010000, 0x30000000, 0x00000000, 0x80000901, 0x00010000, 0x00000000, 0x00000000, }}, - { .gen_ver = 1250, .size = 60, .code = (const uint32_t []) { - 0x80040061, 0x04054220, 0x00000000, 0x00000000, - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, - 0x80000061, 0x05254220, 0x00000000, 0xc0ded004, - 0x80000061, 0x05454220, 0x00000000, 0xc0ded005, - 0x80000061, 0x05654220, 0x00000000, 0xc0ded006, - 0x80000069, 0x04058220, 0x02000024, 0xc0ded000, - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, - 0x80001940, 0x04258220, 0x02000424, 0xc0ded001, - 0x80000061, 0x04454220, 0x00000000, 0xc0ded002, + { .gen_ver = 1250, .size = 48, .code = (const uint32_t []) { + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, + 0x80030061, 0x04054220, 0x00000000, 0x00000000, + 0x80000069, 0x04058220, 0x02000024, 0x00000002, + 0x80001940, 0x04058220, 0x02000404, 0x00000000, + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, + 0x80000061, 0x04454220, 0x00000000, 0x00000003, 0x80000061, 0x04850220, 0x000000a4, 0x00000000, 0x80001901, 0x00010000, 0x00000000, 0x00000000, - 0x80044031, 0x00000000, 0xc0000414, 0x02a00000, + 0x80004031, 0x00000000, 0xc0000414, 0x02a00000, 0x80000001, 0x00010000, 0x20000000, 0x00000000, 0x80000001, 0x00010000, 0x30000000, 0x00000000, 0x80000901, 0x00010000, 0x00000000, 0x00000000, }}, - { .gen_ver = 0, .size = 56, .code = (const uint32_t []) { - 0x80040061, 0x04054220, 0x00000000, 0x00000000, - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, - 0x80000061, 0x05254220, 0x00000000, 0xc0ded004, - 0x80000061, 0x05454220, 0x00000000, 0xc0ded005, - 0x80000061, 0x05654220, 0x00000000, 0xc0ded006, - 0x80000069, 0x04058220, 0x02000024, 0xc0ded000, - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, - 0x80000140, 0x04258220, 0x02000424, 0xc0ded001, - 0x80000061, 0x04454220, 0x00000000, 0xc0ded002, + { .gen_ver = 0, .size = 44, .code = (const uint32_t []) { + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, + 0x80030061, 0x04054220, 0x00000000, 0x00000000, + 0x80000069, 0x04058220, 0x02000024, 0x00000002, + 0x80000140, 0x04058220, 0x02000404, 0x00000000, + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, + 0x80000061, 0x04454220, 0x00000000, 0x00000003, 0x80000061, 0x04850220, 0x000000a4, 0x00000000, - 0x80049031, 0x00000000, 0xc0000414, 0x02a00000, + 0x80009031, 0x00000000, 0xc0000414, 0x02a00000, 0x80000001, 0x00010000, 0x20000000, 0x00000000, 0x80000001, 0x00010000, 0x30000000, 0x00000000, 0x80000101, 0x00010000, 0x00000000, 0x00000000, @@ -432,65 +415,68 @@ struct iga64_template const iga64_code_write_aip[] = { }; struct iga64_template const iga64_code_media_block_write_aip[] = { - { .gen_ver = 2000, .size = 44, .code = (const uint32_t []) { + { .gen_ver = 2000, .size = 40, .code = (const uint32_t []) { 0x80000961, 0x05050220, 0x00008020, 0x00000000, - 0x80000969, 0x02058220, 0x02000014, 0x00000002, - 0x80000061, 0x02150220, 0x00000064, 0x00000000, - 0x80001940, 0x02158220, 0x02000214, 0xc0ded000, - 0x80100061, 0x04054220, 0x00000000, 0x00000000, - 0x80041a61, 0x04550220, 0x00220205, 0x00000000, + 0x800c0961, 0x04054220, 0x00000000, 0x00000000, + 0x80000069, 0x04558220, 0x02000014, 0x00000002, + 0x80001940, 0x04558220, 0x02000454, 0x00000000, + 0x80000040, 0x04658220, 0x02000064, 0xc0ded000, 0x80000061, 0x04754220, 0x00000000, 0x00000003, - 0x80132031, 0x00000000, 0xd00e0494, 0x04000000, + 0x80032031, 0x00000000, 0xd00e0494, 0x04000000, 0x80000001, 0x00010000, 0x20000000, 0x00000000, 0x80000001, 0x00010000, 0x30000000, 0x00000000, 0x80000901, 0x00010000, 0x00000000, 0x00000000, }}, - { .gen_ver = 1270, .size = 44, .code = (const uint32_t []) { + { .gen_ver = 1270, .size = 48, .code = (const uint32_t []) { 0x80000961, 0x05050220, 0x00008040, 0x00000000, - 0x80000969, 0x04058220, 0x02000024, 0x00000002, - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, - 0x80001940, 0x04258220, 0x02000424, 0xc0ded000, + 0x80030961, 0x04054220, 0x00000000, 0x00000000, + 0x80000069, 0x04058220, 0x02000024, 0x00000002, + 0x80001940, 0x04058220, 0x02000404, 0x00000000, + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, 0x80000061, 0x04454220, 0x00000000, 0x00000003, 0x80000061, 0x04850220, 0x000000a4, 0x00000000, 0x80001901, 0x00010000, 0x00000000, 0x00000000, - 0x80044031, 0x00000000, 0xc0000414, 0x02a00000, + 0x80004031, 0x00000000, 0xc0000414, 0x02a00000, 0x80000001, 0x00010000, 0x20000000, 0x00000000, 0x80000001, 0x00010000, 0x30000000, 0x00000000, 0x80000901, 0x00010000, 0x00000000, 0x00000000, }}, - { .gen_ver = 1260, .size = 40, .code = (const uint32_t []) { + { .gen_ver = 1260, .size = 44, .code = (const uint32_t []) { 0x80000961, 0x05050220, 0x00008020, 0x00000000, - 0x80000969, 0x04058220, 0x02000014, 0x00000002, - 0x80000061, 0x04150220, 0x00000064, 0x00000000, - 0x80001940, 0x04158220, 0x02000414, 0xc0ded000, + 0x800c0961, 0x04054220, 0x00000000, 0x00000000, + 0x80000069, 0x04058220, 0x02000014, 0x00000002, + 0x80001940, 0x04058220, 0x02000404, 0x00000000, + 0x80000040, 0x04158220, 0x02000064, 0xc0ded000, 0x80000061, 0x04254220, 0x00000000, 0x00000003, 0x80000061, 0x04450220, 0x00000054, 0x00000000, - 0x80132031, 0x00000000, 0xc0000414, 0x02a00000, + 0x80032031, 0x00000000, 0xc0000414, 0x02a00000, 0x80000001, 0x00010000, 0x20000000, 0x00000000, 0x80000001, 0x00010000, 0x30000000, 0x00000000, 0x80000901, 0x00010000, 0x00000000, 0x00000000, }}, - { .gen_ver = 1250, .size = 44, .code = (const uint32_t []) { + { .gen_ver = 1250, .size = 48, .code = (const uint32_t []) { 0x80000961, 0x05050220, 0x00008040, 0x00000000, - 0x80000969, 0x04058220, 0x02000024, 0x00000002, - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, - 0x80001940, 0x04258220, 0x02000424, 0xc0ded000, + 0x80030961, 0x04054220, 0x00000000, 0x00000000, + 0x80000069, 0x04058220, 0x02000024, 0x00000002, + 0x80001940, 0x04058220, 0x02000404, 0x00000000, + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, 0x80000061, 0x04454220, 0x00000000, 0x00000003, 0x80000061, 0x04850220, 0x000000a4, 0x00000000, 0x80001901, 0x00010000, 0x00000000, 0x00000000, - 0x80044031, 0x00000000, 0xc0000414, 0x02a00000, + 0x80004031, 0x00000000, 0xc0000414, 0x02a00000, 0x80000001, 0x00010000, 0x20000000, 0x00000000, 0x80000001, 0x00010000, 0x30000000, 0x00000000, 0x80000901, 0x00010000, 0x00000000, 0x00000000, }}, - { .gen_ver = 0, .size = 40, .code = (const uint32_t []) { + { .gen_ver = 0, .size = 44, .code = (const uint32_t []) { 0x80000161, 0x05050220, 0x00008040, 0x00000000, - 0x80000169, 0x04058220, 0x02000024, 0x00000002, - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, - 0x80000140, 0x04258220, 0x02000424, 0xc0ded000, + 0x80030161, 0x04054220, 0x00000000, 0x00000000, + 0x80000069, 0x04058220, 0x02000024, 0x00000002, + 0x80000140, 0x04058220, 0x02000404, 0x00000000, + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, 0x80000061, 0x04454220, 0x00000000, 0x00000003, 0x80000061, 0x04850220, 0x000000a4, 0x00000000, - 0x80049031, 0x00000000, 0xc0000414, 0x02a00000, + 0x80009031, 0x00000000, 0xc0000414, 0x02a00000, 0x80000001, 0x00010000, 0x20000000, 0x00000000, 0x80000001, 0x00010000, 0x30000000, 0x00000000, 0x80000101, 0x00010000, 0x00000000, 0x00000000, @@ -499,77 +485,77 @@ struct iga64_template const iga64_code_media_block_write_aip[] = { struct iga64_template const iga64_code_common_target_write[] = { { .gen_ver = 2000, .size = 48, .code = (const uint32_t []) { - 0x80100061, 0x1e054220, 0x00000000, 0x00000000, 0x80100061, 0x1f054220, 0x00000000, 0x00000000, 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, 0x80000061, 0x1f154220, 0x00000000, 0xc0ded002, 0x80000061, 0x1f254220, 0x00000000, 0xc0ded003, 0x80000061, 0x1f354220, 0x00000000, 0xc0ded004, + 0x800c0061, 0x1e054220, 0x00000000, 0x00000000, 0x80000061, 0x1e654220, 0x00000000, 0xc0ded000, 0x80000061, 0x1e754220, 0x00000000, 0x0000000f, - 0x80132031, 0x00000000, 0xd00e1e94, 0x04000000, + 0x80032031, 0x00000000, 0xd00e1e94, 0x04000000, 0x80000001, 0x00010000, 0x20000000, 0x00000000, 0x80000001, 0x00010000, 0x30000000, 0x00000000, 0x80000901, 0x00010000, 0x00000000, 0x00000000, }}, { .gen_ver = 1270, .size = 56, .code = (const uint32_t []) { - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, 0x80040061, 0x1f054220, 0x00000000, 0x00000000, 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, 0x80000061, 0x1f254220, 0x00000000, 0xc0ded002, 0x80000061, 0x1f454220, 0x00000000, 0xc0ded003, 0x80000061, 0x1f654220, 0x00000000, 0xc0ded004, + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, 0x80000061, 0x1e454220, 0x00000000, 0x0000000f, 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, 0x80001901, 0x00010000, 0x00000000, 0x00000000, - 0x80044031, 0x00000000, 0xc0001e14, 0x02a00000, + 0x80004031, 0x00000000, 0xc0001e14, 0x02a00000, 0x80000001, 0x00010000, 0x20000000, 0x00000000, 0x80000001, 0x00010000, 0x30000000, 0x00000000, 0x80000901, 0x00010000, 0x00000000, 0x00000000, }}, { .gen_ver = 1260, .size = 52, .code = (const uint32_t []) { - 0x80100061, 0x1e054220, 0x00000000, 0x00000000, 0x80100061, 0x1f054220, 0x00000000, 0x00000000, 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, 0x80000061, 0x1f154220, 0x00000000, 0xc0ded002, 0x80000061, 0x1f254220, 0x00000000, 0xc0ded003, 0x80000061, 0x1f354220, 0x00000000, 0xc0ded004, + 0x800c0061, 0x1e054220, 0x00000000, 0x00000000, 0x80000061, 0x1e154220, 0x00000000, 0xc0ded000, 0x80000061, 0x1e254220, 0x00000000, 0x0000000f, 0x80000061, 0x1e450220, 0x00000054, 0x00000000, - 0x80132031, 0x00000000, 0xc0001e14, 0x02a00000, + 0x80032031, 0x00000000, 0xc0001e14, 0x02a00000, 0x80000001, 0x00010000, 0x20000000, 0x00000000, 0x80000001, 0x00010000, 0x30000000, 0x00000000, 0x80000901, 0x00010000, 0x00000000, 0x00000000, }}, { .gen_ver = 1250, .size = 56, .code = (const uint32_t []) { - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, 0x80040061, 0x1f054220, 0x00000000, 0x00000000, 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, 0x80000061, 0x1f254220, 0x00000000, 0xc0ded002, 0x80000061, 0x1f454220, 0x00000000, 0xc0ded003, 0x80000061, 0x1f654220, 0x00000000, 0xc0ded004, + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, 0x80000061, 0x1e454220, 0x00000000, 0x0000000f, 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, 0x80001901, 0x00010000, 0x00000000, 0x00000000, - 0x80044031, 0x00000000, 0xc0001e14, 0x02a00000, + 0x80004031, 0x00000000, 0xc0001e14, 0x02a00000, 0x80000001, 0x00010000, 0x20000000, 0x00000000, 0x80000001, 0x00010000, 0x30000000, 0x00000000, 0x80000901, 0x00010000, 0x00000000, 0x00000000, }}, { .gen_ver = 0, .size = 52, .code = (const uint32_t []) { - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, 0x80040061, 0x1f054220, 0x00000000, 0x00000000, 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, 0x80000061, 0x1f254220, 0x00000000, 0xc0ded002, 0x80000061, 0x1f454220, 0x00000000, 0xc0ded003, 0x80000061, 0x1f654220, 0x00000000, 0xc0ded004, + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, 0x80000061, 0x1e454220, 0x00000000, 0x0000000f, 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, - 0x80049031, 0x00000000, 0xc0001e14, 0x02a00000, + 0x80009031, 0x00000000, 0xc0001e14, 0x02a00000, 0x80000001, 0x00010000, 0x20000000, 0x00000000, 0x80000001, 0x00010000, 0x30000000, 0x00000000, 0x80000101, 0x00010000, 0x00000000, 0x00000000, @@ -627,56 +613,56 @@ struct iga64_template const iga64_code_clear_r40[] = { struct iga64_template const iga64_code_jump_dw_neq[] = { { .gen_ver = 2000, .size = 32, .code = (const uint32_t []) { - 0x80100061, 0x1e054220, 0x00000000, 0x00000000, + 0x800c0061, 0x1e054220, 0x00000000, 0x00000000, 0x80000061, 0x1e654220, 0x00000000, 0xc0ded000, 0x80000061, 0x1e754220, 0x00000000, 0x00000003, - 0x80132031, 0x1f0c0000, 0xd0061e8c, 0x04000000, + 0x80032031, 0x1f0c0000, 0xd0061e8c, 0x04000000, 0x80000061, 0x30014220, 0x00000000, 0x00000000, 0x80008070, 0x00018220, 0x22001f04, 0xc0ded001, 0x84000020, 0x00004000, 0x00000000, 0xffffffa0, 0x80000901, 0x00010000, 0x00000000, 0x00000000, }}, { .gen_ver = 1270, .size = 40, .code = (const uint32_t []) { - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, 0x80000061, 0x1e454220, 0x00000000, 0x00000003, 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, 0x80001901, 0x00010000, 0x00000000, 0x00000000, - 0x80044031, 0x1f0c0000, 0xc0001e0c, 0x02400000, + 0x80004031, 0x1f0c0000, 0xc0001e0c, 0x02400000, 0x80000061, 0x30014220, 0x00000000, 0x00000000, 0x80002070, 0x00018220, 0x22001f04, 0xc0ded001, 0x81000020, 0x00004000, 0x00000000, 0xffffff80, 0x80000901, 0x00010000, 0x00000000, 0x00000000, }}, { .gen_ver = 1260, .size = 36, .code = (const uint32_t []) { - 0x80100061, 0x1e054220, 0x00000000, 0x00000000, + 0x800c0061, 0x1e054220, 0x00000000, 0x00000000, 0x80000061, 0x1e154220, 0x00000000, 0xc0ded000, 0x80000061, 0x1e254220, 0x00000000, 0x00000003, 0x80000061, 0x1e450220, 0x00000054, 0x00000000, - 0x80132031, 0x1f0c0000, 0xc0001e0c, 0x02400000, + 0x80032031, 0x1f0c0000, 0xc0001e0c, 0x02400000, 0x80000061, 0x30014220, 0x00000000, 0x00000000, 0x80008070, 0x00018220, 0x22001f04, 0xc0ded001, 0x84000020, 0x00004000, 0x00000000, 0xffffff90, 0x80000901, 0x00010000, 0x00000000, 0x00000000, }}, { .gen_ver = 1250, .size = 40, .code = (const uint32_t []) { - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, 0x80000061, 0x1e454220, 0x00000000, 0x00000003, 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, 0x80001901, 0x00010000, 0x00000000, 0x00000000, - 0x80044031, 0x1f0c0000, 0xc0001e0c, 0x02400000, + 0x80004031, 0x1f0c0000, 0xc0001e0c, 0x02400000, 0x80000061, 0x30014220, 0x00000000, 0x00000000, 0x80002070, 0x00018220, 0x22001f04, 0xc0ded001, 0x81000020, 0x00004000, 0x00000000, 0xffffff80, 0x80000901, 0x00010000, 0x00000000, 0x00000000, }}, { .gen_ver = 0, .size = 36, .code = (const uint32_t []) { - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, 0x80000061, 0x1e454220, 0x00000000, 0x00000003, 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, - 0x80049031, 0x1f0c0000, 0xc0001e0c, 0x02400000, + 0x80009031, 0x1f0c0000, 0xc0001e0c, 0x02400000, 0x80000061, 0x30014220, 0x00000000, 0x00000000, 0x80002070, 0x00018220, 0x22001f04, 0xc0ded001, 0x81000120, 0x00004000, 0x00000000, 0xffffff90, diff --git a/lib/iga64_macros.h b/lib/iga64_macros.h index 6459b524c3fd..40b6338928e1 100644 --- a/lib/iga64_macros.h +++ b/lib/iga64_macros.h @@ -16,4 +16,47 @@ #define src1_null null:0 #endif +/* GPGPU_R0Payload fields, Bspec: 55396, 56587 */ +#define R0_TGIDX r0.1<0;1,0>:ud +#define R0_TGIDY r0.6<0;1,0>:ud +#define R0_FFTID r0.5<0;1,0>:ud + +#define SET_SHARED_MEDIA_BLOCK_MSG_HDR(dst, y, width) \ +(W) mov (8) dst.0<1>:ud 0x0:ud ;\ +(W) mov (1) dst.1<1>:ud y ;\ +(W) mov (1) dst.2<1>:ud (width - 1):ud ;\ +(W) mov (1) dst.4<1>:ud R0_FFTID + +#define SET_THREAD_MEDIA_BLOCK_MSG_HDR(dst, x, y, width) \ +(W) mov (8) dst.0<1>:ud 0x0:ud ;\ +(W) shl (1) dst.0<1>:ud R0_TGIDX 0x2:ud ;\ +(W) add (1) dst.0<1>:ud dst.0<0;1,0>:ud x:ud ;\ +(W) add (1) dst.1<1>:ud R0_TGIDY y ;\ +(W) mov (1) dst.2<1>:ud (width - 1):ud ;\ +(W) mov (1) dst.4<1>:ud R0_FFTID + +#define SET_SHARED_MEDIA_A2DBLOCK_PAYLOAD(dst, y, width) \ +(W) mov (8) dst.0<1>:ud 0x0:ud ;\ +(W) mov (1) dst.6<1>:ud y ;\ +(W) mov (1) dst.7<1>:ud (width - 1):ud + +#define SET_THREAD_MEDIA_A2DBLOCK_PAYLOAD(dst, x, y, width) \ +(W) mov (8) dst.0<1>:ud 0x0:ud ;\ +(W) shl (1) dst.5<1>:ud R0_TGIDX 0x2:ud ;\ +(W) add (1) dst.5<1>:ud dst.5<0;1,0>:ud x:ud ;\ +(W) add (1) dst.6<1>:ud R0_TGIDY y ;\ +(W) mov (1) dst.7<1>:ud (width - 1):ud ;\ + +#if GEN_VER < 2000 +#define SET_SHARED_SPACE_ADDR(dst, y, width) SET_SHARED_MEDIA_BLOCK_MSG_HDR(dst, y, width) +#define SET_THREAD_SPACE_ADDR(dst, x, y, width) SET_THREAD_MEDIA_BLOCK_MSG_HDR(dst, x, y, width) +#define LOAD_SPACE_DW(dst, src) send.dc1 (1) dst src src1_null 0x0 0x2190000 +#define STORE_SPACE_DW(dst, src) send.dc1 (1) null dst null 0x0 0x40A8000 +#else +#define SET_SHARED_SPACE_ADDR(dst, y, width) SET_SHARED_MEDIA_A2DBLOCK_PAYLOAD(dst, y, width) +#define SET_THREAD_SPACE_ADDR(dst, x, y, width) SET_THREAD_MEDIA_A2DBLOCK_PAYLOAD(dst, x, y, width) +#define LOAD_SPACE_DW(dst, src) send.tgm (1) dst src null:0 0x0 0x62100003 +#define STORE_SPACE_DW(dst, src) send.tgm (1) null dst null:0 0x0 0x64000007 +#endif + #endif -- 2.34.1 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH v3 2/4] lib/gpgpu_shader: simplify load/store shaders 2024-11-21 17:12 ` [PATCH v3 2/4] lib/gpgpu_shader: simplify load/store shaders Andrzej Hajda @ 2024-11-22 14:05 ` Grzegorzek, Dominik 2024-11-22 14:22 ` Hajda, Andrzej 0 siblings, 1 reply; 15+ messages in thread From: Grzegorzek, Dominik @ 2024-11-22 14:05 UTC (permalink / raw) To: igt-dev@lists.freedesktop.org, Hajda, Andrzej Cc: Kempczynski, Zbigniew, Mun, Gwan-gyeong, Manszewski, Christoph, kamil.konieczny@linux.intel.com On Thu, 2024-11-21 at 18:12 +0100, Andrzej Hajda wrote: > There is lot of redundancy in shaders code regarding load/store messages. > It makes the code barely readable. Simplify it by using macros in iga64 > assembler. > Every load/store operation is split into two phases: > 1. Load address/descriptor (from) where data should be stored/loaded. > 2. Issue load/store instruction. > Shader threads needs two types of memory access: > 3. Private area per thread. > 4. Area shared per all threads. > Different platforms access surface in different ways: > 5. Using media block messages. > 6. Using untyped 2d block messages. > 7. Future platforms will use different messages. > > All this is simplified to two macros per message in shader: > load_(shared|thread)_space_addr(dst,y,width) > (load|store)_space_dw(dst, src) > > v2: > - captialze introduced macros (Dominik) > - fixed thread -> shared call (Zbigniew) > > Signed-off-by: Andrzej Hajda <andrzej.hajda@intel.com> > --- > lib/gpgpu_shader.c | 160 +++------------------- > lib/iga64_generated_codes.c | 318 +++++++++++++++++++++----------------------- > lib/iga64_macros.h | 43 ++++++ > 3 files changed, 215 insertions(+), 306 deletions(-) > > diff --git a/lib/gpgpu_shader.c b/lib/gpgpu_shader.c > index 4e1b8d5e9009..363435e7efd3 100644 > --- a/lib/gpgpu_shader.c > +++ b/lib/gpgpu_shader.c > @@ -431,22 +431,8 @@ void gpgpu_shader__jump_neq(struct gpgpu_shader *shdr, int label_id, > > size = emit_iga64_code(shdr, jump_dw_neq, " \n\ > L0: \n\ > -(W) mov (16|M0) r30.0<1>:ud 0x0:ud \n\ > -#if GEN_VER < 2000 // Media Block Write \n\ > - // Y offset of the block in rows := thread group id Y \n\ > -(W) mov (1|M0) r30.1<1>:ud ARG(0):ud \n\ > - // block width [0,63] representing 1 to 64 bytes, we want dword \n\ > -(W) mov (1|M0) r30.2<1>:ud 0x3:ud \n\ > - // FFTID := FFTID from R0 header \n\ > -(W) mov (1|M0) r30.4<1>:ud r0.5<0;1,0>:ud \n\ > -(W) send.dc1 (16|M0) r31 r30 null 0x0 0x2190000 \n\ > -#else // Typed 2D Block Store \n\ > - // Store X and Y block start (160:191 and 192:223) \n\ > -(W) mov (1|M0) r30.6<1>:ud ARG(0):ud \n\ > - // Store X and Y block size (224:231 and 232:239) \n\ > -(W) mov (1|M0) r30.7<1>:ud 0x3:ud \n\ > -(W) send.tgm (16|M0) r31 r30 null:0 0x0 0x62100003 \n\ > -#endif \n\ > + SET_SHARED_SPACE_ADDR(r30, ARG(0):ud, 4) \n\ > +(W) LOAD_SPACE_DW(r31, r30) \n\ It's a bit odd to me, that in case of LOAD_SPACE_DW you leave an user with a choice wheter to set Write Enable (W). Is there any possible use case when we do not won't to set it before send message? Especially, taking into account that we aready always did it perparing the message. Moving (W) inside the macro would be cleaner. And it will spare a future user a dillema wheter use it or not. Other than that I did not spot more issues. Great cleanup indeed, so from my side it is: Reviewed-by: Dominik Grzegorzek <dominik.grzegorzek@intel.com> > // clear the flag register \n\ > (W) mov (1|M0) f0.0<1>:ud 0x0:ud \n\ > (W) cmp (1|M0) (ne)f0.0 null<1>:ud r31.0<0;1,0>:ud ARG(1):ud \n\ > @@ -511,28 +497,13 @@ void gpgpu_shader__common_target_write(struct gpgpu_shader *shdr, > uint32_t y_offset, const uint32_t value[4]) > { > emit_iga64_code(shdr, common_target_write, " \n\ > -(W) mov (16|M0) r30.0<1>:ud 0x0:ud \n\ > (W) mov (16|M0) r31.0<1>:ud 0x0:ud \n\ > (W) mov (1|M0) r31.0<1>:ud ARG(1):ud \n\ > (W) mov (1|M0) r31.1<1>:ud ARG(2):ud \n\ > (W) mov (1|M0) r31.2<1>:ud ARG(3):ud \n\ > (W) mov (1|M0) r31.3<1>:ud ARG(4):ud \n\ > -#if GEN_VER < 2000 // Media Block Write \n\ > - // Y offset of the block in rows \n\ > -(W) mov (1|M0) r30.1<1>:ud ARG(0):ud \n\ > - // block width [0,63] representing 1 to 64 bytes \n\ > -(W) mov (1|M0) r30.2<1>:ud 0xf:ud \n\ > - // FFTID := FFTID from R0 header \n\ > -(W) mov (1|M0) r30.4<1>:ud r0.5<0;1,0>:ud \n\ > - // written value \n\ > -(W) send.dc1 (16|M0) null r30 src1_null 0x0 0x40A8000 \n\ > -#else // Typed 2D Block Store \n\ > - // Store X and Y block start (160:191 and 192:223) \n\ > -(W) mov (1|M0) r30.6<1>:ud ARG(0):ud \n\ > - // Store X and Y block size (224:231 and 232:239) \n\ > -(W) mov (1|M0) r30.7<1>:ud 0xf:ud \n\ > -(W) send.tgm (16|M0) null r30 null:0 0x0 0x64000007 \n\ > -#endif \n\ > + SET_SHARED_SPACE_ADDR(r30, ARG(0):ud, 16) \n\ > +(W) STORE_SPACE_DW(r30, r31) \n\ > ", y_offset, value[0], value[1], value[2], value[3]); > } > > @@ -565,31 +536,8 @@ void gpgpu_shader__write_aip(struct gpgpu_shader *shdr, uint32_t y_offset) > emit_iga64_code(shdr, media_block_write_aip, " \n\ > // Payload \n\ > (W) mov (1|M0) r5.0<1>:ud cr0.2:ud \n\ > -#if GEN_VER < 2000 // Media Block Write \n\ > - // X offset of the block in bytes := (thread group id X << ARG(0)) \n\ > -(W) shl (1|M0) r4.0<1>:ud r0.1<0;1,0>:ud 0x2:ud \n\ > - // Y offset of the block in rows := thread group id Y \n\ > -(W) mov (1|M0) r4.1<1>:ud r0.6<0;1,0>:ud \n\ > -(W) add (1|M0) r4.1<1>:ud r4.1<0;1,0>:ud ARG(0):ud \n\ > - // block width [0,63] representing 1 to 64 bytes \n\ > -(W) mov (1|M0) r4.2<1>:ud 0x3:ud \n\ > - // FFTID := FFTID from R0 header \n\ > -(W) mov (1|M0) r4.4<1>:ud r0.5<0;1,0>:ud \n\ > -(W) send.dc1 (16|M0) null r4 src1_null 0 0x40A8000 \n\ > -#else // Typed 2D Block Store \n\ > - // Load r2.0-3 with tg id X << ARG(0) \n\ > -(W) shl (1|M0) r2.0<1>:ud r0.1<0;1,0>:ud 0x2:ud \n\ > - // Load r2.4-7 with tg id Y + ARG(1):ud \n\ > -(W) mov (1|M0) r2.1<1>:ud r0.6<0;1,0>:ud \n\ > -(W) add (1|M0) r2.1<1>:ud r2.1<0;1,0>:ud ARG(0):ud \n\ > - // payload setup \n\ > -(W) mov (16|M0) r4.0<1>:ud 0x0:ud \n\ > - // Store X and Y block start (160:191 and 192:223) \n\ > -(W) mov (2|M0) r4.5<1>:ud r2.0<2;2,1>:ud \n\ > - // Store X and Y block max_size (224:231 and 232:239) \n\ > -(W) mov (1|M0) r4.7<1>:ud 0x3:ud \n\ > -(W) send.tgm (16|M0) null r4 null:0 0 0x64000007 \n\ > -#endif \n\ > + SET_THREAD_SPACE_ADDR(r4, 0, ARG(0):ud, 4) \n\ > +(W) STORE_SPACE_DW(r4, r5) \n\ > ", y_offset); > } > > @@ -618,38 +566,11 @@ void gpgpu_shader__increase_aip(struct gpgpu_shader *shdr, uint32_t value) > void gpgpu_shader__write_dword(struct gpgpu_shader *shdr, uint32_t value, > uint32_t y_offset) > { > - emit_iga64_code(shdr, media_block_write, " \n\ > - // Clear message header \n\ > -(W) mov (16|M0) r4.0<1>:ud 0x0:ud \n\ > - // Payload \n\ > -(W) mov (1|M0) r5.0<1>:ud ARG(3):ud \n\ > -(W) mov (1|M0) r5.1<1>:ud ARG(4):ud \n\ > -(W) mov (1|M0) r5.2<1>:ud ARG(5):ud \n\ > -(W) mov (1|M0) r5.3<1>:ud ARG(6):ud \n\ > -#if GEN_VER < 2000 // Media Block Write \n\ > - // X offset of the block in bytes := (thread group id X << ARG(0)) \n\ > -(W) shl (1|M0) r4.0<1>:ud r0.1<0;1,0>:ud ARG(0):ud \n\ > - // Y offset of the block in rows := thread group id Y \n\ > -(W) mov (1|M0) r4.1<1>:ud r0.6<0;1,0>:ud \n\ > -(W) add (1|M0) r4.1<1>:ud r4.1<0;1,0>:ud ARG(1):ud \n\ > - // block width [0,63] representing 1 to 64 bytes \n\ > -(W) mov (1|M0) r4.2<1>:ud ARG(2):ud \n\ > - // FFTID := FFTID from R0 header \n\ > -(W) mov (1|M0) r4.4<1>:ud r0.5<0;1,0>:ud \n\ > -(W) send.dc1 (16|M0) null r4 src1_null 0 0x40A8000 \n\ > -#else // Typed 2D Block Store \n\ > - // Load r2.0-3 with tg id X << ARG(0) \n\ > -(W) shl (1|M0) r2.0<1>:ud r0.1<0;1,0>:ud ARG(0):ud \n\ > - // Load r2.4-7 with tg id Y + ARG(1):ud \n\ > -(W) mov (1|M0) r2.1<1>:ud r0.6<0;1,0>:ud \n\ > -(W) add (1|M0) r2.1<1>:ud r2.1<0;1,0>:ud ARG(1):ud \n\ > - // Store X and Y block start (160:191 and 192:223) \n\ > -(W) mov (2|M0) r4.5<1>:ud r2.0<2;2,1>:ud \n\ > - // Store X and Y block max_size (224:231 and 232:239) \n\ > -(W) mov (1|M0) r4.7<1>:ud ARG(2):ud \n\ > -(W) send.tgm (16|M0) null r4 null:0 0 0x64000007 \n\ > -#endif \n\ > - ", 2, y_offset, 3, value, value, value, value); > + emit_iga64_code(shdr, media_block_write, " \n\ > +(W) mov (1) r5.0<1>:ud ARG(1):ud \n\ > + SET_THREAD_SPACE_ADDR(r4, 0, ARG(0):ud, 4) \n\ > +(W) STORE_SPACE_DW(r4, r5) \n\ > + ", y_offset, value); > } > > /** > @@ -697,41 +618,14 @@ void gpgpu_shader__write_on_exception(struct gpgpu_shader *shdr, uint32_t value, > uint32_t y_offset, uint32_t mask, uint32_t expected) > { > emit_iga64_code(shdr, write_on_exception, " \n\ > - // Clear message header \n\ > -(W) mov (16|M0) r4.0<1>:ud 0x0:ud \n\ > - // Payload \n\ > -(W) mov (1|M0) r5.0<1>:ud ARG(4):ud \n\ > -#if GEN_VER < 2000 // prepare Media Block Write \n\ > - // X offset of the block in bytes := (thread group id X << ARG(0)) \n\ > -(W) add (1|M0) r4.0<1>:ud r0.1<0;1,0>:ud ARG(1):ud \n\ > -(W) shl (1|M0) r4.0<1>:ud r4.0<0;1,0>:ud ARG(0):ud \n\ > - // Y offset of the block in rows := thread group id Y \n\ > -(W) add (1|M0) r4.1<1>:ud r0.6<0;1,0>:ud ARG(2):ud \n\ > - // block width [0,63] representing 1 to 64 bytes \n\ > -(W) mov (1|M0) r4.2<1>:ud ARG(3):ud \n\ > - // FFTID := FFTID from R0 header \n\ > -(W) mov (1|M0) r4.4<1>:ud r0.5<0;1,0>:ud \n\ > -#else // prepare Typed 2D Block Store \n\ > - // Load r2.0 with tg id (X + ARG(1)) << ARG(0) \n\ > -(W) add (1|M0) r2.0<1>:ud r0.1<0;1,0>:ud ARG(1):ud \n\ > -(W) shl (1|M0) r2.0<1>:ud r2.0<0;1,0>:ud ARG(0):ud \n\ > - // Load r2.4-7 with tg id Y + ARG(2):ud \n\ > -(W) add (1|M0) r2.1<1>:ud r0.6<0;1,0>:ud ARG(2):ud \n\ > - // Store X and Y block start (160:191 and 192:223) \n\ > -(W) mov (2|M0) r4.5<1>:ud r2.0<2;2,1>:ud \n\ > - // Store X and Y block max_size (224:231 and 232:239) \n\ > -(W) mov (1|M0) r4.7<1>:ud ARG(3):ud \n\ > -#endif \n\ > +(W) mov (1|M0) r5.0<1>:ud ARG(2):ud \n\ > + SET_THREAD_SPACE_ADDR(r4, ARG(0), ARG(1):ud, 4) \n\ > // Check if masked exception is equal to provided value and write conditionally \n\ > -(W) and (1|M0) r3.0<1>:ud cr0.1<0;1,0>:ud ARG(5):ud \n\ > -(W) mov (1|M0) f0.0<1>:ud 0x0:ud \n\ > -(W) cmp (1|M0) (eq)f0.0 null:ud r3.0<0;1,0>:ud ARG(6):ud \n\ > -#if GEN_VER < 2000 // Media Block Write \n\ > -(W&f0.0) send.dc1 (16|M0) null r4 src1_null 0 0x40A8000 \n\ > -#else // Typed 2D Block Store \n\ > -(W&f0.0) send.tgm (16|M0) null r4 null:0 0 0x64000007 \n\ > -#endif \n\ > - ", 2, x_offset, y_offset, 3, value, mask, expected); > +(W) and (1|M0) r3.0<1>:ud cr0.1<0;1,0>:ud ARG(3):ud \n\ > +(W) mov (1|M0) f0.0<1>:ud 0x0:ud \n\ > +(W) cmp (1|M0) (eq)f0.0 null:ud r3.0<0;1,0>:ud ARG(4):ud \n\ > +(W&f0.0) STORE_SPACE_DW(r4, r5) \n\ > + ", 4 * x_offset, y_offset, value, mask, expected); > } > > /** > @@ -778,22 +672,8 @@ void gpgpu_shader__end_system_routine_step_if_eq(struct gpgpu_shader *shdr, > emit_iga64_code(shdr, end_system_routine_step_if_eq, " \n\ > (W) or (1|M0) cr0.0<1>:ud cr0.0<0;1,0>:ud 0x8000:ud \n\ > (W) and (1|M0) cr0.1<1>:ud cr0.1<0;1,0>:ud ARG(0):ud \n\ > -(W) mov (16|M0) r30.0<1>:ud 0x0:ud \n\ > -#if GEN_VER < 2000 // Media Block Write \n\ > - // Y offset of the block in rows := thread group id Y \n\ > -(W) mov (1|M0) r30.1<1>:ud ARG(1):ud \n\ > - // block width [0,63] representing 1 to 64 bytes, we want dword \n\ > -(W) mov (1|M0) r30.2<1>:ud 0x3:ud \n\ > - // FFTID := FFTID from R0 header \n\ > -(W) mov (1|M0) r30.4<1>:ud r0.5<0;1,0>:ud \n\ > -(W) send.dc1 (16|M0) r31 r30 null 0x0 0x2190000 \n\ > -#else // Typed 2D Block Store \n\ > - // Store X and Y block start (160:191 and 192:223) \n\ > -(W) mov (1|M0) r30.6<1>:ud ARG(1):ud \n\ > - // Store X and Y block size (224:231 and 232:239) \n\ > -(W) mov (1|M0) r30.7<1>:ud 0x3:ud \n\ > -(W) send.tgm (16|M0) r31 r30 null:0 0x0 0x62100003 \n\ > -#endif \n\ > + SET_SHARED_SPACE_ADDR(r30, ARG(0):ud, 4) \n\ > +(W) LOAD_SPACE_DW(r31, r30) \n\ > // clear the flag register \n\ > (W) mov (1|M0) f0.0<1>:ud 0x0:ud \n\ > (W) cmp (1|M0) (ne)f0.0 null<1>:ud r31.0<0;1,0>:ud ARG(2):ud \n\ > diff --git a/lib/iga64_generated_codes.c b/lib/iga64_generated_codes.c > index 41be66f74486..04015b0b6d29 100644 > --- a/lib/iga64_generated_codes.c > +++ b/lib/iga64_generated_codes.c > @@ -3,7 +3,7 @@ > > #include "gpgpu_shader.h" > > -#define MD5_SUM_IGA64_ASMS 09d72b5fd1f62c8c2905caa80f400567 > +#define MD5_SUM_IGA64_ASMS da66be3cf9bec819a61429de75943011 > > struct iga64_template const iga64_code_gpgpu_fill[] = { > { .gen_ver = 2000, .size = 44, .code = (const uint32_t []) { > @@ -83,10 +83,10 @@ struct iga64_template const iga64_code_end_system_routine_step_if_eq[] = { > { .gen_ver = 2000, .size = 44, .code = (const uint32_t []) { > 0x80000966, 0x80018220, 0x02008000, 0x00008000, > 0x80000965, 0x80118220, 0x02008010, 0xc0ded000, > - 0x80100961, 0x1e054220, 0x00000000, 0x00000000, > - 0x80000061, 0x1e654220, 0x00000000, 0xc0ded001, > + 0x800c0961, 0x1e054220, 0x00000000, 0x00000000, > + 0x80000061, 0x1e654220, 0x00000000, 0xc0ded000, > 0x80000061, 0x1e754220, 0x00000000, 0x00000003, > - 0x80132031, 0x1f0c0000, 0xd0061e8c, 0x04000000, > + 0x80032031, 0x1f0c0000, 0xd0061e8c, 0x04000000, > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > 0x80008070, 0x00018220, 0x22001f04, 0xc0ded002, > 0x84000965, 0x80118220, 0x02008010, 0xc0ded003, > @@ -96,12 +96,12 @@ struct iga64_template const iga64_code_end_system_routine_step_if_eq[] = { > { .gen_ver = 1270, .size = 52, .code = (const uint32_t []) { > 0x80000966, 0x80018220, 0x02008000, 0x00008000, > 0x80000965, 0x80218220, 0x02008020, 0xc0ded000, > - 0x80040961, 0x1e054220, 0x00000000, 0x00000000, > - 0x80000061, 0x1e254220, 0x00000000, 0xc0ded001, > + 0x80030961, 0x1e054220, 0x00000000, 0x00000000, > + 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, > 0x80000061, 0x1e454220, 0x00000000, 0x00000003, > 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > - 0x80044031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > + 0x80004031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > 0x80002070, 0x00018220, 0x22001f04, 0xc0ded002, > 0x81000965, 0x80218220, 0x02008020, 0xc0ded003, > @@ -111,11 +111,11 @@ struct iga64_template const iga64_code_end_system_routine_step_if_eq[] = { > { .gen_ver = 1260, .size = 48, .code = (const uint32_t []) { > 0x80000966, 0x80018220, 0x02008000, 0x00008000, > 0x80000965, 0x80118220, 0x02008010, 0xc0ded000, > - 0x80100961, 0x1e054220, 0x00000000, 0x00000000, > - 0x80000061, 0x1e154220, 0x00000000, 0xc0ded001, > + 0x800c0961, 0x1e054220, 0x00000000, 0x00000000, > + 0x80000061, 0x1e154220, 0x00000000, 0xc0ded000, > 0x80000061, 0x1e254220, 0x00000000, 0x00000003, > 0x80000061, 0x1e450220, 0x00000054, 0x00000000, > - 0x80132031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > + 0x80032031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > 0x80008070, 0x00018220, 0x22001f04, 0xc0ded002, > 0x84000965, 0x80118220, 0x02008010, 0xc0ded003, > @@ -125,12 +125,12 @@ struct iga64_template const iga64_code_end_system_routine_step_if_eq[] = { > { .gen_ver = 1250, .size = 52, .code = (const uint32_t []) { > 0x80000966, 0x80018220, 0x02008000, 0x00008000, > 0x80000965, 0x80218220, 0x02008020, 0xc0ded000, > - 0x80040961, 0x1e054220, 0x00000000, 0x00000000, > - 0x80000061, 0x1e254220, 0x00000000, 0xc0ded001, > + 0x80030961, 0x1e054220, 0x00000000, 0x00000000, > + 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, > 0x80000061, 0x1e454220, 0x00000000, 0x00000003, > 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > - 0x80044031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > + 0x80004031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > 0x80002070, 0x00018220, 0x22001f04, 0xc0ded002, > 0x81000965, 0x80218220, 0x02008020, 0xc0ded003, > @@ -140,11 +140,11 @@ struct iga64_template const iga64_code_end_system_routine_step_if_eq[] = { > { .gen_ver = 0, .size = 48, .code = (const uint32_t []) { > 0x80000166, 0x80018220, 0x02008000, 0x00008000, > 0x80000165, 0x80218220, 0x02008020, 0xc0ded000, > - 0x80040161, 0x1e054220, 0x00000000, 0x00000000, > - 0x80000061, 0x1e254220, 0x00000000, 0xc0ded001, > + 0x80030161, 0x1e054220, 0x00000000, 0x00000000, > + 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, > 0x80000061, 0x1e454220, 0x00000000, 0x00000003, > 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, > - 0x80049031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > + 0x80009031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > 0x80002070, 0x00018220, 0x22001f04, 0xc0ded002, > 0x81000165, 0x80218220, 0x02008020, 0xc0ded003, > @@ -193,84 +193,83 @@ struct iga64_template const iga64_code_breakpoint_suppress[] = { > }; > > struct iga64_template const iga64_code_write_on_exception[] = { > - { .gen_ver = 2000, .size = 56, .code = (const uint32_t []) { > - 0x80100061, 0x04054220, 0x00000000, 0x00000000, > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, > - 0x80000040, 0x02058220, 0x02000014, 0xc0ded001, > - 0x80001969, 0x02058220, 0x02000204, 0xc0ded000, > - 0x80000040, 0x02158220, 0x02000064, 0xc0ded002, > - 0x80041961, 0x04550220, 0x00220205, 0x00000000, > - 0x80000061, 0x04754220, 0x00000000, 0xc0ded003, > - 0x80000965, 0x03058220, 0x02008010, 0xc0ded005, > + { .gen_ver = 2000, .size = 52, .code = (const uint32_t []) { > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, > + 0x800c0061, 0x04054220, 0x00000000, 0x00000000, > + 0x80000069, 0x04558220, 0x02000014, 0x00000002, > + 0x80001940, 0x04558220, 0x02000454, 0xc0ded000, > + 0x80000040, 0x04658220, 0x02000064, 0xc0ded001, > + 0x80000061, 0x04754220, 0x00000000, 0x00000003, > + 0x80000965, 0x03058220, 0x02008010, 0xc0ded003, > 0x80000961, 0x30014220, 0x00000000, 0x00000000, > - 0x80001a70, 0x00018220, 0x12000304, 0xc0ded006, > - 0x84132031, 0x00000000, 0xd00e0494, 0x04000000, > + 0x80001a70, 0x00018220, 0x12000304, 0xc0ded004, > + 0x84032031, 0x00000000, 0xd00e0494, 0x04000000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > { .gen_ver = 1270, .size = 60, .code = (const uint32_t []) { > - 0x80040061, 0x04054220, 0x00000000, 0x00000000, > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, > - 0x80000040, 0x04058220, 0x02000024, 0xc0ded001, > - 0x80001969, 0x04058220, 0x02000404, 0xc0ded000, > - 0x80000040, 0x04258220, 0x020000c4, 0xc0ded002, > - 0x80000061, 0x04454220, 0x00000000, 0xc0ded003, > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, > + 0x80030061, 0x04054220, 0x00000000, 0x00000000, > + 0x80000069, 0x04058220, 0x02000024, 0x00000002, > + 0x80001940, 0x04058220, 0x02000404, 0xc0ded000, > + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded001, > + 0x80000061, 0x04454220, 0x00000000, 0x00000003, > 0x80000061, 0x04850220, 0x000000a4, 0x00000000, > - 0x80000965, 0x03058220, 0x02008020, 0xc0ded005, > + 0x80000965, 0x03058220, 0x02008020, 0xc0ded003, > 0x80000961, 0x30014220, 0x00000000, 0x00000000, > - 0x80001a70, 0x00018220, 0x12000304, 0xc0ded006, > + 0x80001a70, 0x00018220, 0x12000304, 0xc0ded004, > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > - 0x81044031, 0x00000000, 0xc0000414, 0x02a00000, > + 0x81004031, 0x00000000, 0xc0000414, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > { .gen_ver = 1260, .size = 56, .code = (const uint32_t []) { > - 0x80100061, 0x04054220, 0x00000000, 0x00000000, > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, > - 0x80000040, 0x04058220, 0x02000014, 0xc0ded001, > - 0x80001969, 0x04058220, 0x02000404, 0xc0ded000, > - 0x80000040, 0x04158220, 0x02000064, 0xc0ded002, > - 0x80000061, 0x04254220, 0x00000000, 0xc0ded003, > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, > + 0x800c0061, 0x04054220, 0x00000000, 0x00000000, > + 0x80000069, 0x04058220, 0x02000014, 0x00000002, > + 0x80001940, 0x04058220, 0x02000404, 0xc0ded000, > + 0x80000040, 0x04158220, 0x02000064, 0xc0ded001, > + 0x80000061, 0x04254220, 0x00000000, 0x00000003, > 0x80000061, 0x04450220, 0x00000054, 0x00000000, > - 0x80000965, 0x03058220, 0x02008010, 0xc0ded005, > + 0x80000965, 0x03058220, 0x02008010, 0xc0ded003, > 0x80000961, 0x30014220, 0x00000000, 0x00000000, > - 0x80001a70, 0x00018220, 0x12000304, 0xc0ded006, > - 0x84132031, 0x00000000, 0xc0000414, 0x02a00000, > + 0x80001a70, 0x00018220, 0x12000304, 0xc0ded004, > + 0x84032031, 0x00000000, 0xc0000414, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > { .gen_ver = 1250, .size = 60, .code = (const uint32_t []) { > - 0x80040061, 0x04054220, 0x00000000, 0x00000000, > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, > - 0x80000040, 0x04058220, 0x02000024, 0xc0ded001, > - 0x80001969, 0x04058220, 0x02000404, 0xc0ded000, > - 0x80000040, 0x04258220, 0x020000c4, 0xc0ded002, > - 0x80000061, 0x04454220, 0x00000000, 0xc0ded003, > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, > + 0x80030061, 0x04054220, 0x00000000, 0x00000000, > + 0x80000069, 0x04058220, 0x02000024, 0x00000002, > + 0x80001940, 0x04058220, 0x02000404, 0xc0ded000, > + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded001, > + 0x80000061, 0x04454220, 0x00000000, 0x00000003, > 0x80000061, 0x04850220, 0x000000a4, 0x00000000, > - 0x80000965, 0x03058220, 0x02008020, 0xc0ded005, > + 0x80000965, 0x03058220, 0x02008020, 0xc0ded003, > 0x80000961, 0x30014220, 0x00000000, 0x00000000, > - 0x80001a70, 0x00018220, 0x12000304, 0xc0ded006, > + 0x80001a70, 0x00018220, 0x12000304, 0xc0ded004, > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > - 0x81044031, 0x00000000, 0xc0000414, 0x02a00000, > + 0x81004031, 0x00000000, 0xc0000414, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > { .gen_ver = 0, .size = 56, .code = (const uint32_t []) { > - 0x80040061, 0x04054220, 0x00000000, 0x00000000, > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, > - 0x80000040, 0x04058220, 0x02000024, 0xc0ded001, > - 0x80000169, 0x04058220, 0x02000404, 0xc0ded000, > - 0x80000040, 0x04258220, 0x020000c4, 0xc0ded002, > - 0x80000061, 0x04454220, 0x00000000, 0xc0ded003, > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, > + 0x80030061, 0x04054220, 0x00000000, 0x00000000, > + 0x80000069, 0x04058220, 0x02000024, 0x00000002, > + 0x80000140, 0x04058220, 0x02000404, 0xc0ded000, > + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded001, > + 0x80000061, 0x04454220, 0x00000000, 0x00000003, > 0x80000061, 0x04850220, 0x000000a4, 0x00000000, > - 0x80000165, 0x03058220, 0x02008020, 0xc0ded005, > + 0x80000165, 0x03058220, 0x02008020, 0xc0ded003, > 0x80000161, 0x30014220, 0x00000000, 0x00000000, > - 0x80000270, 0x00018220, 0x12000304, 0xc0ded006, > - 0x81049031, 0x00000000, 0xc0000414, 0x02a00000, > + 0x80000270, 0x00018220, 0x12000304, 0xc0ded004, > + 0x81009031, 0x00000000, 0xc0000414, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000101, 0x00010000, 0x00000000, 0x00000000, > @@ -324,84 +323,68 @@ struct iga64_template const iga64_code_clear_exception[] = { > }; > > struct iga64_template const iga64_code_media_block_write[] = { > - { .gen_ver = 2000, .size = 56, .code = (const uint32_t []) { > - 0x80100061, 0x04054220, 0x00000000, 0x00000000, > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, > - 0x80000061, 0x05154220, 0x00000000, 0xc0ded004, > - 0x80000061, 0x05254220, 0x00000000, 0xc0ded005, > - 0x80000061, 0x05354220, 0x00000000, 0xc0ded006, > - 0x80000069, 0x02058220, 0x02000014, 0xc0ded000, > - 0x80000061, 0x02150220, 0x00000064, 0x00000000, > - 0x80001940, 0x02158220, 0x02000214, 0xc0ded001, > - 0x80041961, 0x04550220, 0x00220205, 0x00000000, > - 0x80000061, 0x04754220, 0x00000000, 0xc0ded002, > - 0x80132031, 0x00000000, 0xd00e0494, 0x04000000, > + { .gen_ver = 2000, .size = 40, .code = (const uint32_t []) { > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, > + 0x800c0061, 0x04054220, 0x00000000, 0x00000000, > + 0x80000069, 0x04558220, 0x02000014, 0x00000002, > + 0x80001940, 0x04558220, 0x02000454, 0x00000000, > + 0x80000040, 0x04658220, 0x02000064, 0xc0ded000, > + 0x80000061, 0x04754220, 0x00000000, 0x00000003, > + 0x80032031, 0x00000000, 0xd00e0494, 0x04000000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > - { .gen_ver = 1270, .size = 60, .code = (const uint32_t []) { > - 0x80040061, 0x04054220, 0x00000000, 0x00000000, > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, > - 0x80000061, 0x05254220, 0x00000000, 0xc0ded004, > - 0x80000061, 0x05454220, 0x00000000, 0xc0ded005, > - 0x80000061, 0x05654220, 0x00000000, 0xc0ded006, > - 0x80000069, 0x04058220, 0x02000024, 0xc0ded000, > - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, > - 0x80001940, 0x04258220, 0x02000424, 0xc0ded001, > - 0x80000061, 0x04454220, 0x00000000, 0xc0ded002, > + { .gen_ver = 1270, .size = 48, .code = (const uint32_t []) { > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, > + 0x80030061, 0x04054220, 0x00000000, 0x00000000, > + 0x80000069, 0x04058220, 0x02000024, 0x00000002, > + 0x80001940, 0x04058220, 0x02000404, 0x00000000, > + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, > + 0x80000061, 0x04454220, 0x00000000, 0x00000003, > 0x80000061, 0x04850220, 0x000000a4, 0x00000000, > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > - 0x80044031, 0x00000000, 0xc0000414, 0x02a00000, > + 0x80004031, 0x00000000, 0xc0000414, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > - { .gen_ver = 1260, .size = 56, .code = (const uint32_t []) { > - 0x80100061, 0x04054220, 0x00000000, 0x00000000, > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, > - 0x80000061, 0x05154220, 0x00000000, 0xc0ded004, > - 0x80000061, 0x05254220, 0x00000000, 0xc0ded005, > - 0x80000061, 0x05354220, 0x00000000, 0xc0ded006, > - 0x80000069, 0x04058220, 0x02000014, 0xc0ded000, > - 0x80000061, 0x04150220, 0x00000064, 0x00000000, > - 0x80001940, 0x04158220, 0x02000414, 0xc0ded001, > - 0x80000061, 0x04254220, 0x00000000, 0xc0ded002, > + { .gen_ver = 1260, .size = 44, .code = (const uint32_t []) { > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, > + 0x800c0061, 0x04054220, 0x00000000, 0x00000000, > + 0x80000069, 0x04058220, 0x02000014, 0x00000002, > + 0x80001940, 0x04058220, 0x02000404, 0x00000000, > + 0x80000040, 0x04158220, 0x02000064, 0xc0ded000, > + 0x80000061, 0x04254220, 0x00000000, 0x00000003, > 0x80000061, 0x04450220, 0x00000054, 0x00000000, > - 0x80132031, 0x00000000, 0xc0000414, 0x02a00000, > + 0x80032031, 0x00000000, 0xc0000414, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > - { .gen_ver = 1250, .size = 60, .code = (const uint32_t []) { > - 0x80040061, 0x04054220, 0x00000000, 0x00000000, > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, > - 0x80000061, 0x05254220, 0x00000000, 0xc0ded004, > - 0x80000061, 0x05454220, 0x00000000, 0xc0ded005, > - 0x80000061, 0x05654220, 0x00000000, 0xc0ded006, > - 0x80000069, 0x04058220, 0x02000024, 0xc0ded000, > - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, > - 0x80001940, 0x04258220, 0x02000424, 0xc0ded001, > - 0x80000061, 0x04454220, 0x00000000, 0xc0ded002, > + { .gen_ver = 1250, .size = 48, .code = (const uint32_t []) { > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, > + 0x80030061, 0x04054220, 0x00000000, 0x00000000, > + 0x80000069, 0x04058220, 0x02000024, 0x00000002, > + 0x80001940, 0x04058220, 0x02000404, 0x00000000, > + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, > + 0x80000061, 0x04454220, 0x00000000, 0x00000003, > 0x80000061, 0x04850220, 0x000000a4, 0x00000000, > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > - 0x80044031, 0x00000000, 0xc0000414, 0x02a00000, > + 0x80004031, 0x00000000, 0xc0000414, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > - { .gen_ver = 0, .size = 56, .code = (const uint32_t []) { > - 0x80040061, 0x04054220, 0x00000000, 0x00000000, > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, > - 0x80000061, 0x05254220, 0x00000000, 0xc0ded004, > - 0x80000061, 0x05454220, 0x00000000, 0xc0ded005, > - 0x80000061, 0x05654220, 0x00000000, 0xc0ded006, > - 0x80000069, 0x04058220, 0x02000024, 0xc0ded000, > - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, > - 0x80000140, 0x04258220, 0x02000424, 0xc0ded001, > - 0x80000061, 0x04454220, 0x00000000, 0xc0ded002, > + { .gen_ver = 0, .size = 44, .code = (const uint32_t []) { > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, > + 0x80030061, 0x04054220, 0x00000000, 0x00000000, > + 0x80000069, 0x04058220, 0x02000024, 0x00000002, > + 0x80000140, 0x04058220, 0x02000404, 0x00000000, > + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, > + 0x80000061, 0x04454220, 0x00000000, 0x00000003, > 0x80000061, 0x04850220, 0x000000a4, 0x00000000, > - 0x80049031, 0x00000000, 0xc0000414, 0x02a00000, > + 0x80009031, 0x00000000, 0xc0000414, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000101, 0x00010000, 0x00000000, 0x00000000, > @@ -432,65 +415,68 @@ struct iga64_template const iga64_code_write_aip[] = { > }; > > struct iga64_template const iga64_code_media_block_write_aip[] = { > - { .gen_ver = 2000, .size = 44, .code = (const uint32_t []) { > + { .gen_ver = 2000, .size = 40, .code = (const uint32_t []) { > 0x80000961, 0x05050220, 0x00008020, 0x00000000, > - 0x80000969, 0x02058220, 0x02000014, 0x00000002, > - 0x80000061, 0x02150220, 0x00000064, 0x00000000, > - 0x80001940, 0x02158220, 0x02000214, 0xc0ded000, > - 0x80100061, 0x04054220, 0x00000000, 0x00000000, > - 0x80041a61, 0x04550220, 0x00220205, 0x00000000, > + 0x800c0961, 0x04054220, 0x00000000, 0x00000000, > + 0x80000069, 0x04558220, 0x02000014, 0x00000002, > + 0x80001940, 0x04558220, 0x02000454, 0x00000000, > + 0x80000040, 0x04658220, 0x02000064, 0xc0ded000, > 0x80000061, 0x04754220, 0x00000000, 0x00000003, > - 0x80132031, 0x00000000, 0xd00e0494, 0x04000000, > + 0x80032031, 0x00000000, 0xd00e0494, 0x04000000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > - { .gen_ver = 1270, .size = 44, .code = (const uint32_t []) { > + { .gen_ver = 1270, .size = 48, .code = (const uint32_t []) { > 0x80000961, 0x05050220, 0x00008040, 0x00000000, > - 0x80000969, 0x04058220, 0x02000024, 0x00000002, > - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, > - 0x80001940, 0x04258220, 0x02000424, 0xc0ded000, > + 0x80030961, 0x04054220, 0x00000000, 0x00000000, > + 0x80000069, 0x04058220, 0x02000024, 0x00000002, > + 0x80001940, 0x04058220, 0x02000404, 0x00000000, > + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, > 0x80000061, 0x04454220, 0x00000000, 0x00000003, > 0x80000061, 0x04850220, 0x000000a4, 0x00000000, > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > - 0x80044031, 0x00000000, 0xc0000414, 0x02a00000, > + 0x80004031, 0x00000000, 0xc0000414, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > - { .gen_ver = 1260, .size = 40, .code = (const uint32_t []) { > + { .gen_ver = 1260, .size = 44, .code = (const uint32_t []) { > 0x80000961, 0x05050220, 0x00008020, 0x00000000, > - 0x80000969, 0x04058220, 0x02000014, 0x00000002, > - 0x80000061, 0x04150220, 0x00000064, 0x00000000, > - 0x80001940, 0x04158220, 0x02000414, 0xc0ded000, > + 0x800c0961, 0x04054220, 0x00000000, 0x00000000, > + 0x80000069, 0x04058220, 0x02000014, 0x00000002, > + 0x80001940, 0x04058220, 0x02000404, 0x00000000, > + 0x80000040, 0x04158220, 0x02000064, 0xc0ded000, > 0x80000061, 0x04254220, 0x00000000, 0x00000003, > 0x80000061, 0x04450220, 0x00000054, 0x00000000, > - 0x80132031, 0x00000000, 0xc0000414, 0x02a00000, > + 0x80032031, 0x00000000, 0xc0000414, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > - { .gen_ver = 1250, .size = 44, .code = (const uint32_t []) { > + { .gen_ver = 1250, .size = 48, .code = (const uint32_t []) { > 0x80000961, 0x05050220, 0x00008040, 0x00000000, > - 0x80000969, 0x04058220, 0x02000024, 0x00000002, > - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, > - 0x80001940, 0x04258220, 0x02000424, 0xc0ded000, > + 0x80030961, 0x04054220, 0x00000000, 0x00000000, > + 0x80000069, 0x04058220, 0x02000024, 0x00000002, > + 0x80001940, 0x04058220, 0x02000404, 0x00000000, > + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, > 0x80000061, 0x04454220, 0x00000000, 0x00000003, > 0x80000061, 0x04850220, 0x000000a4, 0x00000000, > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > - 0x80044031, 0x00000000, 0xc0000414, 0x02a00000, > + 0x80004031, 0x00000000, 0xc0000414, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > - { .gen_ver = 0, .size = 40, .code = (const uint32_t []) { > + { .gen_ver = 0, .size = 44, .code = (const uint32_t []) { > 0x80000161, 0x05050220, 0x00008040, 0x00000000, > - 0x80000169, 0x04058220, 0x02000024, 0x00000002, > - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, > - 0x80000140, 0x04258220, 0x02000424, 0xc0ded000, > + 0x80030161, 0x04054220, 0x00000000, 0x00000000, > + 0x80000069, 0x04058220, 0x02000024, 0x00000002, > + 0x80000140, 0x04058220, 0x02000404, 0x00000000, > + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, > 0x80000061, 0x04454220, 0x00000000, 0x00000003, > 0x80000061, 0x04850220, 0x000000a4, 0x00000000, > - 0x80049031, 0x00000000, 0xc0000414, 0x02a00000, > + 0x80009031, 0x00000000, 0xc0000414, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000101, 0x00010000, 0x00000000, 0x00000000, > @@ -499,77 +485,77 @@ struct iga64_template const iga64_code_media_block_write_aip[] = { > > struct iga64_template const iga64_code_common_target_write[] = { > { .gen_ver = 2000, .size = 48, .code = (const uint32_t []) { > - 0x80100061, 0x1e054220, 0x00000000, 0x00000000, > 0x80100061, 0x1f054220, 0x00000000, 0x00000000, > 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, > 0x80000061, 0x1f154220, 0x00000000, 0xc0ded002, > 0x80000061, 0x1f254220, 0x00000000, 0xc0ded003, > 0x80000061, 0x1f354220, 0x00000000, 0xc0ded004, > + 0x800c0061, 0x1e054220, 0x00000000, 0x00000000, > 0x80000061, 0x1e654220, 0x00000000, 0xc0ded000, > 0x80000061, 0x1e754220, 0x00000000, 0x0000000f, > - 0x80132031, 0x00000000, 0xd00e1e94, 0x04000000, > + 0x80032031, 0x00000000, 0xd00e1e94, 0x04000000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > { .gen_ver = 1270, .size = 56, .code = (const uint32_t []) { > - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, > 0x80040061, 0x1f054220, 0x00000000, 0x00000000, > 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, > 0x80000061, 0x1f254220, 0x00000000, 0xc0ded002, > 0x80000061, 0x1f454220, 0x00000000, 0xc0ded003, > 0x80000061, 0x1f654220, 0x00000000, 0xc0ded004, > + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, > 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, > 0x80000061, 0x1e454220, 0x00000000, 0x0000000f, > 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > - 0x80044031, 0x00000000, 0xc0001e14, 0x02a00000, > + 0x80004031, 0x00000000, 0xc0001e14, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > { .gen_ver = 1260, .size = 52, .code = (const uint32_t []) { > - 0x80100061, 0x1e054220, 0x00000000, 0x00000000, > 0x80100061, 0x1f054220, 0x00000000, 0x00000000, > 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, > 0x80000061, 0x1f154220, 0x00000000, 0xc0ded002, > 0x80000061, 0x1f254220, 0x00000000, 0xc0ded003, > 0x80000061, 0x1f354220, 0x00000000, 0xc0ded004, > + 0x800c0061, 0x1e054220, 0x00000000, 0x00000000, > 0x80000061, 0x1e154220, 0x00000000, 0xc0ded000, > 0x80000061, 0x1e254220, 0x00000000, 0x0000000f, > 0x80000061, 0x1e450220, 0x00000054, 0x00000000, > - 0x80132031, 0x00000000, 0xc0001e14, 0x02a00000, > + 0x80032031, 0x00000000, 0xc0001e14, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > { .gen_ver = 1250, .size = 56, .code = (const uint32_t []) { > - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, > 0x80040061, 0x1f054220, 0x00000000, 0x00000000, > 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, > 0x80000061, 0x1f254220, 0x00000000, 0xc0ded002, > 0x80000061, 0x1f454220, 0x00000000, 0xc0ded003, > 0x80000061, 0x1f654220, 0x00000000, 0xc0ded004, > + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, > 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, > 0x80000061, 0x1e454220, 0x00000000, 0x0000000f, > 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > - 0x80044031, 0x00000000, 0xc0001e14, 0x02a00000, > + 0x80004031, 0x00000000, 0xc0001e14, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > { .gen_ver = 0, .size = 52, .code = (const uint32_t []) { > - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, > 0x80040061, 0x1f054220, 0x00000000, 0x00000000, > 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, > 0x80000061, 0x1f254220, 0x00000000, 0xc0ded002, > 0x80000061, 0x1f454220, 0x00000000, 0xc0ded003, > 0x80000061, 0x1f654220, 0x00000000, 0xc0ded004, > + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, > 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, > 0x80000061, 0x1e454220, 0x00000000, 0x0000000f, > 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, > - 0x80049031, 0x00000000, 0xc0001e14, 0x02a00000, > + 0x80009031, 0x00000000, 0xc0001e14, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000101, 0x00010000, 0x00000000, 0x00000000, > @@ -627,56 +613,56 @@ struct iga64_template const iga64_code_clear_r40[] = { > > struct iga64_template const iga64_code_jump_dw_neq[] = { > { .gen_ver = 2000, .size = 32, .code = (const uint32_t []) { > - 0x80100061, 0x1e054220, 0x00000000, 0x00000000, > + 0x800c0061, 0x1e054220, 0x00000000, 0x00000000, > 0x80000061, 0x1e654220, 0x00000000, 0xc0ded000, > 0x80000061, 0x1e754220, 0x00000000, 0x00000003, > - 0x80132031, 0x1f0c0000, 0xd0061e8c, 0x04000000, > + 0x80032031, 0x1f0c0000, 0xd0061e8c, 0x04000000, > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > 0x80008070, 0x00018220, 0x22001f04, 0xc0ded001, > 0x84000020, 0x00004000, 0x00000000, 0xffffffa0, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > { .gen_ver = 1270, .size = 40, .code = (const uint32_t []) { > - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, > + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, > 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, > 0x80000061, 0x1e454220, 0x00000000, 0x00000003, > 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > - 0x80044031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > + 0x80004031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > 0x80002070, 0x00018220, 0x22001f04, 0xc0ded001, > 0x81000020, 0x00004000, 0x00000000, 0xffffff80, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > { .gen_ver = 1260, .size = 36, .code = (const uint32_t []) { > - 0x80100061, 0x1e054220, 0x00000000, 0x00000000, > + 0x800c0061, 0x1e054220, 0x00000000, 0x00000000, > 0x80000061, 0x1e154220, 0x00000000, 0xc0ded000, > 0x80000061, 0x1e254220, 0x00000000, 0x00000003, > 0x80000061, 0x1e450220, 0x00000054, 0x00000000, > - 0x80132031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > + 0x80032031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > 0x80008070, 0x00018220, 0x22001f04, 0xc0ded001, > 0x84000020, 0x00004000, 0x00000000, 0xffffff90, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > { .gen_ver = 1250, .size = 40, .code = (const uint32_t []) { > - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, > + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, > 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, > 0x80000061, 0x1e454220, 0x00000000, 0x00000003, > 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > - 0x80044031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > + 0x80004031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > 0x80002070, 0x00018220, 0x22001f04, 0xc0ded001, > 0x81000020, 0x00004000, 0x00000000, 0xffffff80, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > { .gen_ver = 0, .size = 36, .code = (const uint32_t []) { > - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, > + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, > 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, > 0x80000061, 0x1e454220, 0x00000000, 0x00000003, > 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, > - 0x80049031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > + 0x80009031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > 0x80002070, 0x00018220, 0x22001f04, 0xc0ded001, > 0x81000120, 0x00004000, 0x00000000, 0xffffff90, > diff --git a/lib/iga64_macros.h b/lib/iga64_macros.h > index 6459b524c3fd..40b6338928e1 100644 > --- a/lib/iga64_macros.h > +++ b/lib/iga64_macros.h > @@ -16,4 +16,47 @@ > #define src1_null null:0 > #endif > > +/* GPGPU_R0Payload fields, Bspec: 55396, 56587 */ > +#define R0_TGIDX r0.1<0;1,0>:ud > +#define R0_TGIDY r0.6<0;1,0>:ud > +#define R0_FFTID r0.5<0;1,0>:ud > + > +#define SET_SHARED_MEDIA_BLOCK_MSG_HDR(dst, y, width) \ > +(W) mov (8) dst.0<1>:ud 0x0:ud ;\ > +(W) mov (1) dst.1<1>:ud y ;\ > +(W) mov (1) dst.2<1>:ud (width - 1):ud ;\ > +(W) mov (1) dst.4<1>:ud R0_FFTID > + > +#define SET_THREAD_MEDIA_BLOCK_MSG_HDR(dst, x, y, width) \ > +(W) mov (8) dst.0<1>:ud 0x0:ud ;\ > +(W) shl (1) dst.0<1>:ud R0_TGIDX 0x2:ud ;\ > +(W) add (1) dst.0<1>:ud dst.0<0;1,0>:ud x:ud ;\ > +(W) add (1) dst.1<1>:ud R0_TGIDY y ;\ > +(W) mov (1) dst.2<1>:ud (width - 1):ud ;\ > +(W) mov (1) dst.4<1>:ud R0_FFTID > + > +#define SET_SHARED_MEDIA_A2DBLOCK_PAYLOAD(dst, y, width) \ > +(W) mov (8) dst.0<1>:ud 0x0:ud ;\ > +(W) mov (1) dst.6<1>:ud y ;\ > +(W) mov (1) dst.7<1>:ud (width - 1):ud > + > +#define SET_THREAD_MEDIA_A2DBLOCK_PAYLOAD(dst, x, y, width) \ > +(W) mov (8) dst.0<1>:ud 0x0:ud ;\ > +(W) shl (1) dst.5<1>:ud R0_TGIDX 0x2:ud ;\ > +(W) add (1) dst.5<1>:ud dst.5<0;1,0>:ud x:ud ;\ > +(W) add (1) dst.6<1>:ud R0_TGIDY y ;\ > +(W) mov (1) dst.7<1>:ud (width - 1):ud ;\ > + > +#if GEN_VER < 2000 > +#define SET_SHARED_SPACE_ADDR(dst, y, width) SET_SHARED_MEDIA_BLOCK_MSG_HDR(dst, y, width) > +#define SET_THREAD_SPACE_ADDR(dst, x, y, width) SET_THREAD_MEDIA_BLOCK_MSG_HDR(dst, x, y, width) > +#define LOAD_SPACE_DW(dst, src) send.dc1 (1) dst src src1_null 0x0 0x2190000 > +#define STORE_SPACE_DW(dst, src) send.dc1 (1) null dst null 0x0 0x40A8000 > +#else > +#define SET_SHARED_SPACE_ADDR(dst, y, width) SET_SHARED_MEDIA_A2DBLOCK_PAYLOAD(dst, y, width) > +#define SET_THREAD_SPACE_ADDR(dst, x, y, width) SET_THREAD_MEDIA_A2DBLOCK_PAYLOAD(dst, x, y, width) > +#define LOAD_SPACE_DW(dst, src) send.tgm (1) dst src null:0 0x0 0x62100003 > +#define STORE_SPACE_DW(dst, src) send.tgm (1) null dst null:0 0x0 0x64000007 > +#endif > + > #endif > ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v3 2/4] lib/gpgpu_shader: simplify load/store shaders 2024-11-22 14:05 ` Grzegorzek, Dominik @ 2024-11-22 14:22 ` Hajda, Andrzej 2024-11-22 14:28 ` Grzegorzek, Dominik 0 siblings, 1 reply; 15+ messages in thread From: Hajda, Andrzej @ 2024-11-22 14:22 UTC (permalink / raw) To: Grzegorzek, Dominik, igt-dev@lists.freedesktop.org Cc: Kempczynski, Zbigniew, Mun, Gwan-gyeong, Manszewski, Christoph, kamil.konieczny@linux.intel.com W dniu 22.11.2024 o 15:05, Grzegorzek, Dominik pisze: > On Thu, 2024-11-21 at 18:12 +0100, Andrzej Hajda wrote: >> There is lot of redundancy in shaders code regarding load/store messages. >> It makes the code barely readable. Simplify it by using macros in iga64 >> assembler. >> Every load/store operation is split into two phases: >> 1. Load address/descriptor (from) where data should be stored/loaded. >> 2. Issue load/store instruction. >> Shader threads needs two types of memory access: >> 3. Private area per thread. >> 4. Area shared per all threads. >> Different platforms access surface in different ways: >> 5. Using media block messages. >> 6. Using untyped 2d block messages. >> 7. Future platforms will use different messages. >> >> All this is simplified to two macros per message in shader: >> load_(shared|thread)_space_addr(dst,y,width) >> (load|store)_space_dw(dst, src) >> >> v2: >> - captialze introduced macros (Dominik) >> - fixed thread -> shared call (Zbigniew) >> >> Signed-off-by: Andrzej Hajda <andrzej.hajda@intel.com> >> --- >> lib/gpgpu_shader.c | 160 +++------------------- >> lib/iga64_generated_codes.c | 318 +++++++++++++++++++++----------------------- >> lib/iga64_macros.h | 43 ++++++ >> 3 files changed, 215 insertions(+), 306 deletions(-) >> >> diff --git a/lib/gpgpu_shader.c b/lib/gpgpu_shader.c >> index 4e1b8d5e9009..363435e7efd3 100644 >> --- a/lib/gpgpu_shader.c >> +++ b/lib/gpgpu_shader.c >> @@ -431,22 +431,8 @@ void gpgpu_shader__jump_neq(struct gpgpu_shader *shdr, int label_id, >> >> size = emit_iga64_code(shdr, jump_dw_neq, " \n\ >> L0: \n\ >> -(W) mov (16|M0) r30.0<1>:ud 0x0:ud \n\ >> -#if GEN_VER < 2000 // Media Block Write \n\ >> - // Y offset of the block in rows := thread group id Y \n\ >> -(W) mov (1|M0) r30.1<1>:ud ARG(0):ud \n\ >> - // block width [0,63] representing 1 to 64 bytes, we want dword \n\ >> -(W) mov (1|M0) r30.2<1>:ud 0x3:ud \n\ >> - // FFTID := FFTID from R0 header \n\ >> -(W) mov (1|M0) r30.4<1>:ud r0.5<0;1,0>:ud \n\ >> -(W) send.dc1 (16|M0) r31 r30 null 0x0 0x2190000 \n\ >> -#else // Typed 2D Block Store \n\ >> - // Store X and Y block start (160:191 and 192:223) \n\ >> -(W) mov (1|M0) r30.6<1>:ud ARG(0):ud \n\ >> - // Store X and Y block size (224:231 and 232:239) \n\ >> -(W) mov (1|M0) r30.7<1>:ud 0x3:ud \n\ >> -(W) send.tgm (16|M0) r31 r30 null:0 0x0 0x62100003 \n\ >> -#endif \n\ >> + SET_SHARED_SPACE_ADDR(r30, ARG(0):ud, 4) \n\ >> +(W) LOAD_SPACE_DW(r31, r30) \n\ > It's a bit odd to me, that in case of LOAD_SPACE_DW you leave an user with a choice > wheter to set Write Enable (W). Is there any possible use case when we do not won't to set it before > send message? Especially, taking into account that we aready always did it perparing the message. > Moving (W) inside the macro would be cleaner. And it will spare a future user a dillema wheter use > it or not. Sometimes it is '(W)', sometimes '(W&f0.0)' (gpgpu_shader__write_on_exception), I think it is easier this way than via extra argument, or separate macro. Regards Andrzej > > Other than that I did not spot more issues. Great cleanup indeed, so from my side it is: > Reviewed-by: Dominik Grzegorzek <dominik.grzegorzek@intel.com> > >> // clear the flag register \n\ >> (W) mov (1|M0) f0.0<1>:ud 0x0:ud \n\ >> (W) cmp (1|M0) (ne)f0.0 null<1>:ud r31.0<0;1,0>:ud ARG(1):ud \n\ >> @@ -511,28 +497,13 @@ void gpgpu_shader__common_target_write(struct gpgpu_shader *shdr, >> uint32_t y_offset, const uint32_t value[4]) >> { >> emit_iga64_code(shdr, common_target_write, " \n\ >> -(W) mov (16|M0) r30.0<1>:ud 0x0:ud \n\ >> (W) mov (16|M0) r31.0<1>:ud 0x0:ud \n\ >> (W) mov (1|M0) r31.0<1>:ud ARG(1):ud \n\ >> (W) mov (1|M0) r31.1<1>:ud ARG(2):ud \n\ >> (W) mov (1|M0) r31.2<1>:ud ARG(3):ud \n\ >> (W) mov (1|M0) r31.3<1>:ud ARG(4):ud \n\ >> -#if GEN_VER < 2000 // Media Block Write \n\ >> - // Y offset of the block in rows \n\ >> -(W) mov (1|M0) r30.1<1>:ud ARG(0):ud \n\ >> - // block width [0,63] representing 1 to 64 bytes \n\ >> -(W) mov (1|M0) r30.2<1>:ud 0xf:ud \n\ >> - // FFTID := FFTID from R0 header \n\ >> -(W) mov (1|M0) r30.4<1>:ud r0.5<0;1,0>:ud \n\ >> - // written value \n\ >> -(W) send.dc1 (16|M0) null r30 src1_null 0x0 0x40A8000 \n\ >> -#else // Typed 2D Block Store \n\ >> - // Store X and Y block start (160:191 and 192:223) \n\ >> -(W) mov (1|M0) r30.6<1>:ud ARG(0):ud \n\ >> - // Store X and Y block size (224:231 and 232:239) \n\ >> -(W) mov (1|M0) r30.7<1>:ud 0xf:ud \n\ >> -(W) send.tgm (16|M0) null r30 null:0 0x0 0x64000007 \n\ >> -#endif \n\ >> + SET_SHARED_SPACE_ADDR(r30, ARG(0):ud, 16) \n\ >> +(W) STORE_SPACE_DW(r30, r31) \n\ >> ", y_offset, value[0], value[1], value[2], value[3]); >> } >> >> @@ -565,31 +536,8 @@ void gpgpu_shader__write_aip(struct gpgpu_shader *shdr, uint32_t y_offset) >> emit_iga64_code(shdr, media_block_write_aip, " \n\ >> // Payload \n\ >> (W) mov (1|M0) r5.0<1>:ud cr0.2:ud \n\ >> -#if GEN_VER < 2000 // Media Block Write \n\ >> - // X offset of the block in bytes := (thread group id X << ARG(0)) \n\ >> -(W) shl (1|M0) r4.0<1>:ud r0.1<0;1,0>:ud 0x2:ud \n\ >> - // Y offset of the block in rows := thread group id Y \n\ >> -(W) mov (1|M0) r4.1<1>:ud r0.6<0;1,0>:ud \n\ >> -(W) add (1|M0) r4.1<1>:ud r4.1<0;1,0>:ud ARG(0):ud \n\ >> - // block width [0,63] representing 1 to 64 bytes \n\ >> -(W) mov (1|M0) r4.2<1>:ud 0x3:ud \n\ >> - // FFTID := FFTID from R0 header \n\ >> -(W) mov (1|M0) r4.4<1>:ud r0.5<0;1,0>:ud \n\ >> -(W) send.dc1 (16|M0) null r4 src1_null 0 0x40A8000 \n\ >> -#else // Typed 2D Block Store \n\ >> - // Load r2.0-3 with tg id X << ARG(0) \n\ >> -(W) shl (1|M0) r2.0<1>:ud r0.1<0;1,0>:ud 0x2:ud \n\ >> - // Load r2.4-7 with tg id Y + ARG(1):ud \n\ >> -(W) mov (1|M0) r2.1<1>:ud r0.6<0;1,0>:ud \n\ >> -(W) add (1|M0) r2.1<1>:ud r2.1<0;1,0>:ud ARG(0):ud \n\ >> - // payload setup \n\ >> -(W) mov (16|M0) r4.0<1>:ud 0x0:ud \n\ >> - // Store X and Y block start (160:191 and 192:223) \n\ >> -(W) mov (2|M0) r4.5<1>:ud r2.0<2;2,1>:ud \n\ >> - // Store X and Y block max_size (224:231 and 232:239) \n\ >> -(W) mov (1|M0) r4.7<1>:ud 0x3:ud \n\ >> -(W) send.tgm (16|M0) null r4 null:0 0 0x64000007 \n\ >> -#endif \n\ >> + SET_THREAD_SPACE_ADDR(r4, 0, ARG(0):ud, 4) \n\ >> +(W) STORE_SPACE_DW(r4, r5) \n\ >> ", y_offset); >> } >> >> @@ -618,38 +566,11 @@ void gpgpu_shader__increase_aip(struct gpgpu_shader *shdr, uint32_t value) >> void gpgpu_shader__write_dword(struct gpgpu_shader *shdr, uint32_t value, >> uint32_t y_offset) >> { >> - emit_iga64_code(shdr, media_block_write, " \n\ >> - // Clear message header \n\ >> -(W) mov (16|M0) r4.0<1>:ud 0x0:ud \n\ >> - // Payload \n\ >> -(W) mov (1|M0) r5.0<1>:ud ARG(3):ud \n\ >> -(W) mov (1|M0) r5.1<1>:ud ARG(4):ud \n\ >> -(W) mov (1|M0) r5.2<1>:ud ARG(5):ud \n\ >> -(W) mov (1|M0) r5.3<1>:ud ARG(6):ud \n\ >> -#if GEN_VER < 2000 // Media Block Write \n\ >> - // X offset of the block in bytes := (thread group id X << ARG(0)) \n\ >> -(W) shl (1|M0) r4.0<1>:ud r0.1<0;1,0>:ud ARG(0):ud \n\ >> - // Y offset of the block in rows := thread group id Y \n\ >> -(W) mov (1|M0) r4.1<1>:ud r0.6<0;1,0>:ud \n\ >> -(W) add (1|M0) r4.1<1>:ud r4.1<0;1,0>:ud ARG(1):ud \n\ >> - // block width [0,63] representing 1 to 64 bytes \n\ >> -(W) mov (1|M0) r4.2<1>:ud ARG(2):ud \n\ >> - // FFTID := FFTID from R0 header \n\ >> -(W) mov (1|M0) r4.4<1>:ud r0.5<0;1,0>:ud \n\ >> -(W) send.dc1 (16|M0) null r4 src1_null 0 0x40A8000 \n\ >> -#else // Typed 2D Block Store \n\ >> - // Load r2.0-3 with tg id X << ARG(0) \n\ >> -(W) shl (1|M0) r2.0<1>:ud r0.1<0;1,0>:ud ARG(0):ud \n\ >> - // Load r2.4-7 with tg id Y + ARG(1):ud \n\ >> -(W) mov (1|M0) r2.1<1>:ud r0.6<0;1,0>:ud \n\ >> -(W) add (1|M0) r2.1<1>:ud r2.1<0;1,0>:ud ARG(1):ud \n\ >> - // Store X and Y block start (160:191 and 192:223) \n\ >> -(W) mov (2|M0) r4.5<1>:ud r2.0<2;2,1>:ud \n\ >> - // Store X and Y block max_size (224:231 and 232:239) \n\ >> -(W) mov (1|M0) r4.7<1>:ud ARG(2):ud \n\ >> -(W) send.tgm (16|M0) null r4 null:0 0 0x64000007 \n\ >> -#endif \n\ >> - ", 2, y_offset, 3, value, value, value, value); >> + emit_iga64_code(shdr, media_block_write, " \n\ >> +(W) mov (1) r5.0<1>:ud ARG(1):ud \n\ >> + SET_THREAD_SPACE_ADDR(r4, 0, ARG(0):ud, 4) \n\ >> +(W) STORE_SPACE_DW(r4, r5) \n\ >> + ", y_offset, value); >> } >> >> /** >> @@ -697,41 +618,14 @@ void gpgpu_shader__write_on_exception(struct gpgpu_shader *shdr, uint32_t value, >> uint32_t y_offset, uint32_t mask, uint32_t expected) >> { >> emit_iga64_code(shdr, write_on_exception, " \n\ >> - // Clear message header \n\ >> -(W) mov (16|M0) r4.0<1>:ud 0x0:ud \n\ >> - // Payload \n\ >> -(W) mov (1|M0) r5.0<1>:ud ARG(4):ud \n\ >> -#if GEN_VER < 2000 // prepare Media Block Write \n\ >> - // X offset of the block in bytes := (thread group id X << ARG(0)) \n\ >> -(W) add (1|M0) r4.0<1>:ud r0.1<0;1,0>:ud ARG(1):ud \n\ >> -(W) shl (1|M0) r4.0<1>:ud r4.0<0;1,0>:ud ARG(0):ud \n\ >> - // Y offset of the block in rows := thread group id Y \n\ >> -(W) add (1|M0) r4.1<1>:ud r0.6<0;1,0>:ud ARG(2):ud \n\ >> - // block width [0,63] representing 1 to 64 bytes \n\ >> -(W) mov (1|M0) r4.2<1>:ud ARG(3):ud \n\ >> - // FFTID := FFTID from R0 header \n\ >> -(W) mov (1|M0) r4.4<1>:ud r0.5<0;1,0>:ud \n\ >> -#else // prepare Typed 2D Block Store \n\ >> - // Load r2.0 with tg id (X + ARG(1)) << ARG(0) \n\ >> -(W) add (1|M0) r2.0<1>:ud r0.1<0;1,0>:ud ARG(1):ud \n\ >> -(W) shl (1|M0) r2.0<1>:ud r2.0<0;1,0>:ud ARG(0):ud \n\ >> - // Load r2.4-7 with tg id Y + ARG(2):ud \n\ >> -(W) add (1|M0) r2.1<1>:ud r0.6<0;1,0>:ud ARG(2):ud \n\ >> - // Store X and Y block start (160:191 and 192:223) \n\ >> -(W) mov (2|M0) r4.5<1>:ud r2.0<2;2,1>:ud \n\ >> - // Store X and Y block max_size (224:231 and 232:239) \n\ >> -(W) mov (1|M0) r4.7<1>:ud ARG(3):ud \n\ >> -#endif \n\ >> +(W) mov (1|M0) r5.0<1>:ud ARG(2):ud \n\ >> + SET_THREAD_SPACE_ADDR(r4, ARG(0), ARG(1):ud, 4) \n\ >> // Check if masked exception is equal to provided value and write conditionally \n\ >> -(W) and (1|M0) r3.0<1>:ud cr0.1<0;1,0>:ud ARG(5):ud \n\ >> -(W) mov (1|M0) f0.0<1>:ud 0x0:ud \n\ >> -(W) cmp (1|M0) (eq)f0.0 null:ud r3.0<0;1,0>:ud ARG(6):ud \n\ >> -#if GEN_VER < 2000 // Media Block Write \n\ >> -(W&f0.0) send.dc1 (16|M0) null r4 src1_null 0 0x40A8000 \n\ >> -#else // Typed 2D Block Store \n\ >> -(W&f0.0) send.tgm (16|M0) null r4 null:0 0 0x64000007 \n\ >> -#endif \n\ >> - ", 2, x_offset, y_offset, 3, value, mask, expected); >> +(W) and (1|M0) r3.0<1>:ud cr0.1<0;1,0>:ud ARG(3):ud \n\ >> +(W) mov (1|M0) f0.0<1>:ud 0x0:ud \n\ >> +(W) cmp (1|M0) (eq)f0.0 null:ud r3.0<0;1,0>:ud ARG(4):ud \n\ >> +(W&f0.0) STORE_SPACE_DW(r4, r5) \n\ >> + ", 4 * x_offset, y_offset, value, mask, expected); >> } >> >> /** >> @@ -778,22 +672,8 @@ void gpgpu_shader__end_system_routine_step_if_eq(struct gpgpu_shader *shdr, >> emit_iga64_code(shdr, end_system_routine_step_if_eq, " \n\ >> (W) or (1|M0) cr0.0<1>:ud cr0.0<0;1,0>:ud 0x8000:ud \n\ >> (W) and (1|M0) cr0.1<1>:ud cr0.1<0;1,0>:ud ARG(0):ud \n\ >> -(W) mov (16|M0) r30.0<1>:ud 0x0:ud \n\ >> -#if GEN_VER < 2000 // Media Block Write \n\ >> - // Y offset of the block in rows := thread group id Y \n\ >> -(W) mov (1|M0) r30.1<1>:ud ARG(1):ud \n\ >> - // block width [0,63] representing 1 to 64 bytes, we want dword \n\ >> -(W) mov (1|M0) r30.2<1>:ud 0x3:ud \n\ >> - // FFTID := FFTID from R0 header \n\ >> -(W) mov (1|M0) r30.4<1>:ud r0.5<0;1,0>:ud \n\ >> -(W) send.dc1 (16|M0) r31 r30 null 0x0 0x2190000 \n\ >> -#else // Typed 2D Block Store \n\ >> - // Store X and Y block start (160:191 and 192:223) \n\ >> -(W) mov (1|M0) r30.6<1>:ud ARG(1):ud \n\ >> - // Store X and Y block size (224:231 and 232:239) \n\ >> -(W) mov (1|M0) r30.7<1>:ud 0x3:ud \n\ >> -(W) send.tgm (16|M0) r31 r30 null:0 0x0 0x62100003 \n\ >> -#endif \n\ >> + SET_SHARED_SPACE_ADDR(r30, ARG(0):ud, 4) \n\ >> +(W) LOAD_SPACE_DW(r31, r30) \n\ >> // clear the flag register \n\ >> (W) mov (1|M0) f0.0<1>:ud 0x0:ud \n\ >> (W) cmp (1|M0) (ne)f0.0 null<1>:ud r31.0<0;1,0>:ud ARG(2):ud \n\ >> diff --git a/lib/iga64_generated_codes.c b/lib/iga64_generated_codes.c >> index 41be66f74486..04015b0b6d29 100644 >> --- a/lib/iga64_generated_codes.c >> +++ b/lib/iga64_generated_codes.c >> @@ -3,7 +3,7 @@ >> >> #include "gpgpu_shader.h" >> >> -#define MD5_SUM_IGA64_ASMS 09d72b5fd1f62c8c2905caa80f400567 >> +#define MD5_SUM_IGA64_ASMS da66be3cf9bec819a61429de75943011 >> >> struct iga64_template const iga64_code_gpgpu_fill[] = { >> { .gen_ver = 2000, .size = 44, .code = (const uint32_t []) { >> @@ -83,10 +83,10 @@ struct iga64_template const iga64_code_end_system_routine_step_if_eq[] = { >> { .gen_ver = 2000, .size = 44, .code = (const uint32_t []) { >> 0x80000966, 0x80018220, 0x02008000, 0x00008000, >> 0x80000965, 0x80118220, 0x02008010, 0xc0ded000, >> - 0x80100961, 0x1e054220, 0x00000000, 0x00000000, >> - 0x80000061, 0x1e654220, 0x00000000, 0xc0ded001, >> + 0x800c0961, 0x1e054220, 0x00000000, 0x00000000, >> + 0x80000061, 0x1e654220, 0x00000000, 0xc0ded000, >> 0x80000061, 0x1e754220, 0x00000000, 0x00000003, >> - 0x80132031, 0x1f0c0000, 0xd0061e8c, 0x04000000, >> + 0x80032031, 0x1f0c0000, 0xd0061e8c, 0x04000000, >> 0x80000061, 0x30014220, 0x00000000, 0x00000000, >> 0x80008070, 0x00018220, 0x22001f04, 0xc0ded002, >> 0x84000965, 0x80118220, 0x02008010, 0xc0ded003, >> @@ -96,12 +96,12 @@ struct iga64_template const iga64_code_end_system_routine_step_if_eq[] = { >> { .gen_ver = 1270, .size = 52, .code = (const uint32_t []) { >> 0x80000966, 0x80018220, 0x02008000, 0x00008000, >> 0x80000965, 0x80218220, 0x02008020, 0xc0ded000, >> - 0x80040961, 0x1e054220, 0x00000000, 0x00000000, >> - 0x80000061, 0x1e254220, 0x00000000, 0xc0ded001, >> + 0x80030961, 0x1e054220, 0x00000000, 0x00000000, >> + 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, >> 0x80000061, 0x1e454220, 0x00000000, 0x00000003, >> 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, >> 0x80001901, 0x00010000, 0x00000000, 0x00000000, >> - 0x80044031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> + 0x80004031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> 0x80000061, 0x30014220, 0x00000000, 0x00000000, >> 0x80002070, 0x00018220, 0x22001f04, 0xc0ded002, >> 0x81000965, 0x80218220, 0x02008020, 0xc0ded003, >> @@ -111,11 +111,11 @@ struct iga64_template const iga64_code_end_system_routine_step_if_eq[] = { >> { .gen_ver = 1260, .size = 48, .code = (const uint32_t []) { >> 0x80000966, 0x80018220, 0x02008000, 0x00008000, >> 0x80000965, 0x80118220, 0x02008010, 0xc0ded000, >> - 0x80100961, 0x1e054220, 0x00000000, 0x00000000, >> - 0x80000061, 0x1e154220, 0x00000000, 0xc0ded001, >> + 0x800c0961, 0x1e054220, 0x00000000, 0x00000000, >> + 0x80000061, 0x1e154220, 0x00000000, 0xc0ded000, >> 0x80000061, 0x1e254220, 0x00000000, 0x00000003, >> 0x80000061, 0x1e450220, 0x00000054, 0x00000000, >> - 0x80132031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> + 0x80032031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> 0x80000061, 0x30014220, 0x00000000, 0x00000000, >> 0x80008070, 0x00018220, 0x22001f04, 0xc0ded002, >> 0x84000965, 0x80118220, 0x02008010, 0xc0ded003, >> @@ -125,12 +125,12 @@ struct iga64_template const iga64_code_end_system_routine_step_if_eq[] = { >> { .gen_ver = 1250, .size = 52, .code = (const uint32_t []) { >> 0x80000966, 0x80018220, 0x02008000, 0x00008000, >> 0x80000965, 0x80218220, 0x02008020, 0xc0ded000, >> - 0x80040961, 0x1e054220, 0x00000000, 0x00000000, >> - 0x80000061, 0x1e254220, 0x00000000, 0xc0ded001, >> + 0x80030961, 0x1e054220, 0x00000000, 0x00000000, >> + 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, >> 0x80000061, 0x1e454220, 0x00000000, 0x00000003, >> 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, >> 0x80001901, 0x00010000, 0x00000000, 0x00000000, >> - 0x80044031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> + 0x80004031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> 0x80000061, 0x30014220, 0x00000000, 0x00000000, >> 0x80002070, 0x00018220, 0x22001f04, 0xc0ded002, >> 0x81000965, 0x80218220, 0x02008020, 0xc0ded003, >> @@ -140,11 +140,11 @@ struct iga64_template const iga64_code_end_system_routine_step_if_eq[] = { >> { .gen_ver = 0, .size = 48, .code = (const uint32_t []) { >> 0x80000166, 0x80018220, 0x02008000, 0x00008000, >> 0x80000165, 0x80218220, 0x02008020, 0xc0ded000, >> - 0x80040161, 0x1e054220, 0x00000000, 0x00000000, >> - 0x80000061, 0x1e254220, 0x00000000, 0xc0ded001, >> + 0x80030161, 0x1e054220, 0x00000000, 0x00000000, >> + 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, >> 0x80000061, 0x1e454220, 0x00000000, 0x00000003, >> 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, >> - 0x80049031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> + 0x80009031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> 0x80000061, 0x30014220, 0x00000000, 0x00000000, >> 0x80002070, 0x00018220, 0x22001f04, 0xc0ded002, >> 0x81000165, 0x80218220, 0x02008020, 0xc0ded003, >> @@ -193,84 +193,83 @@ struct iga64_template const iga64_code_breakpoint_suppress[] = { >> }; >> >> struct iga64_template const iga64_code_write_on_exception[] = { >> - { .gen_ver = 2000, .size = 56, .code = (const uint32_t []) { >> - 0x80100061, 0x04054220, 0x00000000, 0x00000000, >> - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, >> - 0x80000040, 0x02058220, 0x02000014, 0xc0ded001, >> - 0x80001969, 0x02058220, 0x02000204, 0xc0ded000, >> - 0x80000040, 0x02158220, 0x02000064, 0xc0ded002, >> - 0x80041961, 0x04550220, 0x00220205, 0x00000000, >> - 0x80000061, 0x04754220, 0x00000000, 0xc0ded003, >> - 0x80000965, 0x03058220, 0x02008010, 0xc0ded005, >> + { .gen_ver = 2000, .size = 52, .code = (const uint32_t []) { >> + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, >> + 0x800c0061, 0x04054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x04558220, 0x02000014, 0x00000002, >> + 0x80001940, 0x04558220, 0x02000454, 0xc0ded000, >> + 0x80000040, 0x04658220, 0x02000064, 0xc0ded001, >> + 0x80000061, 0x04754220, 0x00000000, 0x00000003, >> + 0x80000965, 0x03058220, 0x02008010, 0xc0ded003, >> 0x80000961, 0x30014220, 0x00000000, 0x00000000, >> - 0x80001a70, 0x00018220, 0x12000304, 0xc0ded006, >> - 0x84132031, 0x00000000, 0xd00e0494, 0x04000000, >> + 0x80001a70, 0x00018220, 0x12000304, 0xc0ded004, >> + 0x84032031, 0x00000000, 0xd00e0494, 0x04000000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> { .gen_ver = 1270, .size = 60, .code = (const uint32_t []) { >> - 0x80040061, 0x04054220, 0x00000000, 0x00000000, >> - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, >> - 0x80000040, 0x04058220, 0x02000024, 0xc0ded001, >> - 0x80001969, 0x04058220, 0x02000404, 0xc0ded000, >> - 0x80000040, 0x04258220, 0x020000c4, 0xc0ded002, >> - 0x80000061, 0x04454220, 0x00000000, 0xc0ded003, >> + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, >> + 0x80030061, 0x04054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x04058220, 0x02000024, 0x00000002, >> + 0x80001940, 0x04058220, 0x02000404, 0xc0ded000, >> + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded001, >> + 0x80000061, 0x04454220, 0x00000000, 0x00000003, >> 0x80000061, 0x04850220, 0x000000a4, 0x00000000, >> - 0x80000965, 0x03058220, 0x02008020, 0xc0ded005, >> + 0x80000965, 0x03058220, 0x02008020, 0xc0ded003, >> 0x80000961, 0x30014220, 0x00000000, 0x00000000, >> - 0x80001a70, 0x00018220, 0x12000304, 0xc0ded006, >> + 0x80001a70, 0x00018220, 0x12000304, 0xc0ded004, >> 0x80001901, 0x00010000, 0x00000000, 0x00000000, >> - 0x81044031, 0x00000000, 0xc0000414, 0x02a00000, >> + 0x81004031, 0x00000000, 0xc0000414, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> { .gen_ver = 1260, .size = 56, .code = (const uint32_t []) { >> - 0x80100061, 0x04054220, 0x00000000, 0x00000000, >> - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, >> - 0x80000040, 0x04058220, 0x02000014, 0xc0ded001, >> - 0x80001969, 0x04058220, 0x02000404, 0xc0ded000, >> - 0x80000040, 0x04158220, 0x02000064, 0xc0ded002, >> - 0x80000061, 0x04254220, 0x00000000, 0xc0ded003, >> + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, >> + 0x800c0061, 0x04054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x04058220, 0x02000014, 0x00000002, >> + 0x80001940, 0x04058220, 0x02000404, 0xc0ded000, >> + 0x80000040, 0x04158220, 0x02000064, 0xc0ded001, >> + 0x80000061, 0x04254220, 0x00000000, 0x00000003, >> 0x80000061, 0x04450220, 0x00000054, 0x00000000, >> - 0x80000965, 0x03058220, 0x02008010, 0xc0ded005, >> + 0x80000965, 0x03058220, 0x02008010, 0xc0ded003, >> 0x80000961, 0x30014220, 0x00000000, 0x00000000, >> - 0x80001a70, 0x00018220, 0x12000304, 0xc0ded006, >> - 0x84132031, 0x00000000, 0xc0000414, 0x02a00000, >> + 0x80001a70, 0x00018220, 0x12000304, 0xc0ded004, >> + 0x84032031, 0x00000000, 0xc0000414, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> { .gen_ver = 1250, .size = 60, .code = (const uint32_t []) { >> - 0x80040061, 0x04054220, 0x00000000, 0x00000000, >> - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, >> - 0x80000040, 0x04058220, 0x02000024, 0xc0ded001, >> - 0x80001969, 0x04058220, 0x02000404, 0xc0ded000, >> - 0x80000040, 0x04258220, 0x020000c4, 0xc0ded002, >> - 0x80000061, 0x04454220, 0x00000000, 0xc0ded003, >> + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, >> + 0x80030061, 0x04054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x04058220, 0x02000024, 0x00000002, >> + 0x80001940, 0x04058220, 0x02000404, 0xc0ded000, >> + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded001, >> + 0x80000061, 0x04454220, 0x00000000, 0x00000003, >> 0x80000061, 0x04850220, 0x000000a4, 0x00000000, >> - 0x80000965, 0x03058220, 0x02008020, 0xc0ded005, >> + 0x80000965, 0x03058220, 0x02008020, 0xc0ded003, >> 0x80000961, 0x30014220, 0x00000000, 0x00000000, >> - 0x80001a70, 0x00018220, 0x12000304, 0xc0ded006, >> + 0x80001a70, 0x00018220, 0x12000304, 0xc0ded004, >> 0x80001901, 0x00010000, 0x00000000, 0x00000000, >> - 0x81044031, 0x00000000, 0xc0000414, 0x02a00000, >> + 0x81004031, 0x00000000, 0xc0000414, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> { .gen_ver = 0, .size = 56, .code = (const uint32_t []) { >> - 0x80040061, 0x04054220, 0x00000000, 0x00000000, >> - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, >> - 0x80000040, 0x04058220, 0x02000024, 0xc0ded001, >> - 0x80000169, 0x04058220, 0x02000404, 0xc0ded000, >> - 0x80000040, 0x04258220, 0x020000c4, 0xc0ded002, >> - 0x80000061, 0x04454220, 0x00000000, 0xc0ded003, >> + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, >> + 0x80030061, 0x04054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x04058220, 0x02000024, 0x00000002, >> + 0x80000140, 0x04058220, 0x02000404, 0xc0ded000, >> + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded001, >> + 0x80000061, 0x04454220, 0x00000000, 0x00000003, >> 0x80000061, 0x04850220, 0x000000a4, 0x00000000, >> - 0x80000165, 0x03058220, 0x02008020, 0xc0ded005, >> + 0x80000165, 0x03058220, 0x02008020, 0xc0ded003, >> 0x80000161, 0x30014220, 0x00000000, 0x00000000, >> - 0x80000270, 0x00018220, 0x12000304, 0xc0ded006, >> - 0x81049031, 0x00000000, 0xc0000414, 0x02a00000, >> + 0x80000270, 0x00018220, 0x12000304, 0xc0ded004, >> + 0x81009031, 0x00000000, 0xc0000414, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000101, 0x00010000, 0x00000000, 0x00000000, >> @@ -324,84 +323,68 @@ struct iga64_template const iga64_code_clear_exception[] = { >> }; >> >> struct iga64_template const iga64_code_media_block_write[] = { >> - { .gen_ver = 2000, .size = 56, .code = (const uint32_t []) { >> - 0x80100061, 0x04054220, 0x00000000, 0x00000000, >> - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, >> - 0x80000061, 0x05154220, 0x00000000, 0xc0ded004, >> - 0x80000061, 0x05254220, 0x00000000, 0xc0ded005, >> - 0x80000061, 0x05354220, 0x00000000, 0xc0ded006, >> - 0x80000069, 0x02058220, 0x02000014, 0xc0ded000, >> - 0x80000061, 0x02150220, 0x00000064, 0x00000000, >> - 0x80001940, 0x02158220, 0x02000214, 0xc0ded001, >> - 0x80041961, 0x04550220, 0x00220205, 0x00000000, >> - 0x80000061, 0x04754220, 0x00000000, 0xc0ded002, >> - 0x80132031, 0x00000000, 0xd00e0494, 0x04000000, >> + { .gen_ver = 2000, .size = 40, .code = (const uint32_t []) { >> + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, >> + 0x800c0061, 0x04054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x04558220, 0x02000014, 0x00000002, >> + 0x80001940, 0x04558220, 0x02000454, 0x00000000, >> + 0x80000040, 0x04658220, 0x02000064, 0xc0ded000, >> + 0x80000061, 0x04754220, 0x00000000, 0x00000003, >> + 0x80032031, 0x00000000, 0xd00e0494, 0x04000000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> - { .gen_ver = 1270, .size = 60, .code = (const uint32_t []) { >> - 0x80040061, 0x04054220, 0x00000000, 0x00000000, >> - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, >> - 0x80000061, 0x05254220, 0x00000000, 0xc0ded004, >> - 0x80000061, 0x05454220, 0x00000000, 0xc0ded005, >> - 0x80000061, 0x05654220, 0x00000000, 0xc0ded006, >> - 0x80000069, 0x04058220, 0x02000024, 0xc0ded000, >> - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, >> - 0x80001940, 0x04258220, 0x02000424, 0xc0ded001, >> - 0x80000061, 0x04454220, 0x00000000, 0xc0ded002, >> + { .gen_ver = 1270, .size = 48, .code = (const uint32_t []) { >> + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, >> + 0x80030061, 0x04054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x04058220, 0x02000024, 0x00000002, >> + 0x80001940, 0x04058220, 0x02000404, 0x00000000, >> + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, >> + 0x80000061, 0x04454220, 0x00000000, 0x00000003, >> 0x80000061, 0x04850220, 0x000000a4, 0x00000000, >> 0x80001901, 0x00010000, 0x00000000, 0x00000000, >> - 0x80044031, 0x00000000, 0xc0000414, 0x02a00000, >> + 0x80004031, 0x00000000, 0xc0000414, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> - { .gen_ver = 1260, .size = 56, .code = (const uint32_t []) { >> - 0x80100061, 0x04054220, 0x00000000, 0x00000000, >> - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, >> - 0x80000061, 0x05154220, 0x00000000, 0xc0ded004, >> - 0x80000061, 0x05254220, 0x00000000, 0xc0ded005, >> - 0x80000061, 0x05354220, 0x00000000, 0xc0ded006, >> - 0x80000069, 0x04058220, 0x02000014, 0xc0ded000, >> - 0x80000061, 0x04150220, 0x00000064, 0x00000000, >> - 0x80001940, 0x04158220, 0x02000414, 0xc0ded001, >> - 0x80000061, 0x04254220, 0x00000000, 0xc0ded002, >> + { .gen_ver = 1260, .size = 44, .code = (const uint32_t []) { >> + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, >> + 0x800c0061, 0x04054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x04058220, 0x02000014, 0x00000002, >> + 0x80001940, 0x04058220, 0x02000404, 0x00000000, >> + 0x80000040, 0x04158220, 0x02000064, 0xc0ded000, >> + 0x80000061, 0x04254220, 0x00000000, 0x00000003, >> 0x80000061, 0x04450220, 0x00000054, 0x00000000, >> - 0x80132031, 0x00000000, 0xc0000414, 0x02a00000, >> + 0x80032031, 0x00000000, 0xc0000414, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> - { .gen_ver = 1250, .size = 60, .code = (const uint32_t []) { >> - 0x80040061, 0x04054220, 0x00000000, 0x00000000, >> - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, >> - 0x80000061, 0x05254220, 0x00000000, 0xc0ded004, >> - 0x80000061, 0x05454220, 0x00000000, 0xc0ded005, >> - 0x80000061, 0x05654220, 0x00000000, 0xc0ded006, >> - 0x80000069, 0x04058220, 0x02000024, 0xc0ded000, >> - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, >> - 0x80001940, 0x04258220, 0x02000424, 0xc0ded001, >> - 0x80000061, 0x04454220, 0x00000000, 0xc0ded002, >> + { .gen_ver = 1250, .size = 48, .code = (const uint32_t []) { >> + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, >> + 0x80030061, 0x04054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x04058220, 0x02000024, 0x00000002, >> + 0x80001940, 0x04058220, 0x02000404, 0x00000000, >> + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, >> + 0x80000061, 0x04454220, 0x00000000, 0x00000003, >> 0x80000061, 0x04850220, 0x000000a4, 0x00000000, >> 0x80001901, 0x00010000, 0x00000000, 0x00000000, >> - 0x80044031, 0x00000000, 0xc0000414, 0x02a00000, >> + 0x80004031, 0x00000000, 0xc0000414, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> - { .gen_ver = 0, .size = 56, .code = (const uint32_t []) { >> - 0x80040061, 0x04054220, 0x00000000, 0x00000000, >> - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, >> - 0x80000061, 0x05254220, 0x00000000, 0xc0ded004, >> - 0x80000061, 0x05454220, 0x00000000, 0xc0ded005, >> - 0x80000061, 0x05654220, 0x00000000, 0xc0ded006, >> - 0x80000069, 0x04058220, 0x02000024, 0xc0ded000, >> - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, >> - 0x80000140, 0x04258220, 0x02000424, 0xc0ded001, >> - 0x80000061, 0x04454220, 0x00000000, 0xc0ded002, >> + { .gen_ver = 0, .size = 44, .code = (const uint32_t []) { >> + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, >> + 0x80030061, 0x04054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x04058220, 0x02000024, 0x00000002, >> + 0x80000140, 0x04058220, 0x02000404, 0x00000000, >> + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, >> + 0x80000061, 0x04454220, 0x00000000, 0x00000003, >> 0x80000061, 0x04850220, 0x000000a4, 0x00000000, >> - 0x80049031, 0x00000000, 0xc0000414, 0x02a00000, >> + 0x80009031, 0x00000000, 0xc0000414, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000101, 0x00010000, 0x00000000, 0x00000000, >> @@ -432,65 +415,68 @@ struct iga64_template const iga64_code_write_aip[] = { >> }; >> >> struct iga64_template const iga64_code_media_block_write_aip[] = { >> - { .gen_ver = 2000, .size = 44, .code = (const uint32_t []) { >> + { .gen_ver = 2000, .size = 40, .code = (const uint32_t []) { >> 0x80000961, 0x05050220, 0x00008020, 0x00000000, >> - 0x80000969, 0x02058220, 0x02000014, 0x00000002, >> - 0x80000061, 0x02150220, 0x00000064, 0x00000000, >> - 0x80001940, 0x02158220, 0x02000214, 0xc0ded000, >> - 0x80100061, 0x04054220, 0x00000000, 0x00000000, >> - 0x80041a61, 0x04550220, 0x00220205, 0x00000000, >> + 0x800c0961, 0x04054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x04558220, 0x02000014, 0x00000002, >> + 0x80001940, 0x04558220, 0x02000454, 0x00000000, >> + 0x80000040, 0x04658220, 0x02000064, 0xc0ded000, >> 0x80000061, 0x04754220, 0x00000000, 0x00000003, >> - 0x80132031, 0x00000000, 0xd00e0494, 0x04000000, >> + 0x80032031, 0x00000000, 0xd00e0494, 0x04000000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> - { .gen_ver = 1270, .size = 44, .code = (const uint32_t []) { >> + { .gen_ver = 1270, .size = 48, .code = (const uint32_t []) { >> 0x80000961, 0x05050220, 0x00008040, 0x00000000, >> - 0x80000969, 0x04058220, 0x02000024, 0x00000002, >> - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, >> - 0x80001940, 0x04258220, 0x02000424, 0xc0ded000, >> + 0x80030961, 0x04054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x04058220, 0x02000024, 0x00000002, >> + 0x80001940, 0x04058220, 0x02000404, 0x00000000, >> + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, >> 0x80000061, 0x04454220, 0x00000000, 0x00000003, >> 0x80000061, 0x04850220, 0x000000a4, 0x00000000, >> 0x80001901, 0x00010000, 0x00000000, 0x00000000, >> - 0x80044031, 0x00000000, 0xc0000414, 0x02a00000, >> + 0x80004031, 0x00000000, 0xc0000414, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> - { .gen_ver = 1260, .size = 40, .code = (const uint32_t []) { >> + { .gen_ver = 1260, .size = 44, .code = (const uint32_t []) { >> 0x80000961, 0x05050220, 0x00008020, 0x00000000, >> - 0x80000969, 0x04058220, 0x02000014, 0x00000002, >> - 0x80000061, 0x04150220, 0x00000064, 0x00000000, >> - 0x80001940, 0x04158220, 0x02000414, 0xc0ded000, >> + 0x800c0961, 0x04054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x04058220, 0x02000014, 0x00000002, >> + 0x80001940, 0x04058220, 0x02000404, 0x00000000, >> + 0x80000040, 0x04158220, 0x02000064, 0xc0ded000, >> 0x80000061, 0x04254220, 0x00000000, 0x00000003, >> 0x80000061, 0x04450220, 0x00000054, 0x00000000, >> - 0x80132031, 0x00000000, 0xc0000414, 0x02a00000, >> + 0x80032031, 0x00000000, 0xc0000414, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> - { .gen_ver = 1250, .size = 44, .code = (const uint32_t []) { >> + { .gen_ver = 1250, .size = 48, .code = (const uint32_t []) { >> 0x80000961, 0x05050220, 0x00008040, 0x00000000, >> - 0x80000969, 0x04058220, 0x02000024, 0x00000002, >> - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, >> - 0x80001940, 0x04258220, 0x02000424, 0xc0ded000, >> + 0x80030961, 0x04054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x04058220, 0x02000024, 0x00000002, >> + 0x80001940, 0x04058220, 0x02000404, 0x00000000, >> + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, >> 0x80000061, 0x04454220, 0x00000000, 0x00000003, >> 0x80000061, 0x04850220, 0x000000a4, 0x00000000, >> 0x80001901, 0x00010000, 0x00000000, 0x00000000, >> - 0x80044031, 0x00000000, 0xc0000414, 0x02a00000, >> + 0x80004031, 0x00000000, 0xc0000414, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> - { .gen_ver = 0, .size = 40, .code = (const uint32_t []) { >> + { .gen_ver = 0, .size = 44, .code = (const uint32_t []) { >> 0x80000161, 0x05050220, 0x00008040, 0x00000000, >> - 0x80000169, 0x04058220, 0x02000024, 0x00000002, >> - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, >> - 0x80000140, 0x04258220, 0x02000424, 0xc0ded000, >> + 0x80030161, 0x04054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x04058220, 0x02000024, 0x00000002, >> + 0x80000140, 0x04058220, 0x02000404, 0x00000000, >> + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, >> 0x80000061, 0x04454220, 0x00000000, 0x00000003, >> 0x80000061, 0x04850220, 0x000000a4, 0x00000000, >> - 0x80049031, 0x00000000, 0xc0000414, 0x02a00000, >> + 0x80009031, 0x00000000, 0xc0000414, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000101, 0x00010000, 0x00000000, 0x00000000, >> @@ -499,77 +485,77 @@ struct iga64_template const iga64_code_media_block_write_aip[] = { >> >> struct iga64_template const iga64_code_common_target_write[] = { >> { .gen_ver = 2000, .size = 48, .code = (const uint32_t []) { >> - 0x80100061, 0x1e054220, 0x00000000, 0x00000000, >> 0x80100061, 0x1f054220, 0x00000000, 0x00000000, >> 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, >> 0x80000061, 0x1f154220, 0x00000000, 0xc0ded002, >> 0x80000061, 0x1f254220, 0x00000000, 0xc0ded003, >> 0x80000061, 0x1f354220, 0x00000000, 0xc0ded004, >> + 0x800c0061, 0x1e054220, 0x00000000, 0x00000000, >> 0x80000061, 0x1e654220, 0x00000000, 0xc0ded000, >> 0x80000061, 0x1e754220, 0x00000000, 0x0000000f, >> - 0x80132031, 0x00000000, 0xd00e1e94, 0x04000000, >> + 0x80032031, 0x00000000, 0xd00e1e94, 0x04000000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> { .gen_ver = 1270, .size = 56, .code = (const uint32_t []) { >> - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, >> 0x80040061, 0x1f054220, 0x00000000, 0x00000000, >> 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, >> 0x80000061, 0x1f254220, 0x00000000, 0xc0ded002, >> 0x80000061, 0x1f454220, 0x00000000, 0xc0ded003, >> 0x80000061, 0x1f654220, 0x00000000, 0xc0ded004, >> + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, >> 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, >> 0x80000061, 0x1e454220, 0x00000000, 0x0000000f, >> 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, >> 0x80001901, 0x00010000, 0x00000000, 0x00000000, >> - 0x80044031, 0x00000000, 0xc0001e14, 0x02a00000, >> + 0x80004031, 0x00000000, 0xc0001e14, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> { .gen_ver = 1260, .size = 52, .code = (const uint32_t []) { >> - 0x80100061, 0x1e054220, 0x00000000, 0x00000000, >> 0x80100061, 0x1f054220, 0x00000000, 0x00000000, >> 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, >> 0x80000061, 0x1f154220, 0x00000000, 0xc0ded002, >> 0x80000061, 0x1f254220, 0x00000000, 0xc0ded003, >> 0x80000061, 0x1f354220, 0x00000000, 0xc0ded004, >> + 0x800c0061, 0x1e054220, 0x00000000, 0x00000000, >> 0x80000061, 0x1e154220, 0x00000000, 0xc0ded000, >> 0x80000061, 0x1e254220, 0x00000000, 0x0000000f, >> 0x80000061, 0x1e450220, 0x00000054, 0x00000000, >> - 0x80132031, 0x00000000, 0xc0001e14, 0x02a00000, >> + 0x80032031, 0x00000000, 0xc0001e14, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> { .gen_ver = 1250, .size = 56, .code = (const uint32_t []) { >> - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, >> 0x80040061, 0x1f054220, 0x00000000, 0x00000000, >> 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, >> 0x80000061, 0x1f254220, 0x00000000, 0xc0ded002, >> 0x80000061, 0x1f454220, 0x00000000, 0xc0ded003, >> 0x80000061, 0x1f654220, 0x00000000, 0xc0ded004, >> + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, >> 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, >> 0x80000061, 0x1e454220, 0x00000000, 0x0000000f, >> 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, >> 0x80001901, 0x00010000, 0x00000000, 0x00000000, >> - 0x80044031, 0x00000000, 0xc0001e14, 0x02a00000, >> + 0x80004031, 0x00000000, 0xc0001e14, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> { .gen_ver = 0, .size = 52, .code = (const uint32_t []) { >> - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, >> 0x80040061, 0x1f054220, 0x00000000, 0x00000000, >> 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, >> 0x80000061, 0x1f254220, 0x00000000, 0xc0ded002, >> 0x80000061, 0x1f454220, 0x00000000, 0xc0ded003, >> 0x80000061, 0x1f654220, 0x00000000, 0xc0ded004, >> + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, >> 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, >> 0x80000061, 0x1e454220, 0x00000000, 0x0000000f, >> 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, >> - 0x80049031, 0x00000000, 0xc0001e14, 0x02a00000, >> + 0x80009031, 0x00000000, 0xc0001e14, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000101, 0x00010000, 0x00000000, 0x00000000, >> @@ -627,56 +613,56 @@ struct iga64_template const iga64_code_clear_r40[] = { >> >> struct iga64_template const iga64_code_jump_dw_neq[] = { >> { .gen_ver = 2000, .size = 32, .code = (const uint32_t []) { >> - 0x80100061, 0x1e054220, 0x00000000, 0x00000000, >> + 0x800c0061, 0x1e054220, 0x00000000, 0x00000000, >> 0x80000061, 0x1e654220, 0x00000000, 0xc0ded000, >> 0x80000061, 0x1e754220, 0x00000000, 0x00000003, >> - 0x80132031, 0x1f0c0000, 0xd0061e8c, 0x04000000, >> + 0x80032031, 0x1f0c0000, 0xd0061e8c, 0x04000000, >> 0x80000061, 0x30014220, 0x00000000, 0x00000000, >> 0x80008070, 0x00018220, 0x22001f04, 0xc0ded001, >> 0x84000020, 0x00004000, 0x00000000, 0xffffffa0, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> { .gen_ver = 1270, .size = 40, .code = (const uint32_t []) { >> - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, >> + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, >> 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, >> 0x80000061, 0x1e454220, 0x00000000, 0x00000003, >> 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, >> 0x80001901, 0x00010000, 0x00000000, 0x00000000, >> - 0x80044031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> + 0x80004031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> 0x80000061, 0x30014220, 0x00000000, 0x00000000, >> 0x80002070, 0x00018220, 0x22001f04, 0xc0ded001, >> 0x81000020, 0x00004000, 0x00000000, 0xffffff80, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> { .gen_ver = 1260, .size = 36, .code = (const uint32_t []) { >> - 0x80100061, 0x1e054220, 0x00000000, 0x00000000, >> + 0x800c0061, 0x1e054220, 0x00000000, 0x00000000, >> 0x80000061, 0x1e154220, 0x00000000, 0xc0ded000, >> 0x80000061, 0x1e254220, 0x00000000, 0x00000003, >> 0x80000061, 0x1e450220, 0x00000054, 0x00000000, >> - 0x80132031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> + 0x80032031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> 0x80000061, 0x30014220, 0x00000000, 0x00000000, >> 0x80008070, 0x00018220, 0x22001f04, 0xc0ded001, >> 0x84000020, 0x00004000, 0x00000000, 0xffffff90, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> { .gen_ver = 1250, .size = 40, .code = (const uint32_t []) { >> - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, >> + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, >> 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, >> 0x80000061, 0x1e454220, 0x00000000, 0x00000003, >> 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, >> 0x80001901, 0x00010000, 0x00000000, 0x00000000, >> - 0x80044031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> + 0x80004031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> 0x80000061, 0x30014220, 0x00000000, 0x00000000, >> 0x80002070, 0x00018220, 0x22001f04, 0xc0ded001, >> 0x81000020, 0x00004000, 0x00000000, 0xffffff80, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> { .gen_ver = 0, .size = 36, .code = (const uint32_t []) { >> - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, >> + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, >> 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, >> 0x80000061, 0x1e454220, 0x00000000, 0x00000003, >> 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, >> - 0x80049031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> + 0x80009031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> 0x80000061, 0x30014220, 0x00000000, 0x00000000, >> 0x80002070, 0x00018220, 0x22001f04, 0xc0ded001, >> 0x81000120, 0x00004000, 0x00000000, 0xffffff90, >> diff --git a/lib/iga64_macros.h b/lib/iga64_macros.h >> index 6459b524c3fd..40b6338928e1 100644 >> --- a/lib/iga64_macros.h >> +++ b/lib/iga64_macros.h >> @@ -16,4 +16,47 @@ >> #define src1_null null:0 >> #endif >> >> +/* GPGPU_R0Payload fields, Bspec: 55396, 56587 */ >> +#define R0_TGIDX r0.1<0;1,0>:ud >> +#define R0_TGIDY r0.6<0;1,0>:ud >> +#define R0_FFTID r0.5<0;1,0>:ud >> + >> +#define SET_SHARED_MEDIA_BLOCK_MSG_HDR(dst, y, width) \ >> +(W) mov (8) dst.0<1>:ud 0x0:ud ;\ >> +(W) mov (1) dst.1<1>:ud y ;\ >> +(W) mov (1) dst.2<1>:ud (width - 1):ud ;\ >> +(W) mov (1) dst.4<1>:ud R0_FFTID >> + >> +#define SET_THREAD_MEDIA_BLOCK_MSG_HDR(dst, x, y, width) \ >> +(W) mov (8) dst.0<1>:ud 0x0:ud ;\ >> +(W) shl (1) dst.0<1>:ud R0_TGIDX 0x2:ud ;\ >> +(W) add (1) dst.0<1>:ud dst.0<0;1,0>:ud x:ud ;\ >> +(W) add (1) dst.1<1>:ud R0_TGIDY y ;\ >> +(W) mov (1) dst.2<1>:ud (width - 1):ud ;\ >> +(W) mov (1) dst.4<1>:ud R0_FFTID >> + >> +#define SET_SHARED_MEDIA_A2DBLOCK_PAYLOAD(dst, y, width) \ >> +(W) mov (8) dst.0<1>:ud 0x0:ud ;\ >> +(W) mov (1) dst.6<1>:ud y ;\ >> +(W) mov (1) dst.7<1>:ud (width - 1):ud >> + >> +#define SET_THREAD_MEDIA_A2DBLOCK_PAYLOAD(dst, x, y, width) \ >> +(W) mov (8) dst.0<1>:ud 0x0:ud ;\ >> +(W) shl (1) dst.5<1>:ud R0_TGIDX 0x2:ud ;\ >> +(W) add (1) dst.5<1>:ud dst.5<0;1,0>:ud x:ud ;\ >> +(W) add (1) dst.6<1>:ud R0_TGIDY y ;\ >> +(W) mov (1) dst.7<1>:ud (width - 1):ud ;\ >> + >> +#if GEN_VER < 2000 >> +#define SET_SHARED_SPACE_ADDR(dst, y, width) SET_SHARED_MEDIA_BLOCK_MSG_HDR(dst, y, width) >> +#define SET_THREAD_SPACE_ADDR(dst, x, y, width) SET_THREAD_MEDIA_BLOCK_MSG_HDR(dst, x, y, width) >> +#define LOAD_SPACE_DW(dst, src) send.dc1 (1) dst src src1_null 0x0 0x2190000 >> +#define STORE_SPACE_DW(dst, src) send.dc1 (1) null dst null 0x0 0x40A8000 >> +#else >> +#define SET_SHARED_SPACE_ADDR(dst, y, width) SET_SHARED_MEDIA_A2DBLOCK_PAYLOAD(dst, y, width) >> +#define SET_THREAD_SPACE_ADDR(dst, x, y, width) SET_THREAD_MEDIA_A2DBLOCK_PAYLOAD(dst, x, y, width) >> +#define LOAD_SPACE_DW(dst, src) send.tgm (1) dst src null:0 0x0 0x62100003 >> +#define STORE_SPACE_DW(dst, src) send.tgm (1) null dst null:0 0x0 0x64000007 >> +#endif >> + >> #endif >> ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v3 2/4] lib/gpgpu_shader: simplify load/store shaders 2024-11-22 14:22 ` Hajda, Andrzej @ 2024-11-22 14:28 ` Grzegorzek, Dominik 0 siblings, 0 replies; 15+ messages in thread From: Grzegorzek, Dominik @ 2024-11-22 14:28 UTC (permalink / raw) To: igt-dev@lists.freedesktop.org, Hajda, Andrzej Cc: Kempczynski, Zbigniew, Mun, Gwan-gyeong, Manszewski, Christoph, kamil.konieczny@linux.intel.com On Fri, 2024-11-22 at 15:22 +0100, Hajda, Andrzej wrote: > W dniu 22.11.2024 o 15:05, Grzegorzek, Dominik pisze: > > On Thu, 2024-11-21 at 18:12 +0100, Andrzej Hajda wrote: > > > There is lot of redundancy in shaders code regarding load/store messages. > > > It makes the code barely readable. Simplify it by using macros in iga64 > > > assembler. > > > Every load/store operation is split into two phases: > > > 1. Load address/descriptor (from) where data should be stored/loaded. > > > 2. Issue load/store instruction. > > > Shader threads needs two types of memory access: > > > 3. Private area per thread. > > > 4. Area shared per all threads. > > > Different platforms access surface in different ways: > > > 5. Using media block messages. > > > 6. Using untyped 2d block messages. > > > 7. Future platforms will use different messages. > > > > > > All this is simplified to two macros per message in shader: > > > load_(shared|thread)_space_addr(dst,y,width) > > > (load|store)_space_dw(dst, src) > > > > > > v2: > > > - captialze introduced macros (Dominik) > > > - fixed thread -> shared call (Zbigniew) > > > > > > Signed-off-by: Andrzej Hajda <andrzej.hajda@intel.com> > > > --- > > > lib/gpgpu_shader.c | 160 +++------------------- > > > lib/iga64_generated_codes.c | 318 +++++++++++++++++++++----------------------- > > > lib/iga64_macros.h | 43 ++++++ > > > 3 files changed, 215 insertions(+), 306 deletions(-) > > > > > > diff --git a/lib/gpgpu_shader.c b/lib/gpgpu_shader.c > > > index 4e1b8d5e9009..363435e7efd3 100644 > > > --- a/lib/gpgpu_shader.c > > > +++ b/lib/gpgpu_shader.c > > > @@ -431,22 +431,8 @@ void gpgpu_shader__jump_neq(struct gpgpu_shader *shdr, int label_id, > > > > > > size = emit_iga64_code(shdr, jump_dw_neq, " \n\ > > > L0: \n\ > > > -(W) mov (16|M0) r30.0<1>:ud 0x0:ud \n\ > > > -#if GEN_VER < 2000 // Media Block Write \n\ > > > - // Y offset of the block in rows := thread group id Y \n\ > > > -(W) mov (1|M0) r30.1<1>:ud ARG(0):ud \n\ > > > - // block width [0,63] representing 1 to 64 bytes, we want dword \n\ > > > -(W) mov (1|M0) r30.2<1>:ud 0x3:ud \n\ > > > - // FFTID := FFTID from R0 header \n\ > > > -(W) mov (1|M0) r30.4<1>:ud r0.5<0;1,0>:ud \n\ > > > -(W) send.dc1 (16|M0) r31 r30 null 0x0 0x2190000 \n\ > > > -#else // Typed 2D Block Store \n\ > > > - // Store X and Y block start (160:191 and 192:223) \n\ > > > -(W) mov (1|M0) r30.6<1>:ud ARG(0):ud \n\ > > > - // Store X and Y block size (224:231 and 232:239) \n\ > > > -(W) mov (1|M0) r30.7<1>:ud 0x3:ud \n\ > > > -(W) send.tgm (16|M0) r31 r30 null:0 0x0 0x62100003 \n\ > > > -#endif \n\ > > > + SET_SHARED_SPACE_ADDR(r30, ARG(0):ud, 4) \n\ > > > +(W) LOAD_SPACE_DW(r31, r30) \n\ > > It's a bit odd to me, that in case of LOAD_SPACE_DW you leave an user with a choice > > wheter to set Write Enable (W). Is there any possible use case when we do not won't to set it before > > send message? Especially, taking into account that we aready always did it perparing the message. > > Moving (W) inside the macro would be cleaner. And it will spare a future user a dillema wheter use > > it or not. > > > Sometimes it is '(W)', sometimes '(W&f0.0)' > (gpgpu_shader__write_on_exception), I think it is easier this way than > via extra argument, or separate macro. > > Regards > > Andrzej > Ahh true, forgot about other predicates. Sure so scratch what I wrote. and keep the rb. > > > > > Other than that I did not spot more issues. Great cleanup indeed, so from my side it is: > > Reviewed-by: Dominik Grzegorzek <dominik.grzegorzek@intel.com> > > > > > // clear the flag register \n\ > > > (W) mov (1|M0) f0.0<1>:ud 0x0:ud \n\ > > > (W) cmp (1|M0) (ne)f0.0 null<1>:ud r31.0<0;1,0>:ud ARG(1):ud \n\ > > > @@ -511,28 +497,13 @@ void gpgpu_shader__common_target_write(struct gpgpu_shader *shdr, > > > uint32_t y_offset, const uint32_t value[4]) > > > { > > > emit_iga64_code(shdr, common_target_write, " \n\ > > > -(W) mov (16|M0) r30.0<1>:ud 0x0:ud \n\ > > > (W) mov (16|M0) r31.0<1>:ud 0x0:ud \n\ > > > (W) mov (1|M0) r31.0<1>:ud ARG(1):ud \n\ > > > (W) mov (1|M0) r31.1<1>:ud ARG(2):ud \n\ > > > (W) mov (1|M0) r31.2<1>:ud ARG(3):ud \n\ > > > (W) mov (1|M0) r31.3<1>:ud ARG(4):ud \n\ > > > -#if GEN_VER < 2000 // Media Block Write \n\ > > > - // Y offset of the block in rows \n\ > > > -(W) mov (1|M0) r30.1<1>:ud ARG(0):ud \n\ > > > - // block width [0,63] representing 1 to 64 bytes \n\ > > > -(W) mov (1|M0) r30.2<1>:ud 0xf:ud \n\ > > > - // FFTID := FFTID from R0 header \n\ > > > -(W) mov (1|M0) r30.4<1>:ud r0.5<0;1,0>:ud \n\ > > > - // written value \n\ > > > -(W) send.dc1 (16|M0) null r30 src1_null 0x0 0x40A8000 \n\ > > > -#else // Typed 2D Block Store \n\ > > > - // Store X and Y block start (160:191 and 192:223) \n\ > > > -(W) mov (1|M0) r30.6<1>:ud ARG(0):ud \n\ > > > - // Store X and Y block size (224:231 and 232:239) \n\ > > > -(W) mov (1|M0) r30.7<1>:ud 0xf:ud \n\ > > > -(W) send.tgm (16|M0) null r30 null:0 0x0 0x64000007 \n\ > > > -#endif \n\ > > > + SET_SHARED_SPACE_ADDR(r30, ARG(0):ud, 16) \n\ > > > +(W) STORE_SPACE_DW(r30, r31) \n\ > > > ", y_offset, value[0], value[1], value[2], value[3]); > > > } > > > > > > @@ -565,31 +536,8 @@ void gpgpu_shader__write_aip(struct gpgpu_shader *shdr, uint32_t y_offset) > > > emit_iga64_code(shdr, media_block_write_aip, " \n\ > > > // Payload \n\ > > > (W) mov (1|M0) r5.0<1>:ud cr0.2:ud \n\ > > > -#if GEN_VER < 2000 // Media Block Write \n\ > > > - // X offset of the block in bytes := (thread group id X << ARG(0)) \n\ > > > -(W) shl (1|M0) r4.0<1>:ud r0.1<0;1,0>:ud 0x2:ud \n\ > > > - // Y offset of the block in rows := thread group id Y \n\ > > > -(W) mov (1|M0) r4.1<1>:ud r0.6<0;1,0>:ud \n\ > > > -(W) add (1|M0) r4.1<1>:ud r4.1<0;1,0>:ud ARG(0):ud \n\ > > > - // block width [0,63] representing 1 to 64 bytes \n\ > > > -(W) mov (1|M0) r4.2<1>:ud 0x3:ud \n\ > > > - // FFTID := FFTID from R0 header \n\ > > > -(W) mov (1|M0) r4.4<1>:ud r0.5<0;1,0>:ud \n\ > > > -(W) send.dc1 (16|M0) null r4 src1_null 0 0x40A8000 \n\ > > > -#else // Typed 2D Block Store \n\ > > > - // Load r2.0-3 with tg id X << ARG(0) \n\ > > > -(W) shl (1|M0) r2.0<1>:ud r0.1<0;1,0>:ud 0x2:ud \n\ > > > - // Load r2.4-7 with tg id Y + ARG(1):ud \n\ > > > -(W) mov (1|M0) r2.1<1>:ud r0.6<0;1,0>:ud \n\ > > > -(W) add (1|M0) r2.1<1>:ud r2.1<0;1,0>:ud ARG(0):ud \n\ > > > - // payload setup \n\ > > > -(W) mov (16|M0) r4.0<1>:ud 0x0:ud \n\ > > > - // Store X and Y block start (160:191 and 192:223) \n\ > > > -(W) mov (2|M0) r4.5<1>:ud r2.0<2;2,1>:ud \n\ > > > - // Store X and Y block max_size (224:231 and 232:239) \n\ > > > -(W) mov (1|M0) r4.7<1>:ud 0x3:ud \n\ > > > -(W) send.tgm (16|M0) null r4 null:0 0 0x64000007 \n\ > > > -#endif \n\ > > > + SET_THREAD_SPACE_ADDR(r4, 0, ARG(0):ud, 4) \n\ > > > +(W) STORE_SPACE_DW(r4, r5) \n\ > > > ", y_offset); > > > } > > > > > > @@ -618,38 +566,11 @@ void gpgpu_shader__increase_aip(struct gpgpu_shader *shdr, uint32_t value) > > > void gpgpu_shader__write_dword(struct gpgpu_shader *shdr, uint32_t value, > > > uint32_t y_offset) > > > { > > > - emit_iga64_code(shdr, media_block_write, " \n\ > > > - // Clear message header \n\ > > > -(W) mov (16|M0) r4.0<1>:ud 0x0:ud \n\ > > > - // Payload \n\ > > > -(W) mov (1|M0) r5.0<1>:ud ARG(3):ud \n\ > > > -(W) mov (1|M0) r5.1<1>:ud ARG(4):ud \n\ > > > -(W) mov (1|M0) r5.2<1>:ud ARG(5):ud \n\ > > > -(W) mov (1|M0) r5.3<1>:ud ARG(6):ud \n\ > > > -#if GEN_VER < 2000 // Media Block Write \n\ > > > - // X offset of the block in bytes := (thread group id X << ARG(0)) \n\ > > > -(W) shl (1|M0) r4.0<1>:ud r0.1<0;1,0>:ud ARG(0):ud \n\ > > > - // Y offset of the block in rows := thread group id Y \n\ > > > -(W) mov (1|M0) r4.1<1>:ud r0.6<0;1,0>:ud \n\ > > > -(W) add (1|M0) r4.1<1>:ud r4.1<0;1,0>:ud ARG(1):ud \n\ > > > - // block width [0,63] representing 1 to 64 bytes \n\ > > > -(W) mov (1|M0) r4.2<1>:ud ARG(2):ud \n\ > > > - // FFTID := FFTID from R0 header \n\ > > > -(W) mov (1|M0) r4.4<1>:ud r0.5<0;1,0>:ud \n\ > > > -(W) send.dc1 (16|M0) null r4 src1_null 0 0x40A8000 \n\ > > > -#else // Typed 2D Block Store \n\ > > > - // Load r2.0-3 with tg id X << ARG(0) \n\ > > > -(W) shl (1|M0) r2.0<1>:ud r0.1<0;1,0>:ud ARG(0):ud \n\ > > > - // Load r2.4-7 with tg id Y + ARG(1):ud \n\ > > > -(W) mov (1|M0) r2.1<1>:ud r0.6<0;1,0>:ud \n\ > > > -(W) add (1|M0) r2.1<1>:ud r2.1<0;1,0>:ud ARG(1):ud \n\ > > > - // Store X and Y block start (160:191 and 192:223) \n\ > > > -(W) mov (2|M0) r4.5<1>:ud r2.0<2;2,1>:ud \n\ > > > - // Store X and Y block max_size (224:231 and 232:239) \n\ > > > -(W) mov (1|M0) r4.7<1>:ud ARG(2):ud \n\ > > > -(W) send.tgm (16|M0) null r4 null:0 0 0x64000007 \n\ > > > -#endif \n\ > > > - ", 2, y_offset, 3, value, value, value, value); > > > + emit_iga64_code(shdr, media_block_write, " \n\ > > > +(W) mov (1) r5.0<1>:ud ARG(1):ud \n\ > > > + SET_THREAD_SPACE_ADDR(r4, 0, ARG(0):ud, 4) \n\ > > > +(W) STORE_SPACE_DW(r4, r5) \n\ > > > + ", y_offset, value); > > > } > > > > > > /** > > > @@ -697,41 +618,14 @@ void gpgpu_shader__write_on_exception(struct gpgpu_shader *shdr, uint32_t value, > > > uint32_t y_offset, uint32_t mask, uint32_t expected) > > > { > > > emit_iga64_code(shdr, write_on_exception, " \n\ > > > - // Clear message header \n\ > > > -(W) mov (16|M0) r4.0<1>:ud 0x0:ud \n\ > > > - // Payload \n\ > > > -(W) mov (1|M0) r5.0<1>:ud ARG(4):ud \n\ > > > -#if GEN_VER < 2000 // prepare Media Block Write \n\ > > > - // X offset of the block in bytes := (thread group id X << ARG(0)) \n\ > > > -(W) add (1|M0) r4.0<1>:ud r0.1<0;1,0>:ud ARG(1):ud \n\ > > > -(W) shl (1|M0) r4.0<1>:ud r4.0<0;1,0>:ud ARG(0):ud \n\ > > > - // Y offset of the block in rows := thread group id Y \n\ > > > -(W) add (1|M0) r4.1<1>:ud r0.6<0;1,0>:ud ARG(2):ud \n\ > > > - // block width [0,63] representing 1 to 64 bytes \n\ > > > -(W) mov (1|M0) r4.2<1>:ud ARG(3):ud \n\ > > > - // FFTID := FFTID from R0 header \n\ > > > -(W) mov (1|M0) r4.4<1>:ud r0.5<0;1,0>:ud \n\ > > > -#else // prepare Typed 2D Block Store \n\ > > > - // Load r2.0 with tg id (X + ARG(1)) << ARG(0) \n\ > > > -(W) add (1|M0) r2.0<1>:ud r0.1<0;1,0>:ud ARG(1):ud \n\ > > > -(W) shl (1|M0) r2.0<1>:ud r2.0<0;1,0>:ud ARG(0):ud \n\ > > > - // Load r2.4-7 with tg id Y + ARG(2):ud \n\ > > > -(W) add (1|M0) r2.1<1>:ud r0.6<0;1,0>:ud ARG(2):ud \n\ > > > - // Store X and Y block start (160:191 and 192:223) \n\ > > > -(W) mov (2|M0) r4.5<1>:ud r2.0<2;2,1>:ud \n\ > > > - // Store X and Y block max_size (224:231 and 232:239) \n\ > > > -(W) mov (1|M0) r4.7<1>:ud ARG(3):ud \n\ > > > -#endif \n\ > > > +(W) mov (1|M0) r5.0<1>:ud ARG(2):ud \n\ > > > + SET_THREAD_SPACE_ADDR(r4, ARG(0), ARG(1):ud, 4) \n\ > > > // Check if masked exception is equal to provided value and write conditionally \n\ > > > -(W) and (1|M0) r3.0<1>:ud cr0.1<0;1,0>:ud ARG(5):ud \n\ > > > -(W) mov (1|M0) f0.0<1>:ud 0x0:ud \n\ > > > -(W) cmp (1|M0) (eq)f0.0 null:ud r3.0<0;1,0>:ud ARG(6):ud \n\ > > > -#if GEN_VER < 2000 // Media Block Write \n\ > > > -(W&f0.0) send.dc1 (16|M0) null r4 src1_null 0 0x40A8000 \n\ > > > -#else // Typed 2D Block Store \n\ > > > -(W&f0.0) send.tgm (16|M0) null r4 null:0 0 0x64000007 \n\ > > > -#endif \n\ > > > - ", 2, x_offset, y_offset, 3, value, mask, expected); > > > +(W) and (1|M0) r3.0<1>:ud cr0.1<0;1,0>:ud ARG(3):ud \n\ > > > +(W) mov (1|M0) f0.0<1>:ud 0x0:ud \n\ > > > +(W) cmp (1|M0) (eq)f0.0 null:ud r3.0<0;1,0>:ud ARG(4):ud \n\ > > > +(W&f0.0) STORE_SPACE_DW(r4, r5) \n\ > > > + ", 4 * x_offset, y_offset, value, mask, expected); > > > } > > > > > > /** > > > @@ -778,22 +672,8 @@ void gpgpu_shader__end_system_routine_step_if_eq(struct gpgpu_shader *shdr, > > > emit_iga64_code(shdr, end_system_routine_step_if_eq, " \n\ > > > (W) or (1|M0) cr0.0<1>:ud cr0.0<0;1,0>:ud 0x8000:ud \n\ > > > (W) and (1|M0) cr0.1<1>:ud cr0.1<0;1,0>:ud ARG(0):ud \n\ > > > -(W) mov (16|M0) r30.0<1>:ud 0x0:ud \n\ > > > -#if GEN_VER < 2000 // Media Block Write \n\ > > > - // Y offset of the block in rows := thread group id Y \n\ > > > -(W) mov (1|M0) r30.1<1>:ud ARG(1):ud \n\ > > > - // block width [0,63] representing 1 to 64 bytes, we want dword \n\ > > > -(W) mov (1|M0) r30.2<1>:ud 0x3:ud \n\ > > > - // FFTID := FFTID from R0 header \n\ > > > -(W) mov (1|M0) r30.4<1>:ud r0.5<0;1,0>:ud \n\ > > > -(W) send.dc1 (16|M0) r31 r30 null 0x0 0x2190000 \n\ > > > -#else // Typed 2D Block Store \n\ > > > - // Store X and Y block start (160:191 and 192:223) \n\ > > > -(W) mov (1|M0) r30.6<1>:ud ARG(1):ud \n\ > > > - // Store X and Y block size (224:231 and 232:239) \n\ > > > -(W) mov (1|M0) r30.7<1>:ud 0x3:ud \n\ > > > -(W) send.tgm (16|M0) r31 r30 null:0 0x0 0x62100003 \n\ > > > -#endif \n\ > > > + SET_SHARED_SPACE_ADDR(r30, ARG(0):ud, 4) \n\ > > > +(W) LOAD_SPACE_DW(r31, r30) \n\ > > > // clear the flag register \n\ > > > (W) mov (1|M0) f0.0<1>:ud 0x0:ud \n\ > > > (W) cmp (1|M0) (ne)f0.0 null<1>:ud r31.0<0;1,0>:ud ARG(2):ud \n\ > > > diff --git a/lib/iga64_generated_codes.c b/lib/iga64_generated_codes.c > > > index 41be66f74486..04015b0b6d29 100644 > > > --- a/lib/iga64_generated_codes.c > > > +++ b/lib/iga64_generated_codes.c > > > @@ -3,7 +3,7 @@ > > > > > > #include "gpgpu_shader.h" > > > > > > -#define MD5_SUM_IGA64_ASMS 09d72b5fd1f62c8c2905caa80f400567 > > > +#define MD5_SUM_IGA64_ASMS da66be3cf9bec819a61429de75943011 > > > > > > struct iga64_template const iga64_code_gpgpu_fill[] = { > > > { .gen_ver = 2000, .size = 44, .code = (const uint32_t []) { > > > @@ -83,10 +83,10 @@ struct iga64_template const iga64_code_end_system_routine_step_if_eq[] = { > > > { .gen_ver = 2000, .size = 44, .code = (const uint32_t []) { > > > 0x80000966, 0x80018220, 0x02008000, 0x00008000, > > > 0x80000965, 0x80118220, 0x02008010, 0xc0ded000, > > > - 0x80100961, 0x1e054220, 0x00000000, 0x00000000, > > > - 0x80000061, 0x1e654220, 0x00000000, 0xc0ded001, > > > + 0x800c0961, 0x1e054220, 0x00000000, 0x00000000, > > > + 0x80000061, 0x1e654220, 0x00000000, 0xc0ded000, > > > 0x80000061, 0x1e754220, 0x00000000, 0x00000003, > > > - 0x80132031, 0x1f0c0000, 0xd0061e8c, 0x04000000, > > > + 0x80032031, 0x1f0c0000, 0xd0061e8c, 0x04000000, > > > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > > > 0x80008070, 0x00018220, 0x22001f04, 0xc0ded002, > > > 0x84000965, 0x80118220, 0x02008010, 0xc0ded003, > > > @@ -96,12 +96,12 @@ struct iga64_template const iga64_code_end_system_routine_step_if_eq[] = { > > > { .gen_ver = 1270, .size = 52, .code = (const uint32_t []) { > > > 0x80000966, 0x80018220, 0x02008000, 0x00008000, > > > 0x80000965, 0x80218220, 0x02008020, 0xc0ded000, > > > - 0x80040961, 0x1e054220, 0x00000000, 0x00000000, > > > - 0x80000061, 0x1e254220, 0x00000000, 0xc0ded001, > > > + 0x80030961, 0x1e054220, 0x00000000, 0x00000000, > > > + 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, > > > 0x80000061, 0x1e454220, 0x00000000, 0x00000003, > > > 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, > > > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > > > - 0x80044031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > > > + 0x80004031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > > > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > > > 0x80002070, 0x00018220, 0x22001f04, 0xc0ded002, > > > 0x81000965, 0x80218220, 0x02008020, 0xc0ded003, > > > @@ -111,11 +111,11 @@ struct iga64_template const iga64_code_end_system_routine_step_if_eq[] = { > > > { .gen_ver = 1260, .size = 48, .code = (const uint32_t []) { > > > 0x80000966, 0x80018220, 0x02008000, 0x00008000, > > > 0x80000965, 0x80118220, 0x02008010, 0xc0ded000, > > > - 0x80100961, 0x1e054220, 0x00000000, 0x00000000, > > > - 0x80000061, 0x1e154220, 0x00000000, 0xc0ded001, > > > + 0x800c0961, 0x1e054220, 0x00000000, 0x00000000, > > > + 0x80000061, 0x1e154220, 0x00000000, 0xc0ded000, > > > 0x80000061, 0x1e254220, 0x00000000, 0x00000003, > > > 0x80000061, 0x1e450220, 0x00000054, 0x00000000, > > > - 0x80132031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > > > + 0x80032031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > > > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > > > 0x80008070, 0x00018220, 0x22001f04, 0xc0ded002, > > > 0x84000965, 0x80118220, 0x02008010, 0xc0ded003, > > > @@ -125,12 +125,12 @@ struct iga64_template const iga64_code_end_system_routine_step_if_eq[] = { > > > { .gen_ver = 1250, .size = 52, .code = (const uint32_t []) { > > > 0x80000966, 0x80018220, 0x02008000, 0x00008000, > > > 0x80000965, 0x80218220, 0x02008020, 0xc0ded000, > > > - 0x80040961, 0x1e054220, 0x00000000, 0x00000000, > > > - 0x80000061, 0x1e254220, 0x00000000, 0xc0ded001, > > > + 0x80030961, 0x1e054220, 0x00000000, 0x00000000, > > > + 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, > > > 0x80000061, 0x1e454220, 0x00000000, 0x00000003, > > > 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, > > > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > > > - 0x80044031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > > > + 0x80004031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > > > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > > > 0x80002070, 0x00018220, 0x22001f04, 0xc0ded002, > > > 0x81000965, 0x80218220, 0x02008020, 0xc0ded003, > > > @@ -140,11 +140,11 @@ struct iga64_template const iga64_code_end_system_routine_step_if_eq[] = { > > > { .gen_ver = 0, .size = 48, .code = (const uint32_t []) { > > > 0x80000166, 0x80018220, 0x02008000, 0x00008000, > > > 0x80000165, 0x80218220, 0x02008020, 0xc0ded000, > > > - 0x80040161, 0x1e054220, 0x00000000, 0x00000000, > > > - 0x80000061, 0x1e254220, 0x00000000, 0xc0ded001, > > > + 0x80030161, 0x1e054220, 0x00000000, 0x00000000, > > > + 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, > > > 0x80000061, 0x1e454220, 0x00000000, 0x00000003, > > > 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, > > > - 0x80049031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > > > + 0x80009031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > > > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > > > 0x80002070, 0x00018220, 0x22001f04, 0xc0ded002, > > > 0x81000165, 0x80218220, 0x02008020, 0xc0ded003, > > > @@ -193,84 +193,83 @@ struct iga64_template const iga64_code_breakpoint_suppress[] = { > > > }; > > > > > > struct iga64_template const iga64_code_write_on_exception[] = { > > > - { .gen_ver = 2000, .size = 56, .code = (const uint32_t []) { > > > - 0x80100061, 0x04054220, 0x00000000, 0x00000000, > > > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, > > > - 0x80000040, 0x02058220, 0x02000014, 0xc0ded001, > > > - 0x80001969, 0x02058220, 0x02000204, 0xc0ded000, > > > - 0x80000040, 0x02158220, 0x02000064, 0xc0ded002, > > > - 0x80041961, 0x04550220, 0x00220205, 0x00000000, > > > - 0x80000061, 0x04754220, 0x00000000, 0xc0ded003, > > > - 0x80000965, 0x03058220, 0x02008010, 0xc0ded005, > > > + { .gen_ver = 2000, .size = 52, .code = (const uint32_t []) { > > > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, > > > + 0x800c0061, 0x04054220, 0x00000000, 0x00000000, > > > + 0x80000069, 0x04558220, 0x02000014, 0x00000002, > > > + 0x80001940, 0x04558220, 0x02000454, 0xc0ded000, > > > + 0x80000040, 0x04658220, 0x02000064, 0xc0ded001, > > > + 0x80000061, 0x04754220, 0x00000000, 0x00000003, > > > + 0x80000965, 0x03058220, 0x02008010, 0xc0ded003, > > > 0x80000961, 0x30014220, 0x00000000, 0x00000000, > > > - 0x80001a70, 0x00018220, 0x12000304, 0xc0ded006, > > > - 0x84132031, 0x00000000, 0xd00e0494, 0x04000000, > > > + 0x80001a70, 0x00018220, 0x12000304, 0xc0ded004, > > > + 0x84032031, 0x00000000, 0xd00e0494, 0x04000000, > > > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > > > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > > > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > > > }}, > > > { .gen_ver = 1270, .size = 60, .code = (const uint32_t []) { > > > - 0x80040061, 0x04054220, 0x00000000, 0x00000000, > > > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, > > > - 0x80000040, 0x04058220, 0x02000024, 0xc0ded001, > > > - 0x80001969, 0x04058220, 0x02000404, 0xc0ded000, > > > - 0x80000040, 0x04258220, 0x020000c4, 0xc0ded002, > > > - 0x80000061, 0x04454220, 0x00000000, 0xc0ded003, > > > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, > > > + 0x80030061, 0x04054220, 0x00000000, 0x00000000, > > > + 0x80000069, 0x04058220, 0x02000024, 0x00000002, > > > + 0x80001940, 0x04058220, 0x02000404, 0xc0ded000, > > > + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded001, > > > + 0x80000061, 0x04454220, 0x00000000, 0x00000003, > > > 0x80000061, 0x04850220, 0x000000a4, 0x00000000, > > > - 0x80000965, 0x03058220, 0x02008020, 0xc0ded005, > > > + 0x80000965, 0x03058220, 0x02008020, 0xc0ded003, > > > 0x80000961, 0x30014220, 0x00000000, 0x00000000, > > > - 0x80001a70, 0x00018220, 0x12000304, 0xc0ded006, > > > + 0x80001a70, 0x00018220, 0x12000304, 0xc0ded004, > > > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > > > - 0x81044031, 0x00000000, 0xc0000414, 0x02a00000, > > > + 0x81004031, 0x00000000, 0xc0000414, 0x02a00000, > > > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > > > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > > > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > > > }}, > > > { .gen_ver = 1260, .size = 56, .code = (const uint32_t []) { > > > - 0x80100061, 0x04054220, 0x00000000, 0x00000000, > > > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, > > > - 0x80000040, 0x04058220, 0x02000014, 0xc0ded001, > > > - 0x80001969, 0x04058220, 0x02000404, 0xc0ded000, > > > - 0x80000040, 0x04158220, 0x02000064, 0xc0ded002, > > > - 0x80000061, 0x04254220, 0x00000000, 0xc0ded003, > > > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, > > > + 0x800c0061, 0x04054220, 0x00000000, 0x00000000, > > > + 0x80000069, 0x04058220, 0x02000014, 0x00000002, > > > + 0x80001940, 0x04058220, 0x02000404, 0xc0ded000, > > > + 0x80000040, 0x04158220, 0x02000064, 0xc0ded001, > > > + 0x80000061, 0x04254220, 0x00000000, 0x00000003, > > > 0x80000061, 0x04450220, 0x00000054, 0x00000000, > > > - 0x80000965, 0x03058220, 0x02008010, 0xc0ded005, > > > + 0x80000965, 0x03058220, 0x02008010, 0xc0ded003, > > > 0x80000961, 0x30014220, 0x00000000, 0x00000000, > > > - 0x80001a70, 0x00018220, 0x12000304, 0xc0ded006, > > > - 0x84132031, 0x00000000, 0xc0000414, 0x02a00000, > > > + 0x80001a70, 0x00018220, 0x12000304, 0xc0ded004, > > > + 0x84032031, 0x00000000, 0xc0000414, 0x02a00000, > > > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > > > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > > > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > > > }}, > > > { .gen_ver = 1250, .size = 60, .code = (const uint32_t []) { > > > - 0x80040061, 0x04054220, 0x00000000, 0x00000000, > > > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, > > > - 0x80000040, 0x04058220, 0x02000024, 0xc0ded001, > > > - 0x80001969, 0x04058220, 0x02000404, 0xc0ded000, > > > - 0x80000040, 0x04258220, 0x020000c4, 0xc0ded002, > > > - 0x80000061, 0x04454220, 0x00000000, 0xc0ded003, > > > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, > > > + 0x80030061, 0x04054220, 0x00000000, 0x00000000, > > > + 0x80000069, 0x04058220, 0x02000024, 0x00000002, > > > + 0x80001940, 0x04058220, 0x02000404, 0xc0ded000, > > > + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded001, > > > + 0x80000061, 0x04454220, 0x00000000, 0x00000003, > > > 0x80000061, 0x04850220, 0x000000a4, 0x00000000, > > > - 0x80000965, 0x03058220, 0x02008020, 0xc0ded005, > > > + 0x80000965, 0x03058220, 0x02008020, 0xc0ded003, > > > 0x80000961, 0x30014220, 0x00000000, 0x00000000, > > > - 0x80001a70, 0x00018220, 0x12000304, 0xc0ded006, > > > + 0x80001a70, 0x00018220, 0x12000304, 0xc0ded004, > > > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > > > - 0x81044031, 0x00000000, 0xc0000414, 0x02a00000, > > > + 0x81004031, 0x00000000, 0xc0000414, 0x02a00000, > > > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > > > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > > > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > > > }}, > > > { .gen_ver = 0, .size = 56, .code = (const uint32_t []) { > > > - 0x80040061, 0x04054220, 0x00000000, 0x00000000, > > > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, > > > - 0x80000040, 0x04058220, 0x02000024, 0xc0ded001, > > > - 0x80000169, 0x04058220, 0x02000404, 0xc0ded000, > > > - 0x80000040, 0x04258220, 0x020000c4, 0xc0ded002, > > > - 0x80000061, 0x04454220, 0x00000000, 0xc0ded003, > > > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, > > > + 0x80030061, 0x04054220, 0x00000000, 0x00000000, > > > + 0x80000069, 0x04058220, 0x02000024, 0x00000002, > > > + 0x80000140, 0x04058220, 0x02000404, 0xc0ded000, > > > + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded001, > > > + 0x80000061, 0x04454220, 0x00000000, 0x00000003, > > > 0x80000061, 0x04850220, 0x000000a4, 0x00000000, > > > - 0x80000165, 0x03058220, 0x02008020, 0xc0ded005, > > > + 0x80000165, 0x03058220, 0x02008020, 0xc0ded003, > > > 0x80000161, 0x30014220, 0x00000000, 0x00000000, > > > - 0x80000270, 0x00018220, 0x12000304, 0xc0ded006, > > > - 0x81049031, 0x00000000, 0xc0000414, 0x02a00000, > > > + 0x80000270, 0x00018220, 0x12000304, 0xc0ded004, > > > + 0x81009031, 0x00000000, 0xc0000414, 0x02a00000, > > > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > > > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > > > 0x80000101, 0x00010000, 0x00000000, 0x00000000, > > > @@ -324,84 +323,68 @@ struct iga64_template const iga64_code_clear_exception[] = { > > > }; > > > > > > struct iga64_template const iga64_code_media_block_write[] = { > > > - { .gen_ver = 2000, .size = 56, .code = (const uint32_t []) { > > > - 0x80100061, 0x04054220, 0x00000000, 0x00000000, > > > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, > > > - 0x80000061, 0x05154220, 0x00000000, 0xc0ded004, > > > - 0x80000061, 0x05254220, 0x00000000, 0xc0ded005, > > > - 0x80000061, 0x05354220, 0x00000000, 0xc0ded006, > > > - 0x80000069, 0x02058220, 0x02000014, 0xc0ded000, > > > - 0x80000061, 0x02150220, 0x00000064, 0x00000000, > > > - 0x80001940, 0x02158220, 0x02000214, 0xc0ded001, > > > - 0x80041961, 0x04550220, 0x00220205, 0x00000000, > > > - 0x80000061, 0x04754220, 0x00000000, 0xc0ded002, > > > - 0x80132031, 0x00000000, 0xd00e0494, 0x04000000, > > > + { .gen_ver = 2000, .size = 40, .code = (const uint32_t []) { > > > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, > > > + 0x800c0061, 0x04054220, 0x00000000, 0x00000000, > > > + 0x80000069, 0x04558220, 0x02000014, 0x00000002, > > > + 0x80001940, 0x04558220, 0x02000454, 0x00000000, > > > + 0x80000040, 0x04658220, 0x02000064, 0xc0ded000, > > > + 0x80000061, 0x04754220, 0x00000000, 0x00000003, > > > + 0x80032031, 0x00000000, 0xd00e0494, 0x04000000, > > > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > > > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > > > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > > > }}, > > > - { .gen_ver = 1270, .size = 60, .code = (const uint32_t []) { > > > - 0x80040061, 0x04054220, 0x00000000, 0x00000000, > > > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, > > > - 0x80000061, 0x05254220, 0x00000000, 0xc0ded004, > > > - 0x80000061, 0x05454220, 0x00000000, 0xc0ded005, > > > - 0x80000061, 0x05654220, 0x00000000, 0xc0ded006, > > > - 0x80000069, 0x04058220, 0x02000024, 0xc0ded000, > > > - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, > > > - 0x80001940, 0x04258220, 0x02000424, 0xc0ded001, > > > - 0x80000061, 0x04454220, 0x00000000, 0xc0ded002, > > > + { .gen_ver = 1270, .size = 48, .code = (const uint32_t []) { > > > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, > > > + 0x80030061, 0x04054220, 0x00000000, 0x00000000, > > > + 0x80000069, 0x04058220, 0x02000024, 0x00000002, > > > + 0x80001940, 0x04058220, 0x02000404, 0x00000000, > > > + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, > > > + 0x80000061, 0x04454220, 0x00000000, 0x00000003, > > > 0x80000061, 0x04850220, 0x000000a4, 0x00000000, > > > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > > > - 0x80044031, 0x00000000, 0xc0000414, 0x02a00000, > > > + 0x80004031, 0x00000000, 0xc0000414, 0x02a00000, > > > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > > > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > > > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > > > }}, > > > - { .gen_ver = 1260, .size = 56, .code = (const uint32_t []) { > > > - 0x80100061, 0x04054220, 0x00000000, 0x00000000, > > > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, > > > - 0x80000061, 0x05154220, 0x00000000, 0xc0ded004, > > > - 0x80000061, 0x05254220, 0x00000000, 0xc0ded005, > > > - 0x80000061, 0x05354220, 0x00000000, 0xc0ded006, > > > - 0x80000069, 0x04058220, 0x02000014, 0xc0ded000, > > > - 0x80000061, 0x04150220, 0x00000064, 0x00000000, > > > - 0x80001940, 0x04158220, 0x02000414, 0xc0ded001, > > > - 0x80000061, 0x04254220, 0x00000000, 0xc0ded002, > > > + { .gen_ver = 1260, .size = 44, .code = (const uint32_t []) { > > > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, > > > + 0x800c0061, 0x04054220, 0x00000000, 0x00000000, > > > + 0x80000069, 0x04058220, 0x02000014, 0x00000002, > > > + 0x80001940, 0x04058220, 0x02000404, 0x00000000, > > > + 0x80000040, 0x04158220, 0x02000064, 0xc0ded000, > > > + 0x80000061, 0x04254220, 0x00000000, 0x00000003, > > > 0x80000061, 0x04450220, 0x00000054, 0x00000000, > > > - 0x80132031, 0x00000000, 0xc0000414, 0x02a00000, > > > + 0x80032031, 0x00000000, 0xc0000414, 0x02a00000, > > > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > > > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > > > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > > > }}, > > > - { .gen_ver = 1250, .size = 60, .code = (const uint32_t []) { > > > - 0x80040061, 0x04054220, 0x00000000, 0x00000000, > > > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, > > > - 0x80000061, 0x05254220, 0x00000000, 0xc0ded004, > > > - 0x80000061, 0x05454220, 0x00000000, 0xc0ded005, > > > - 0x80000061, 0x05654220, 0x00000000, 0xc0ded006, > > > - 0x80000069, 0x04058220, 0x02000024, 0xc0ded000, > > > - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, > > > - 0x80001940, 0x04258220, 0x02000424, 0xc0ded001, > > > - 0x80000061, 0x04454220, 0x00000000, 0xc0ded002, > > > + { .gen_ver = 1250, .size = 48, .code = (const uint32_t []) { > > > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, > > > + 0x80030061, 0x04054220, 0x00000000, 0x00000000, > > > + 0x80000069, 0x04058220, 0x02000024, 0x00000002, > > > + 0x80001940, 0x04058220, 0x02000404, 0x00000000, > > > + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, > > > + 0x80000061, 0x04454220, 0x00000000, 0x00000003, > > > 0x80000061, 0x04850220, 0x000000a4, 0x00000000, > > > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > > > - 0x80044031, 0x00000000, 0xc0000414, 0x02a00000, > > > + 0x80004031, 0x00000000, 0xc0000414, 0x02a00000, > > > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > > > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > > > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > > > }}, > > > - { .gen_ver = 0, .size = 56, .code = (const uint32_t []) { > > > - 0x80040061, 0x04054220, 0x00000000, 0x00000000, > > > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, > > > - 0x80000061, 0x05254220, 0x00000000, 0xc0ded004, > > > - 0x80000061, 0x05454220, 0x00000000, 0xc0ded005, > > > - 0x80000061, 0x05654220, 0x00000000, 0xc0ded006, > > > - 0x80000069, 0x04058220, 0x02000024, 0xc0ded000, > > > - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, > > > - 0x80000140, 0x04258220, 0x02000424, 0xc0ded001, > > > - 0x80000061, 0x04454220, 0x00000000, 0xc0ded002, > > > + { .gen_ver = 0, .size = 44, .code = (const uint32_t []) { > > > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, > > > + 0x80030061, 0x04054220, 0x00000000, 0x00000000, > > > + 0x80000069, 0x04058220, 0x02000024, 0x00000002, > > > + 0x80000140, 0x04058220, 0x02000404, 0x00000000, > > > + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, > > > + 0x80000061, 0x04454220, 0x00000000, 0x00000003, > > > 0x80000061, 0x04850220, 0x000000a4, 0x00000000, > > > - 0x80049031, 0x00000000, 0xc0000414, 0x02a00000, > > > + 0x80009031, 0x00000000, 0xc0000414, 0x02a00000, > > > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > > > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > > > 0x80000101, 0x00010000, 0x00000000, 0x00000000, > > > @@ -432,65 +415,68 @@ struct iga64_template const iga64_code_write_aip[] = { > > > }; > > > > > > struct iga64_template const iga64_code_media_block_write_aip[] = { > > > - { .gen_ver = 2000, .size = 44, .code = (const uint32_t []) { > > > + { .gen_ver = 2000, .size = 40, .code = (const uint32_t []) { > > > 0x80000961, 0x05050220, 0x00008020, 0x00000000, > > > - 0x80000969, 0x02058220, 0x02000014, 0x00000002, > > > - 0x80000061, 0x02150220, 0x00000064, 0x00000000, > > > - 0x80001940, 0x02158220, 0x02000214, 0xc0ded000, > > > - 0x80100061, 0x04054220, 0x00000000, 0x00000000, > > > - 0x80041a61, 0x04550220, 0x00220205, 0x00000000, > > > + 0x800c0961, 0x04054220, 0x00000000, 0x00000000, > > > + 0x80000069, 0x04558220, 0x02000014, 0x00000002, > > > + 0x80001940, 0x04558220, 0x02000454, 0x00000000, > > > + 0x80000040, 0x04658220, 0x02000064, 0xc0ded000, > > > 0x80000061, 0x04754220, 0x00000000, 0x00000003, > > > - 0x80132031, 0x00000000, 0xd00e0494, 0x04000000, > > > + 0x80032031, 0x00000000, 0xd00e0494, 0x04000000, > > > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > > > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > > > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > > > }}, > > > - { .gen_ver = 1270, .size = 44, .code = (const uint32_t []) { > > > + { .gen_ver = 1270, .size = 48, .code = (const uint32_t []) { > > > 0x80000961, 0x05050220, 0x00008040, 0x00000000, > > > - 0x80000969, 0x04058220, 0x02000024, 0x00000002, > > > - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, > > > - 0x80001940, 0x04258220, 0x02000424, 0xc0ded000, > > > + 0x80030961, 0x04054220, 0x00000000, 0x00000000, > > > + 0x80000069, 0x04058220, 0x02000024, 0x00000002, > > > + 0x80001940, 0x04058220, 0x02000404, 0x00000000, > > > + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, > > > 0x80000061, 0x04454220, 0x00000000, 0x00000003, > > > 0x80000061, 0x04850220, 0x000000a4, 0x00000000, > > > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > > > - 0x80044031, 0x00000000, 0xc0000414, 0x02a00000, > > > + 0x80004031, 0x00000000, 0xc0000414, 0x02a00000, > > > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > > > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > > > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > > > }}, > > > - { .gen_ver = 1260, .size = 40, .code = (const uint32_t []) { > > > + { .gen_ver = 1260, .size = 44, .code = (const uint32_t []) { > > > 0x80000961, 0x05050220, 0x00008020, 0x00000000, > > > - 0x80000969, 0x04058220, 0x02000014, 0x00000002, > > > - 0x80000061, 0x04150220, 0x00000064, 0x00000000, > > > - 0x80001940, 0x04158220, 0x02000414, 0xc0ded000, > > > + 0x800c0961, 0x04054220, 0x00000000, 0x00000000, > > > + 0x80000069, 0x04058220, 0x02000014, 0x00000002, > > > + 0x80001940, 0x04058220, 0x02000404, 0x00000000, > > > + 0x80000040, 0x04158220, 0x02000064, 0xc0ded000, > > > 0x80000061, 0x04254220, 0x00000000, 0x00000003, > > > 0x80000061, 0x04450220, 0x00000054, 0x00000000, > > > - 0x80132031, 0x00000000, 0xc0000414, 0x02a00000, > > > + 0x80032031, 0x00000000, 0xc0000414, 0x02a00000, > > > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > > > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > > > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > > > }}, > > > - { .gen_ver = 1250, .size = 44, .code = (const uint32_t []) { > > > + { .gen_ver = 1250, .size = 48, .code = (const uint32_t []) { > > > 0x80000961, 0x05050220, 0x00008040, 0x00000000, > > > - 0x80000969, 0x04058220, 0x02000024, 0x00000002, > > > - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, > > > - 0x80001940, 0x04258220, 0x02000424, 0xc0ded000, > > > + 0x80030961, 0x04054220, 0x00000000, 0x00000000, > > > + 0x80000069, 0x04058220, 0x02000024, 0x00000002, > > > + 0x80001940, 0x04058220, 0x02000404, 0x00000000, > > > + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, > > > 0x80000061, 0x04454220, 0x00000000, 0x00000003, > > > 0x80000061, 0x04850220, 0x000000a4, 0x00000000, > > > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > > > - 0x80044031, 0x00000000, 0xc0000414, 0x02a00000, > > > + 0x80004031, 0x00000000, 0xc0000414, 0x02a00000, > > > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > > > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > > > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > > > }}, > > > - { .gen_ver = 0, .size = 40, .code = (const uint32_t []) { > > > + { .gen_ver = 0, .size = 44, .code = (const uint32_t []) { > > > 0x80000161, 0x05050220, 0x00008040, 0x00000000, > > > - 0x80000169, 0x04058220, 0x02000024, 0x00000002, > > > - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, > > > - 0x80000140, 0x04258220, 0x02000424, 0xc0ded000, > > > + 0x80030161, 0x04054220, 0x00000000, 0x00000000, > > > + 0x80000069, 0x04058220, 0x02000024, 0x00000002, > > > + 0x80000140, 0x04058220, 0x02000404, 0x00000000, > > > + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, > > > 0x80000061, 0x04454220, 0x00000000, 0x00000003, > > > 0x80000061, 0x04850220, 0x000000a4, 0x00000000, > > > - 0x80049031, 0x00000000, 0xc0000414, 0x02a00000, > > > + 0x80009031, 0x00000000, 0xc0000414, 0x02a00000, > > > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > > > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > > > 0x80000101, 0x00010000, 0x00000000, 0x00000000, > > > @@ -499,77 +485,77 @@ struct iga64_template const iga64_code_media_block_write_aip[] = { > > > > > > struct iga64_template const iga64_code_common_target_write[] = { > > > { .gen_ver = 2000, .size = 48, .code = (const uint32_t []) { > > > - 0x80100061, 0x1e054220, 0x00000000, 0x00000000, > > > 0x80100061, 0x1f054220, 0x00000000, 0x00000000, > > > 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, > > > 0x80000061, 0x1f154220, 0x00000000, 0xc0ded002, > > > 0x80000061, 0x1f254220, 0x00000000, 0xc0ded003, > > > 0x80000061, 0x1f354220, 0x00000000, 0xc0ded004, > > > + 0x800c0061, 0x1e054220, 0x00000000, 0x00000000, > > > 0x80000061, 0x1e654220, 0x00000000, 0xc0ded000, > > > 0x80000061, 0x1e754220, 0x00000000, 0x0000000f, > > > - 0x80132031, 0x00000000, 0xd00e1e94, 0x04000000, > > > + 0x80032031, 0x00000000, 0xd00e1e94, 0x04000000, > > > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > > > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > > > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > > > }}, > > > { .gen_ver = 1270, .size = 56, .code = (const uint32_t []) { > > > - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, > > > 0x80040061, 0x1f054220, 0x00000000, 0x00000000, > > > 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, > > > 0x80000061, 0x1f254220, 0x00000000, 0xc0ded002, > > > 0x80000061, 0x1f454220, 0x00000000, 0xc0ded003, > > > 0x80000061, 0x1f654220, 0x00000000, 0xc0ded004, > > > + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, > > > 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, > > > 0x80000061, 0x1e454220, 0x00000000, 0x0000000f, > > > 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, > > > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > > > - 0x80044031, 0x00000000, 0xc0001e14, 0x02a00000, > > > + 0x80004031, 0x00000000, 0xc0001e14, 0x02a00000, > > > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > > > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > > > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > > > }}, > > > { .gen_ver = 1260, .size = 52, .code = (const uint32_t []) { > > > - 0x80100061, 0x1e054220, 0x00000000, 0x00000000, > > > 0x80100061, 0x1f054220, 0x00000000, 0x00000000, > > > 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, > > > 0x80000061, 0x1f154220, 0x00000000, 0xc0ded002, > > > 0x80000061, 0x1f254220, 0x00000000, 0xc0ded003, > > > 0x80000061, 0x1f354220, 0x00000000, 0xc0ded004, > > > + 0x800c0061, 0x1e054220, 0x00000000, 0x00000000, > > > 0x80000061, 0x1e154220, 0x00000000, 0xc0ded000, > > > 0x80000061, 0x1e254220, 0x00000000, 0x0000000f, > > > 0x80000061, 0x1e450220, 0x00000054, 0x00000000, > > > - 0x80132031, 0x00000000, 0xc0001e14, 0x02a00000, > > > + 0x80032031, 0x00000000, 0xc0001e14, 0x02a00000, > > > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > > > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > > > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > > > }}, > > > { .gen_ver = 1250, .size = 56, .code = (const uint32_t []) { > > > - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, > > > 0x80040061, 0x1f054220, 0x00000000, 0x00000000, > > > 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, > > > 0x80000061, 0x1f254220, 0x00000000, 0xc0ded002, > > > 0x80000061, 0x1f454220, 0x00000000, 0xc0ded003, > > > 0x80000061, 0x1f654220, 0x00000000, 0xc0ded004, > > > + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, > > > 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, > > > 0x80000061, 0x1e454220, 0x00000000, 0x0000000f, > > > 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, > > > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > > > - 0x80044031, 0x00000000, 0xc0001e14, 0x02a00000, > > > + 0x80004031, 0x00000000, 0xc0001e14, 0x02a00000, > > > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > > > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > > > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > > > }}, > > > { .gen_ver = 0, .size = 52, .code = (const uint32_t []) { > > > - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, > > > 0x80040061, 0x1f054220, 0x00000000, 0x00000000, > > > 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, > > > 0x80000061, 0x1f254220, 0x00000000, 0xc0ded002, > > > 0x80000061, 0x1f454220, 0x00000000, 0xc0ded003, > > > 0x80000061, 0x1f654220, 0x00000000, 0xc0ded004, > > > + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, > > > 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, > > > 0x80000061, 0x1e454220, 0x00000000, 0x0000000f, > > > 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, > > > - 0x80049031, 0x00000000, 0xc0001e14, 0x02a00000, > > > + 0x80009031, 0x00000000, 0xc0001e14, 0x02a00000, > > > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > > > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > > > 0x80000101, 0x00010000, 0x00000000, 0x00000000, > > > @@ -627,56 +613,56 @@ struct iga64_template const iga64_code_clear_r40[] = { > > > > > > struct iga64_template const iga64_code_jump_dw_neq[] = { > > > { .gen_ver = 2000, .size = 32, .code = (const uint32_t []) { > > > - 0x80100061, 0x1e054220, 0x00000000, 0x00000000, > > > + 0x800c0061, 0x1e054220, 0x00000000, 0x00000000, > > > 0x80000061, 0x1e654220, 0x00000000, 0xc0ded000, > > > 0x80000061, 0x1e754220, 0x00000000, 0x00000003, > > > - 0x80132031, 0x1f0c0000, 0xd0061e8c, 0x04000000, > > > + 0x80032031, 0x1f0c0000, 0xd0061e8c, 0x04000000, > > > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > > > 0x80008070, 0x00018220, 0x22001f04, 0xc0ded001, > > > 0x84000020, 0x00004000, 0x00000000, 0xffffffa0, > > > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > > > }}, > > > { .gen_ver = 1270, .size = 40, .code = (const uint32_t []) { > > > - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, > > > + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, > > > 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, > > > 0x80000061, 0x1e454220, 0x00000000, 0x00000003, > > > 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, > > > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > > > - 0x80044031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > > > + 0x80004031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > > > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > > > 0x80002070, 0x00018220, 0x22001f04, 0xc0ded001, > > > 0x81000020, 0x00004000, 0x00000000, 0xffffff80, > > > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > > > }}, > > > { .gen_ver = 1260, .size = 36, .code = (const uint32_t []) { > > > - 0x80100061, 0x1e054220, 0x00000000, 0x00000000, > > > + 0x800c0061, 0x1e054220, 0x00000000, 0x00000000, > > > 0x80000061, 0x1e154220, 0x00000000, 0xc0ded000, > > > 0x80000061, 0x1e254220, 0x00000000, 0x00000003, > > > 0x80000061, 0x1e450220, 0x00000054, 0x00000000, > > > - 0x80132031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > > > + 0x80032031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > > > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > > > 0x80008070, 0x00018220, 0x22001f04, 0xc0ded001, > > > 0x84000020, 0x00004000, 0x00000000, 0xffffff90, > > > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > > > }}, > > > { .gen_ver = 1250, .size = 40, .code = (const uint32_t []) { > > > - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, > > > + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, > > > 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, > > > 0x80000061, 0x1e454220, 0x00000000, 0x00000003, > > > 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, > > > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > > > - 0x80044031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > > > + 0x80004031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > > > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > > > 0x80002070, 0x00018220, 0x22001f04, 0xc0ded001, > > > 0x81000020, 0x00004000, 0x00000000, 0xffffff80, > > > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > > > }}, > > > { .gen_ver = 0, .size = 36, .code = (const uint32_t []) { > > > - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, > > > + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, > > > 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, > > > 0x80000061, 0x1e454220, 0x00000000, 0x00000003, > > > 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, > > > - 0x80049031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > > > + 0x80009031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > > > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > > > 0x80002070, 0x00018220, 0x22001f04, 0xc0ded001, > > > 0x81000120, 0x00004000, 0x00000000, 0xffffff90, > > > diff --git a/lib/iga64_macros.h b/lib/iga64_macros.h > > > index 6459b524c3fd..40b6338928e1 100644 > > > --- a/lib/iga64_macros.h > > > +++ b/lib/iga64_macros.h > > > @@ -16,4 +16,47 @@ > > > #define src1_null null:0 > > > #endif > > > > > > +/* GPGPU_R0Payload fields, Bspec: 55396, 56587 */ > > > +#define R0_TGIDX r0.1<0;1,0>:ud > > > +#define R0_TGIDY r0.6<0;1,0>:ud > > > +#define R0_FFTID r0.5<0;1,0>:ud > > > + > > > +#define SET_SHARED_MEDIA_BLOCK_MSG_HDR(dst, y, width) \ > > > +(W) mov (8) dst.0<1>:ud 0x0:ud ;\ > > > +(W) mov (1) dst.1<1>:ud y ;\ > > > +(W) mov (1) dst.2<1>:ud (width - 1):ud ;\ > > > +(W) mov (1) dst.4<1>:ud R0_FFTID > > > + > > > +#define SET_THREAD_MEDIA_BLOCK_MSG_HDR(dst, x, y, width) \ > > > +(W) mov (8) dst.0<1>:ud 0x0:ud ;\ > > > +(W) shl (1) dst.0<1>:ud R0_TGIDX 0x2:ud ;\ > > > +(W) add (1) dst.0<1>:ud dst.0<0;1,0>:ud x:ud ;\ > > > +(W) add (1) dst.1<1>:ud R0_TGIDY y ;\ > > > +(W) mov (1) dst.2<1>:ud (width - 1):ud ;\ > > > +(W) mov (1) dst.4<1>:ud R0_FFTID > > > + > > > +#define SET_SHARED_MEDIA_A2DBLOCK_PAYLOAD(dst, y, width) \ > > > +(W) mov (8) dst.0<1>:ud 0x0:ud ;\ > > > +(W) mov (1) dst.6<1>:ud y ;\ > > > +(W) mov (1) dst.7<1>:ud (width - 1):ud > > > + > > > +#define SET_THREAD_MEDIA_A2DBLOCK_PAYLOAD(dst, x, y, width) \ > > > +(W) mov (8) dst.0<1>:ud 0x0:ud ;\ > > > +(W) shl (1) dst.5<1>:ud R0_TGIDX 0x2:ud ;\ > > > +(W) add (1) dst.5<1>:ud dst.5<0;1,0>:ud x:ud ;\ > > > +(W) add (1) dst.6<1>:ud R0_TGIDY y ;\ > > > +(W) mov (1) dst.7<1>:ud (width - 1):ud ;\ > > > + > > > +#if GEN_VER < 2000 > > > +#define SET_SHARED_SPACE_ADDR(dst, y, width) SET_SHARED_MEDIA_BLOCK_MSG_HDR(dst, y, width) > > > +#define SET_THREAD_SPACE_ADDR(dst, x, y, width) SET_THREAD_MEDIA_BLOCK_MSG_HDR(dst, x, y, width) > > > +#define LOAD_SPACE_DW(dst, src) send.dc1 (1) dst src src1_null 0x0 0x2190000 > > > +#define STORE_SPACE_DW(dst, src) send.dc1 (1) null dst null 0x0 0x40A8000 > > > +#else > > > +#define SET_SHARED_SPACE_ADDR(dst, y, width) SET_SHARED_MEDIA_A2DBLOCK_PAYLOAD(dst, y, width) > > > +#define SET_THREAD_SPACE_ADDR(dst, x, y, width) SET_THREAD_MEDIA_A2DBLOCK_PAYLOAD(dst, x, y, width) > > > +#define LOAD_SPACE_DW(dst, src) send.tgm (1) dst src null:0 0x0 0x62100003 > > > +#define STORE_SPACE_DW(dst, src) send.tgm (1) null dst null:0 0x0 0x64000007 > > > +#endif > > > + > > > #endif > > > ^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH v3 3/4] lib/gpgpu_shader: pass surface desription to shaders via inline data 2024-11-21 17:12 [PATCH v3 0/4] lib/gpgpu_shader: simplify load/store shaders and add Xe3 support Andrzej Hajda 2024-11-21 17:12 ` [PATCH v3 1/4] scripts/generate_iga64_codes: add iga64_macros.h to checksum calculation Andrzej Hajda 2024-11-21 17:12 ` [PATCH v3 2/4] lib/gpgpu_shader: simplify load/store shaders Andrzej Hajda @ 2024-11-21 17:12 ` Andrzej Hajda 2024-11-22 14:27 ` Grzegorzek, Dominik 2024-11-21 17:12 ` [PATCH v3 4/4] lib/gpgpu_shader: add support for Xe3 platforms Andrzej Hajda ` (4 subsequent siblings) 7 siblings, 1 reply; 15+ messages in thread From: Andrzej Hajda @ 2024-11-21 17:12 UTC (permalink / raw) To: igt-dev Cc: Dominik Grzegorzek, Zbigniew Kempczyński, Gwan-gyeong Mun, Kamil Konieczny, Christoph Manszewski, Andrzej Hajda Since newer architectures require stateless load/stores we need to pass surface description to the shader. Instead of doing it for every call we can use inline data which is passed by COMPUTE_WALKER and is stored in GRF register r1. Signed-off-by: Andrzej Hajda <andrzej.hajda@intel.com> --- lib/gpgpu_shader.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/lib/gpgpu_shader.c b/lib/gpgpu_shader.c index 363435e7efd3..518423158880 100644 --- a/lib/gpgpu_shader.c +++ b/lib/gpgpu_shader.c @@ -148,6 +148,16 @@ __xelp_gpgpu_execfunc(struct intel_bb *ibb, engine | I915_EXEC_NO_RELOC, false); } +static void +fill_inline_data(uint32_t *inline_data, uint64_t target_offset, struct intel_buf *target) +{ + igt_assert(target->surface[0].stride == intel_buf_width(target) * target->bpp/8); + *inline_data++ = lower_32_bits(target_offset); + *inline_data++ = upper_32_bits(target_offset); + *inline_data++ = target->surface[0].stride; + *inline_data++ = intel_buf_height(target); +} + static void __xehp_gpgpu_execfunc(struct intel_bb *ibb, struct intel_buf *target, @@ -159,6 +169,7 @@ __xehp_gpgpu_execfunc(struct intel_bb *ibb, struct xehp_interface_descriptor_data idd; uint32_t sip_offset; uint64_t engine; + uint32_t *inline_data; intel_bb_add_intel_buf(ibb, target, true); @@ -186,7 +197,10 @@ __xehp_gpgpu_execfunc(struct intel_bb *ibb, if (sip_offset) emit_sip(ibb, sip_offset); + /* Inline data is at 31th/32th dword of COMPUTE_WALKER, BSpec: 67028 */ + inline_data = intel_bb_ptr(ibb) + 4 * (shdr->gen_ver < 2000 ? 31 : 32); xehp_emit_compute_walk(ibb, 0, 0, x_dim * 16, y_dim, &idd, 0x0); + fill_inline_data(inline_data, CANONICAL(target->addr.offset), target); intel_bb_out(ibb, MI_BATCH_BUFFER_END); intel_bb_ptr_align(ibb, 32); @@ -217,10 +231,18 @@ void gpgpu_shader_exec(struct intel_bb *ibb, struct gpgpu_shader *sip, uint64_t ring, bool explicit_engine) { + uint64_t ahnd; + igt_require(shdr->gen_ver >= SUPPORTED_GEN_VER); igt_assert(ibb->size >= PAGE_SIZE); igt_assert(ibb->ptr == ibb->batch); + ahnd = intel_allocator_open_full(ibb->fd, 0, 0, 0, INTEL_ALLOCATOR_SIMPLE, + ALLOC_STRATEGY_LOW_TO_HIGH, 0); + target->addr.offset = intel_allocator_alloc(ahnd, target->handle, + target->surface[0].size, 0); + intel_allocator_close(ahnd); + if (shdr->gen_ver >= 1250) __xehp_gpgpu_execfunc(ibb, target, x_dim, y_dim, shdr, sip, ring, explicit_engine); -- 2.34.1 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH v3 3/4] lib/gpgpu_shader: pass surface desription to shaders via inline data 2024-11-21 17:12 ` [PATCH v3 3/4] lib/gpgpu_shader: pass surface desription to shaders via inline data Andrzej Hajda @ 2024-11-22 14:27 ` Grzegorzek, Dominik 0 siblings, 0 replies; 15+ messages in thread From: Grzegorzek, Dominik @ 2024-11-22 14:27 UTC (permalink / raw) To: igt-dev@lists.freedesktop.org, Hajda, Andrzej Cc: Kempczynski, Zbigniew, Mun, Gwan-gyeong, Manszewski, Christoph, kamil.konieczny@linux.intel.com On Thu, 2024-11-21 at 18:12 +0100, Andrzej Hajda wrote: > Since newer architectures require stateless load/stores we need to pass > surface description to the shader. Instead of doing it for every call > we can use inline data which is passed by COMPUTE_WALKER and is stored > in GRF register r1. > > Signed-off-by: Andrzej Hajda <andrzej.hajda@intel.com> > --- > lib/gpgpu_shader.c | 22 ++++++++++++++++++++++ > 1 file changed, 22 insertions(+) > > diff --git a/lib/gpgpu_shader.c b/lib/gpgpu_shader.c > index 363435e7efd3..518423158880 100644 > --- a/lib/gpgpu_shader.c > +++ b/lib/gpgpu_shader.c > @@ -148,6 +148,16 @@ __xelp_gpgpu_execfunc(struct intel_bb *ibb, > engine | I915_EXEC_NO_RELOC, false); > } > > +static void > +fill_inline_data(uint32_t *inline_data, uint64_t target_offset, struct intel_buf *target) > +{ > + igt_assert(target->surface[0].stride == intel_buf_width(target) * target->bpp/8); > + *inline_data++ = lower_32_bits(target_offset); > + *inline_data++ = upper_32_bits(target_offset); > + *inline_data++ = target->surface[0].stride; > + *inline_data++ = intel_buf_height(target); > +} > + > static void > __xehp_gpgpu_execfunc(struct intel_bb *ibb, > struct intel_buf *target, > @@ -159,6 +169,7 @@ __xehp_gpgpu_execfunc(struct intel_bb *ibb, > struct xehp_interface_descriptor_data idd; > uint32_t sip_offset; > uint64_t engine; > + uint32_t *inline_data; > > intel_bb_add_intel_buf(ibb, target, true); > > @@ -186,7 +197,10 @@ __xehp_gpgpu_execfunc(struct intel_bb *ibb, > if (sip_offset) > emit_sip(ibb, sip_offset); > > + /* Inline data is at 31th/32th dword of COMPUTE_WALKER, BSpec: 67028 */ > + inline_data = intel_bb_ptr(ibb) + 4 * (shdr->gen_ver < 2000 ? 31 : 32); > xehp_emit_compute_walk(ibb, 0, 0, x_dim * 16, y_dim, &idd, 0x0); > + fill_inline_data(inline_data, CANONICAL(target->addr.offset), target); > > intel_bb_out(ibb, MI_BATCH_BUFFER_END); > intel_bb_ptr_align(ibb, 32); > @@ -217,10 +231,18 @@ void gpgpu_shader_exec(struct intel_bb *ibb, > struct gpgpu_shader *sip, > uint64_t ring, bool explicit_engine) > { > + uint64_t ahnd; > + > igt_require(shdr->gen_ver >= SUPPORTED_GEN_VER); > igt_assert(ibb->size >= PAGE_SIZE); > igt_assert(ibb->ptr == ibb->batch); > > + ahnd = intel_allocator_open_full(ibb->fd, 0, 0, 0, INTEL_ALLOCATOR_SIMPLE, > + ALLOC_STRATEGY_LOW_TO_HIGH, 0); > + target->addr.offset = intel_allocator_alloc(ahnd, target->handle, > + target->surface[0].size, 0); I believe we should open allocator with ibb->vm_id to be error prone. Otherwise we make an assumption that ibb->vm_id empty upon gpgpu_shader_exec. Which may not be true. Regards, Dominik > + intel_allocator_close(ahnd); > + > if (shdr->gen_ver >= 1250) > __xehp_gpgpu_execfunc(ibb, target, x_dim, y_dim, shdr, sip, > ring, explicit_engine); > ^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH v3 4/4] lib/gpgpu_shader: add support for Xe3 platforms 2024-11-21 17:12 [PATCH v3 0/4] lib/gpgpu_shader: simplify load/store shaders and add Xe3 support Andrzej Hajda ` (2 preceding siblings ...) 2024-11-21 17:12 ` [PATCH v3 3/4] lib/gpgpu_shader: pass surface desription to shaders via inline data Andrzej Hajda @ 2024-11-21 17:12 ` Andrzej Hajda 2024-11-22 14:11 ` Grzegorzek, Dominik 2024-11-21 22:40 ` ✓ Xe.CI.BAT: success for lib/gpgpu_shader: simplify load/store shaders and add Xe3 support Patchwork ` (3 subsequent siblings) 7 siblings, 1 reply; 15+ messages in thread From: Andrzej Hajda @ 2024-11-21 17:12 UTC (permalink / raw) To: igt-dev Cc: Dominik Grzegorzek, Zbigniew Kempczyński, Gwan-gyeong Mun, Kamil Konieczny, Christoph Manszewski, Andrzej Hajda Xe3 platforms disallow indirect load/store addressing. Surface descriptor must be passed in 2DBlock payload. Use for it inline data passed from thread dispatcher. Signed-off-by: Andrzej Hajda <andrzej.hajda@intel.com> --- lib/gpgpu_shader.c | 20 +++++++++++++------- lib/iga64_generated_codes.c | 13 ++++++++----- lib/iga64_macros.h | 37 +++++++++++++++++++++++++++++++++---- 3 files changed, 54 insertions(+), 16 deletions(-) diff --git a/lib/gpgpu_shader.c b/lib/gpgpu_shader.c index 518423158880..27e8be6b37e2 100644 --- a/lib/gpgpu_shader.c +++ b/lib/gpgpu_shader.c @@ -210,6 +210,17 @@ __xehp_gpgpu_execfunc(struct intel_bb *ibb, engine | I915_EXEC_NO_RELOC, false); } +static void gpgpu_alloc_gpu_addr(int fd, struct intel_buf *target) +{ + uint64_t ahnd; + + ahnd = intel_allocator_open_full(fd, 0, 0, 0, INTEL_ALLOCATOR_SIMPLE, + ALLOC_STRATEGY_LOW_TO_HIGH, 0); + target->addr.offset = intel_allocator_alloc(ahnd, target->handle, + target->surface[0].size, 0); + intel_allocator_close(ahnd); +} + /** * gpgpu_shader_exec: * @ibb: pointer to initialized intel_bb @@ -231,17 +242,12 @@ void gpgpu_shader_exec(struct intel_bb *ibb, struct gpgpu_shader *sip, uint64_t ring, bool explicit_engine) { - uint64_t ahnd; - igt_require(shdr->gen_ver >= SUPPORTED_GEN_VER); igt_assert(ibb->size >= PAGE_SIZE); igt_assert(ibb->ptr == ibb->batch); - ahnd = intel_allocator_open_full(ibb->fd, 0, 0, 0, INTEL_ALLOCATOR_SIMPLE, - ALLOC_STRATEGY_LOW_TO_HIGH, 0); - target->addr.offset = intel_allocator_alloc(ahnd, target->handle, - target->surface[0].size, 0); - intel_allocator_close(ahnd); + if (target->addr.offset == INTEL_BUF_INVALID_ADDRESS) + gpgpu_alloc_gpu_addr(ibb->fd, target); if (shdr->gen_ver >= 1250) __xehp_gpgpu_execfunc(ibb, target, x_dim, y_dim, shdr, sip, diff --git a/lib/iga64_generated_codes.c b/lib/iga64_generated_codes.c index 04015b0b6d29..a12135e7dbfd 100644 --- a/lib/iga64_generated_codes.c +++ b/lib/iga64_generated_codes.c @@ -3,7 +3,7 @@ #include "gpgpu_shader.h" -#define MD5_SUM_IGA64_ASMS da66be3cf9bec819a61429de75943011 +#define MD5_SUM_IGA64_ASMS 7b1db60d1de46cf35666f2a7f51e8fc2 struct iga64_template const iga64_code_gpgpu_fill[] = { { .gen_ver = 2000, .size = 44, .code = (const uint32_t []) { @@ -80,10 +80,11 @@ struct iga64_template const iga64_code_gpgpu_fill[] = { }; struct iga64_template const iga64_code_end_system_routine_step_if_eq[] = { - { .gen_ver = 2000, .size = 44, .code = (const uint32_t []) { + { .gen_ver = 2000, .size = 48, .code = (const uint32_t []) { 0x80000966, 0x80018220, 0x02008000, 0x00008000, 0x80000965, 0x80118220, 0x02008010, 0xc0ded000, 0x800c0961, 0x1e054220, 0x00000000, 0x00000000, + 0x80000061, 0x1e554220, 0x00000000, 0x00000000, 0x80000061, 0x1e654220, 0x00000000, 0xc0ded000, 0x80000061, 0x1e754220, 0x00000000, 0x00000003, 0x80032031, 0x1f0c0000, 0xd0061e8c, 0x04000000, @@ -484,13 +485,14 @@ struct iga64_template const iga64_code_media_block_write_aip[] = { }; struct iga64_template const iga64_code_common_target_write[] = { - { .gen_ver = 2000, .size = 48, .code = (const uint32_t []) { + { .gen_ver = 2000, .size = 52, .code = (const uint32_t []) { 0x80100061, 0x1f054220, 0x00000000, 0x00000000, 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, 0x80000061, 0x1f154220, 0x00000000, 0xc0ded002, 0x80000061, 0x1f254220, 0x00000000, 0xc0ded003, 0x80000061, 0x1f354220, 0x00000000, 0xc0ded004, 0x800c0061, 0x1e054220, 0x00000000, 0x00000000, + 0x80000061, 0x1e554220, 0x00000000, 0x00000000, 0x80000061, 0x1e654220, 0x00000000, 0xc0ded000, 0x80000061, 0x1e754220, 0x00000000, 0x0000000f, 0x80032031, 0x00000000, 0xd00e1e94, 0x04000000, @@ -612,14 +614,15 @@ struct iga64_template const iga64_code_clear_r40[] = { }; struct iga64_template const iga64_code_jump_dw_neq[] = { - { .gen_ver = 2000, .size = 32, .code = (const uint32_t []) { + { .gen_ver = 2000, .size = 36, .code = (const uint32_t []) { 0x800c0061, 0x1e054220, 0x00000000, 0x00000000, + 0x80000061, 0x1e554220, 0x00000000, 0x00000000, 0x80000061, 0x1e654220, 0x00000000, 0xc0ded000, 0x80000061, 0x1e754220, 0x00000000, 0x00000003, 0x80032031, 0x1f0c0000, 0xd0061e8c, 0x04000000, 0x80000061, 0x30014220, 0x00000000, 0x00000000, 0x80008070, 0x00018220, 0x22001f04, 0xc0ded001, - 0x84000020, 0x00004000, 0x00000000, 0xffffffa0, + 0x84000020, 0x00004000, 0x00000000, 0xffffff90, 0x80000901, 0x00010000, 0x00000000, 0x00000000, }}, { .gen_ver = 1270, .size = 40, .code = (const uint32_t []) { diff --git a/lib/iga64_macros.h b/lib/iga64_macros.h index 40b6338928e1..f82785610207 100644 --- a/lib/iga64_macros.h +++ b/lib/iga64_macros.h @@ -21,6 +21,13 @@ #define R0_TGIDY r0.6<0;1,0>:ud #define R0_FFTID r0.5<0;1,0>:ud +/* Inline data from COMPUTE_WALKER*, Bspec: 47203, 73584 + * Filled by __xe*_gpgpu_execfunc. + */ +#define R1_TGT_ADDRESS r1.0<0;1,0>:uq +#define R1_TGT_WIDTH r1.2<0;1,0>:ud +#define R1_TGT_HEIGHT r1.3<0;1,0>:ud + #define SET_SHARED_MEDIA_BLOCK_MSG_HDR(dst, y, width) \ (W) mov (8) dst.0<1>:ud 0x0:ud ;\ (W) mov (1) dst.1<1>:ud y ;\ @@ -35,28 +42,50 @@ (W) mov (1) dst.2<1>:ud (width - 1):ud ;\ (W) mov (1) dst.4<1>:ud R0_FFTID +#if GEN_VER < 3000 +#define SET_SURFACE_DESC(dst) \ +(W) mov (8) dst.0<1>:ud 0x0:ud +#else +#define SET_SURFACE_DESC(dst) \ +(W) mov (1) dst.0<1>:uq R1_TGT_ADDRESS ;\ +(W) add (1) dst.2<1>:ud R1_TGT_WIDTH -1:d ;\ +(W) add (1) dst.3<1>:ud R1_TGT_HEIGHT -1:d ;\ +(W) add (1) dst.4<1>:ud R1_TGT_WIDTH -1:d +#endif + #define SET_SHARED_MEDIA_A2DBLOCK_PAYLOAD(dst, y, width) \ -(W) mov (8) dst.0<1>:ud 0x0:ud ;\ -(W) mov (1) dst.6<1>:ud y ;\ + SET_SURFACE_DESC(dst) ;\ +(W) mov (1) dst.5<1>:ud 0x0:ud ;\ +(W) mov (1) dst.6<1>:ud y ;\ (W) mov (1) dst.7<1>:ud (width - 1):ud -#define SET_THREAD_MEDIA_A2DBLOCK_PAYLOAD(dst, x, y, width) \ -(W) mov (8) dst.0<1>:ud 0x0:ud ;\ +#define SET_THREAD_MEDIA_A2DBLOCK_PAYLOAD(dst, x, y, width) \ + SET_SURFACE_DESC(dst) ;\ (W) shl (1) dst.5<1>:ud R0_TGIDX 0x2:ud ;\ (W) add (1) dst.5<1>:ud dst.5<0;1,0>:ud x:ud ;\ (W) add (1) dst.6<1>:ud R0_TGIDY y ;\ (W) mov (1) dst.7<1>:ud (width - 1):ud ;\ #if GEN_VER < 2000 + #define SET_SHARED_SPACE_ADDR(dst, y, width) SET_SHARED_MEDIA_BLOCK_MSG_HDR(dst, y, width) #define SET_THREAD_SPACE_ADDR(dst, x, y, width) SET_THREAD_MEDIA_BLOCK_MSG_HDR(dst, x, y, width) #define LOAD_SPACE_DW(dst, src) send.dc1 (1) dst src src1_null 0x0 0x2190000 #define STORE_SPACE_DW(dst, src) send.dc1 (1) null dst null 0x0 0x40A8000 + #else + #define SET_SHARED_SPACE_ADDR(dst, y, width) SET_SHARED_MEDIA_A2DBLOCK_PAYLOAD(dst, y, width) #define SET_THREAD_SPACE_ADDR(dst, x, y, width) SET_THREAD_MEDIA_A2DBLOCK_PAYLOAD(dst, x, y, width) + +#if GEN_VER < 3000 #define LOAD_SPACE_DW(dst, src) send.tgm (1) dst src null:0 0x0 0x62100003 #define STORE_SPACE_DW(dst, src) send.tgm (1) null dst null:0 0x0 0x64000007 +#else +#define LOAD_SPACE_DW(dst, src) send.ugm (1) dst src null:0 0x0 0x2120003 +#define STORE_SPACE_DW(dst, src) send.ugm (1) null dst src:1 0x0 0x2020007 +#endif + #endif #endif -- 2.34.1 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH v3 4/4] lib/gpgpu_shader: add support for Xe3 platforms 2024-11-21 17:12 ` [PATCH v3 4/4] lib/gpgpu_shader: add support for Xe3 platforms Andrzej Hajda @ 2024-11-22 14:11 ` Grzegorzek, Dominik 2024-11-22 14:24 ` Hajda, Andrzej 0 siblings, 1 reply; 15+ messages in thread From: Grzegorzek, Dominik @ 2024-11-22 14:11 UTC (permalink / raw) To: igt-dev@lists.freedesktop.org, Hajda, Andrzej Cc: Kempczynski, Zbigniew, Mun, Gwan-gyeong, Manszewski, Christoph, kamil.konieczny@linux.intel.com On Thu, 2024-11-21 at 18:12 +0100, Andrzej Hajda wrote: > Xe3 platforms disallow indirect load/store addressing. Surface descriptor > must be passed in 2DBlock payload. Use for it inline data passed from > thread dispatcher. > > Signed-off-by: Andrzej Hajda <andrzej.hajda@intel.com> > --- > lib/gpgpu_shader.c | 20 +++++++++++++------- > lib/iga64_generated_codes.c | 13 ++++++++----- > lib/iga64_macros.h | 37 +++++++++++++++++++++++++++++++++---- > 3 files changed, 54 insertions(+), 16 deletions(-) > > diff --git a/lib/gpgpu_shader.c b/lib/gpgpu_shader.c > index 518423158880..27e8be6b37e2 100644 > --- a/lib/gpgpu_shader.c > +++ b/lib/gpgpu_shader.c > @@ -210,6 +210,17 @@ __xehp_gpgpu_execfunc(struct intel_bb *ibb, > engine | I915_EXEC_NO_RELOC, false); > } > > +static void gpgpu_alloc_gpu_addr(int fd, struct intel_buf *target) > +{ > + uint64_t ahnd; > + > + ahnd = intel_allocator_open_full(fd, 0, 0, 0, INTEL_ALLOCATOR_SIMPLE, > + ALLOC_STRATEGY_LOW_TO_HIGH, 0); > + target->addr.offset = intel_allocator_alloc(ahnd, target->handle, > + target->surface[0].size, 0); > + intel_allocator_close(ahnd); > +} > + > /** > * gpgpu_shader_exec: > * @ibb: pointer to initialized intel_bb > @@ -231,17 +242,12 @@ void gpgpu_shader_exec(struct intel_bb *ibb, > struct gpgpu_shader *sip, > uint64_t ring, bool explicit_engine) > { > - uint64_t ahnd; > - > igt_require(shdr->gen_ver >= SUPPORTED_GEN_VER); > igt_assert(ibb->size >= PAGE_SIZE); > igt_assert(ibb->ptr == ibb->batch); > > - ahnd = intel_allocator_open_full(ibb->fd, 0, 0, 0, INTEL_ALLOCATOR_SIMPLE, > - ALLOC_STRATEGY_LOW_TO_HIGH, 0); > - target->addr.offset = intel_allocator_alloc(ahnd, target->handle, > - target->surface[0].size, 0); > - intel_allocator_close(ahnd); > + if (target->addr.offset == INTEL_BUF_INVALID_ADDRESS) > + gpgpu_alloc_gpu_addr(ibb->fd, target); You could define gpgpu_alloc_gpu_addr in a previous patch. > > if (shdr->gen_ver >= 1250) > __xehp_gpgpu_execfunc(ibb, target, x_dim, y_dim, shdr, sip, > diff --git a/lib/iga64_generated_codes.c b/lib/iga64_generated_codes.c > index 04015b0b6d29..a12135e7dbfd 100644 > --- a/lib/iga64_generated_codes.c > +++ b/lib/iga64_generated_codes.c > @@ -3,7 +3,7 @@ > > #include "gpgpu_shader.h" > > -#define MD5_SUM_IGA64_ASMS da66be3cf9bec819a61429de75943011 > +#define MD5_SUM_IGA64_ASMS 7b1db60d1de46cf35666f2a7f51e8fc2 > > struct iga64_template const iga64_code_gpgpu_fill[] = { > { .gen_ver = 2000, .size = 44, .code = (const uint32_t []) { > @@ -80,10 +80,11 @@ struct iga64_template const iga64_code_gpgpu_fill[] = { > }; > > struct iga64_template const iga64_code_end_system_routine_step_if_eq[] = { > - { .gen_ver = 2000, .size = 44, .code = (const uint32_t []) { > + { .gen_ver = 2000, .size = 48, .code = (const uint32_t []) { > 0x80000966, 0x80018220, 0x02008000, 0x00008000, > 0x80000965, 0x80118220, 0x02008010, 0xc0ded000, > 0x800c0961, 0x1e054220, 0x00000000, 0x00000000, > + 0x80000061, 0x1e554220, 0x00000000, 0x00000000, > 0x80000061, 0x1e654220, 0x00000000, 0xc0ded000, > 0x80000061, 0x1e754220, 0x00000000, 0x00000003, > 0x80032031, 0x1f0c0000, 0xd0061e8c, 0x04000000, > @@ -484,13 +485,14 @@ struct iga64_template const iga64_code_media_block_write_aip[] = { > }; > > struct iga64_template const iga64_code_common_target_write[] = { > - { .gen_ver = 2000, .size = 48, .code = (const uint32_t []) { > + { .gen_ver = 2000, .size = 52, .code = (const uint32_t []) { > 0x80100061, 0x1f054220, 0x00000000, 0x00000000, > 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, > 0x80000061, 0x1f154220, 0x00000000, 0xc0ded002, > 0x80000061, 0x1f254220, 0x00000000, 0xc0ded003, > 0x80000061, 0x1f354220, 0x00000000, 0xc0ded004, > 0x800c0061, 0x1e054220, 0x00000000, 0x00000000, > + 0x80000061, 0x1e554220, 0x00000000, 0x00000000, > 0x80000061, 0x1e654220, 0x00000000, 0xc0ded000, > 0x80000061, 0x1e754220, 0x00000000, 0x0000000f, > 0x80032031, 0x00000000, 0xd00e1e94, 0x04000000, > @@ -612,14 +614,15 @@ struct iga64_template const iga64_code_clear_r40[] = { > }; > > struct iga64_template const iga64_code_jump_dw_neq[] = { > - { .gen_ver = 2000, .size = 32, .code = (const uint32_t []) { > + { .gen_ver = 2000, .size = 36, .code = (const uint32_t []) { > 0x800c0061, 0x1e054220, 0x00000000, 0x00000000, > + 0x80000061, 0x1e554220, 0x00000000, 0x00000000, > 0x80000061, 0x1e654220, 0x00000000, 0xc0ded000, > 0x80000061, 0x1e754220, 0x00000000, 0x00000003, > 0x80032031, 0x1f0c0000, 0xd0061e8c, 0x04000000, > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > 0x80008070, 0x00018220, 0x22001f04, 0xc0ded001, > - 0x84000020, 0x00004000, 0x00000000, 0xffffffa0, > + 0x84000020, 0x00004000, 0x00000000, 0xffffff90, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > { .gen_ver = 1270, .size = 40, .code = (const uint32_t []) { > diff --git a/lib/iga64_macros.h b/lib/iga64_macros.h > index 40b6338928e1..f82785610207 100644 > --- a/lib/iga64_macros.h > +++ b/lib/iga64_macros.h > @@ -21,6 +21,13 @@ > #define R0_TGIDY r0.6<0;1,0>:ud > #define R0_FFTID r0.5<0;1,0>:ud > > +/* Inline data from COMPUTE_WALKER*, Bspec: 47203, 73584 > + * Filled by __xe*_gpgpu_execfunc. > + */ > +#define R1_TGT_ADDRESS r1.0<0;1,0>:uq > +#define R1_TGT_WIDTH r1.2<0;1,0>:ud > +#define R1_TGT_HEIGHT r1.3<0;1,0>:ud > + > #define SET_SHARED_MEDIA_BLOCK_MSG_HDR(dst, y, width) \ > (W) mov (8) dst.0<1>:ud 0x0:ud ;\ > (W) mov (1) dst.1<1>:ud y ;\ > @@ -35,28 +42,50 @@ > (W) mov (1) dst.2<1>:ud (width - 1):ud ;\ > (W) mov (1) dst.4<1>:ud R0_FFTID > > +#if GEN_VER < 3000 > +#define SET_SURFACE_DESC(dst) \ > +(W) mov (8) dst.0<1>:ud 0x0:ud > +#else > +#define SET_SURFACE_DESC(dst) \ > +(W) mov (1) dst.0<1>:uq R1_TGT_ADDRESS ;\ > +(W) add (1) dst.2<1>:ud R1_TGT_WIDTH -1:d ;\ > +(W) add (1) dst.3<1>:ud R1_TGT_HEIGHT -1:d ;\ > +(W) add (1) dst.4<1>:ud R1_TGT_WIDTH -1:d > +#endif > + > #define SET_SHARED_MEDIA_A2DBLOCK_PAYLOAD(dst, y, width) \ > -(W) mov (8) dst.0<1>:ud 0x0:ud ;\ > -(W) mov (1) dst.6<1>:ud y ;\ > + SET_SURFACE_DESC(dst) ;\ > +(W) mov (1) dst.5<1>:ud 0x0:ud ;\ > +(W) mov (1) dst.6<1>:ud y ;\ > (W) mov (1) dst.7<1>:ud (width - 1):ud > > -#define SET_THREAD_MEDIA_A2DBLOCK_PAYLOAD(dst, x, y, width) \ > -(W) mov (8) dst.0<1>:ud 0x0:ud ;\ > +#define SET_THREAD_MEDIA_A2DBLOCK_PAYLOAD(dst, x, y, width) \ > + SET_SURFACE_DESC(dst) ;\ > (W) shl (1) dst.5<1>:ud R0_TGIDX 0x2:ud ;\ > (W) add (1) dst.5<1>:ud dst.5<0;1,0>:ud x:ud ;\ > (W) add (1) dst.6<1>:ud R0_TGIDY y ;\ > (W) mov (1) dst.7<1>:ud (width - 1):ud ;\ > > #if GEN_VER < 2000 > + > #define SET_SHARED_SPACE_ADDR(dst, y, width) SET_SHARED_MEDIA_BLOCK_MSG_HDR(dst, y, width) > #define SET_THREAD_SPACE_ADDR(dst, x, y, width) SET_THREAD_MEDIA_BLOCK_MSG_HDR(dst, x, y, width) > #define LOAD_SPACE_DW(dst, src) send.dc1 (1) dst src src1_null 0x0 0x2190000 > #define STORE_SPACE_DW(dst, src) send.dc1 (1) null dst null 0x0 0x40A8000 > + > #else > + > #define SET_SHARED_SPACE_ADDR(dst, y, width) SET_SHARED_MEDIA_A2DBLOCK_PAYLOAD(dst, y, width) > #define SET_THREAD_SPACE_ADDR(dst, x, y, width) SET_THREAD_MEDIA_A2DBLOCK_PAYLOAD(dst, x, y, width) > + > +#if GEN_VER < 3000 > #define LOAD_SPACE_DW(dst, src) send.tgm (1) dst src null:0 0x0 0x62100003 > #define STORE_SPACE_DW(dst, src) send.tgm (1) null dst null:0 0x0 0x64000007 > +#else > +#define LOAD_SPACE_DW(dst, src) send.ugm (1) dst src null:0 0x0 0x2120003 > +#define STORE_SPACE_DW(dst, src) send.ugm (1) null dst src:1 0x0 0x2020007 > +#endif > + > #endif > > #endif > ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v3 4/4] lib/gpgpu_shader: add support for Xe3 platforms 2024-11-22 14:11 ` Grzegorzek, Dominik @ 2024-11-22 14:24 ` Hajda, Andrzej 0 siblings, 0 replies; 15+ messages in thread From: Hajda, Andrzej @ 2024-11-22 14:24 UTC (permalink / raw) To: Grzegorzek, Dominik, igt-dev@lists.freedesktop.org Cc: Kempczynski, Zbigniew, Mun, Gwan-gyeong, Manszewski, Christoph, kamil.konieczny@linux.intel.com W dniu 22.11.2024 o 15:11, Grzegorzek, Dominik pisze: > On Thu, 2024-11-21 at 18:12 +0100, Andrzej Hajda wrote: >> Xe3 platforms disallow indirect load/store addressing. Surface descriptor >> must be passed in 2DBlock payload. Use for it inline data passed from >> thread dispatcher. >> >> Signed-off-by: Andrzej Hajda <andrzej.hajda@intel.com> >> --- >> lib/gpgpu_shader.c | 20 +++++++++++++------- >> lib/iga64_generated_codes.c | 13 ++++++++----- >> lib/iga64_macros.h | 37 +++++++++++++++++++++++++++++++++---- >> 3 files changed, 54 insertions(+), 16 deletions(-) >> >> diff --git a/lib/gpgpu_shader.c b/lib/gpgpu_shader.c >> index 518423158880..27e8be6b37e2 100644 >> --- a/lib/gpgpu_shader.c >> +++ b/lib/gpgpu_shader.c >> @@ -210,6 +210,17 @@ __xehp_gpgpu_execfunc(struct intel_bb *ibb, >> engine | I915_EXEC_NO_RELOC, false); >> } >> >> +static void gpgpu_alloc_gpu_addr(int fd, struct intel_buf *target) >> +{ >> + uint64_t ahnd; >> + >> + ahnd = intel_allocator_open_full(fd, 0, 0, 0, INTEL_ALLOCATOR_SIMPLE, >> + ALLOC_STRATEGY_LOW_TO_HIGH, 0); >> + target->addr.offset = intel_allocator_alloc(ahnd, target->handle, >> + target->surface[0].size, 0); >> + intel_allocator_close(ahnd); >> +} >> + >> /** >> * gpgpu_shader_exec: >> * @ibb: pointer to initialized intel_bb >> @@ -231,17 +242,12 @@ void gpgpu_shader_exec(struct intel_bb *ibb, >> struct gpgpu_shader *sip, >> uint64_t ring, bool explicit_engine) >> { >> - uint64_t ahnd; >> - >> igt_require(shdr->gen_ver >= SUPPORTED_GEN_VER); >> igt_assert(ibb->size >= PAGE_SIZE); >> igt_assert(ibb->ptr == ibb->batch); >> >> - ahnd = intel_allocator_open_full(ibb->fd, 0, 0, 0, INTEL_ALLOCATOR_SIMPLE, >> - ALLOC_STRATEGY_LOW_TO_HIGH, 0); >> - target->addr.offset = intel_allocator_alloc(ahnd, target->handle, >> - target->surface[0].size, 0); >> - intel_allocator_close(ahnd); >> + if (target->addr.offset == INTEL_BUF_INVALID_ADDRESS) >> + gpgpu_alloc_gpu_addr(ibb->fd, target); > You could define gpgpu_alloc_gpu_addr in a previous patch. Ups, I apparently messed it up when I was merging the late fixup, will move it to prev patch. Regards Andrzej >> >> if (shdr->gen_ver >= 1250) >> __xehp_gpgpu_execfunc(ibb, target, x_dim, y_dim, shdr, sip, >> diff --git a/lib/iga64_generated_codes.c b/lib/iga64_generated_codes.c >> index 04015b0b6d29..a12135e7dbfd 100644 >> --- a/lib/iga64_generated_codes.c >> +++ b/lib/iga64_generated_codes.c >> @@ -3,7 +3,7 @@ >> >> #include "gpgpu_shader.h" >> >> -#define MD5_SUM_IGA64_ASMS da66be3cf9bec819a61429de75943011 >> +#define MD5_SUM_IGA64_ASMS 7b1db60d1de46cf35666f2a7f51e8fc2 >> >> struct iga64_template const iga64_code_gpgpu_fill[] = { >> { .gen_ver = 2000, .size = 44, .code = (const uint32_t []) { >> @@ -80,10 +80,11 @@ struct iga64_template const iga64_code_gpgpu_fill[] = { >> }; >> >> struct iga64_template const iga64_code_end_system_routine_step_if_eq[] = { >> - { .gen_ver = 2000, .size = 44, .code = (const uint32_t []) { >> + { .gen_ver = 2000, .size = 48, .code = (const uint32_t []) { >> 0x80000966, 0x80018220, 0x02008000, 0x00008000, >> 0x80000965, 0x80118220, 0x02008010, 0xc0ded000, >> 0x800c0961, 0x1e054220, 0x00000000, 0x00000000, >> + 0x80000061, 0x1e554220, 0x00000000, 0x00000000, >> 0x80000061, 0x1e654220, 0x00000000, 0xc0ded000, >> 0x80000061, 0x1e754220, 0x00000000, 0x00000003, >> 0x80032031, 0x1f0c0000, 0xd0061e8c, 0x04000000, >> @@ -484,13 +485,14 @@ struct iga64_template const iga64_code_media_block_write_aip[] = { >> }; >> >> struct iga64_template const iga64_code_common_target_write[] = { >> - { .gen_ver = 2000, .size = 48, .code = (const uint32_t []) { >> + { .gen_ver = 2000, .size = 52, .code = (const uint32_t []) { >> 0x80100061, 0x1f054220, 0x00000000, 0x00000000, >> 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, >> 0x80000061, 0x1f154220, 0x00000000, 0xc0ded002, >> 0x80000061, 0x1f254220, 0x00000000, 0xc0ded003, >> 0x80000061, 0x1f354220, 0x00000000, 0xc0ded004, >> 0x800c0061, 0x1e054220, 0x00000000, 0x00000000, >> + 0x80000061, 0x1e554220, 0x00000000, 0x00000000, >> 0x80000061, 0x1e654220, 0x00000000, 0xc0ded000, >> 0x80000061, 0x1e754220, 0x00000000, 0x0000000f, >> 0x80032031, 0x00000000, 0xd00e1e94, 0x04000000, >> @@ -612,14 +614,15 @@ struct iga64_template const iga64_code_clear_r40[] = { >> }; >> >> struct iga64_template const iga64_code_jump_dw_neq[] = { >> - { .gen_ver = 2000, .size = 32, .code = (const uint32_t []) { >> + { .gen_ver = 2000, .size = 36, .code = (const uint32_t []) { >> 0x800c0061, 0x1e054220, 0x00000000, 0x00000000, >> + 0x80000061, 0x1e554220, 0x00000000, 0x00000000, >> 0x80000061, 0x1e654220, 0x00000000, 0xc0ded000, >> 0x80000061, 0x1e754220, 0x00000000, 0x00000003, >> 0x80032031, 0x1f0c0000, 0xd0061e8c, 0x04000000, >> 0x80000061, 0x30014220, 0x00000000, 0x00000000, >> 0x80008070, 0x00018220, 0x22001f04, 0xc0ded001, >> - 0x84000020, 0x00004000, 0x00000000, 0xffffffa0, >> + 0x84000020, 0x00004000, 0x00000000, 0xffffff90, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> { .gen_ver = 1270, .size = 40, .code = (const uint32_t []) { >> diff --git a/lib/iga64_macros.h b/lib/iga64_macros.h >> index 40b6338928e1..f82785610207 100644 >> --- a/lib/iga64_macros.h >> +++ b/lib/iga64_macros.h >> @@ -21,6 +21,13 @@ >> #define R0_TGIDY r0.6<0;1,0>:ud >> #define R0_FFTID r0.5<0;1,0>:ud >> >> +/* Inline data from COMPUTE_WALKER*, Bspec: 47203, 73584 >> + * Filled by __xe*_gpgpu_execfunc. >> + */ >> +#define R1_TGT_ADDRESS r1.0<0;1,0>:uq >> +#define R1_TGT_WIDTH r1.2<0;1,0>:ud >> +#define R1_TGT_HEIGHT r1.3<0;1,0>:ud >> + >> #define SET_SHARED_MEDIA_BLOCK_MSG_HDR(dst, y, width) \ >> (W) mov (8) dst.0<1>:ud 0x0:ud ;\ >> (W) mov (1) dst.1<1>:ud y ;\ >> @@ -35,28 +42,50 @@ >> (W) mov (1) dst.2<1>:ud (width - 1):ud ;\ >> (W) mov (1) dst.4<1>:ud R0_FFTID >> >> +#if GEN_VER < 3000 >> +#define SET_SURFACE_DESC(dst) \ >> +(W) mov (8) dst.0<1>:ud 0x0:ud >> +#else >> +#define SET_SURFACE_DESC(dst) \ >> +(W) mov (1) dst.0<1>:uq R1_TGT_ADDRESS ;\ >> +(W) add (1) dst.2<1>:ud R1_TGT_WIDTH -1:d ;\ >> +(W) add (1) dst.3<1>:ud R1_TGT_HEIGHT -1:d ;\ >> +(W) add (1) dst.4<1>:ud R1_TGT_WIDTH -1:d >> +#endif >> + >> #define SET_SHARED_MEDIA_A2DBLOCK_PAYLOAD(dst, y, width) \ >> -(W) mov (8) dst.0<1>:ud 0x0:ud ;\ >> -(W) mov (1) dst.6<1>:ud y ;\ >> + SET_SURFACE_DESC(dst) ;\ >> +(W) mov (1) dst.5<1>:ud 0x0:ud ;\ >> +(W) mov (1) dst.6<1>:ud y ;\ >> (W) mov (1) dst.7<1>:ud (width - 1):ud >> >> -#define SET_THREAD_MEDIA_A2DBLOCK_PAYLOAD(dst, x, y, width) \ >> -(W) mov (8) dst.0<1>:ud 0x0:ud ;\ >> +#define SET_THREAD_MEDIA_A2DBLOCK_PAYLOAD(dst, x, y, width) \ >> + SET_SURFACE_DESC(dst) ;\ >> (W) shl (1) dst.5<1>:ud R0_TGIDX 0x2:ud ;\ >> (W) add (1) dst.5<1>:ud dst.5<0;1,0>:ud x:ud ;\ >> (W) add (1) dst.6<1>:ud R0_TGIDY y ;\ >> (W) mov (1) dst.7<1>:ud (width - 1):ud ;\ >> >> #if GEN_VER < 2000 >> + >> #define SET_SHARED_SPACE_ADDR(dst, y, width) SET_SHARED_MEDIA_BLOCK_MSG_HDR(dst, y, width) >> #define SET_THREAD_SPACE_ADDR(dst, x, y, width) SET_THREAD_MEDIA_BLOCK_MSG_HDR(dst, x, y, width) >> #define LOAD_SPACE_DW(dst, src) send.dc1 (1) dst src src1_null 0x0 0x2190000 >> #define STORE_SPACE_DW(dst, src) send.dc1 (1) null dst null 0x0 0x40A8000 >> + >> #else >> + >> #define SET_SHARED_SPACE_ADDR(dst, y, width) SET_SHARED_MEDIA_A2DBLOCK_PAYLOAD(dst, y, width) >> #define SET_THREAD_SPACE_ADDR(dst, x, y, width) SET_THREAD_MEDIA_A2DBLOCK_PAYLOAD(dst, x, y, width) >> + >> +#if GEN_VER < 3000 >> #define LOAD_SPACE_DW(dst, src) send.tgm (1) dst src null:0 0x0 0x62100003 >> #define STORE_SPACE_DW(dst, src) send.tgm (1) null dst null:0 0x0 0x64000007 >> +#else >> +#define LOAD_SPACE_DW(dst, src) send.ugm (1) dst src null:0 0x0 0x2120003 >> +#define STORE_SPACE_DW(dst, src) send.ugm (1) null dst src:1 0x0 0x2020007 >> +#endif >> + >> #endif >> >> #endif >> ^ permalink raw reply [flat|nested] 15+ messages in thread
* ✓ Xe.CI.BAT: success for lib/gpgpu_shader: simplify load/store shaders and add Xe3 support 2024-11-21 17:12 [PATCH v3 0/4] lib/gpgpu_shader: simplify load/store shaders and add Xe3 support Andrzej Hajda ` (3 preceding siblings ...) 2024-11-21 17:12 ` [PATCH v3 4/4] lib/gpgpu_shader: add support for Xe3 platforms Andrzej Hajda @ 2024-11-21 22:40 ` Patchwork 2024-11-21 22:46 ` ✓ i915.CI.BAT: " Patchwork ` (2 subsequent siblings) 7 siblings, 0 replies; 15+ messages in thread From: Patchwork @ 2024-11-21 22:40 UTC (permalink / raw) To: Andrzej Hajda; +Cc: igt-dev [-- Attachment #1: Type: text/plain, Size: 1981 bytes --] == Series Details == Series: lib/gpgpu_shader: simplify load/store shaders and add Xe3 support URL : https://patchwork.freedesktop.org/series/141668/ State : success == Summary == CI Bug Log - changes from XEIGT_8121_BAT -> XEIGTPW_12165_BAT ==================================================== Summary ------- **SUCCESS** No regressions found. Participating hosts (9 -> 9) ------------------------------ No changes in participating hosts Known issues ------------ Here are the changes found in XEIGTPW_12165_BAT that come from known issues: ### IGT changes ### #### Issues hit #### * igt@kms_addfb_basic@bad-pitch-0: - bat-adlp-7: [PASS][1] -> [DMESG-WARN][2] ([Intel XE#3429]) +31 other tests dmesg-warn [1]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/bat-adlp-7/igt@kms_addfb_basic@bad-pitch-0.html [2]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/bat-adlp-7/igt@kms_addfb_basic@bad-pitch-0.html #### Possible fixes #### * igt@kms_frontbuffer_tracking@basic: - bat-adlp-7: [FAIL][3] ([Intel XE#1861]) -> [PASS][4] [3]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/bat-adlp-7/igt@kms_frontbuffer_tracking@basic.html [4]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/bat-adlp-7/igt@kms_frontbuffer_tracking@basic.html [Intel XE#1861]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1861 [Intel XE#3429]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3429 Build changes ------------- * IGT: IGT_8121 -> IGTPW_12165 * Linux: xe-2257-e46649e7764a9f6868ccbcba7b8b23b413303380 -> xe-2259-bb17c42521f57b592e9ad49daca1f9f9045d3199 IGTPW_12165: 12165 IGT_8121: 8121 xe-2257-e46649e7764a9f6868ccbcba7b8b23b413303380: e46649e7764a9f6868ccbcba7b8b23b413303380 xe-2259-bb17c42521f57b592e9ad49daca1f9f9045d3199: bb17c42521f57b592e9ad49daca1f9f9045d3199 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/index.html [-- Attachment #2: Type: text/html, Size: 2579 bytes --] ^ permalink raw reply [flat|nested] 15+ messages in thread
* ✓ i915.CI.BAT: success for lib/gpgpu_shader: simplify load/store shaders and add Xe3 support 2024-11-21 17:12 [PATCH v3 0/4] lib/gpgpu_shader: simplify load/store shaders and add Xe3 support Andrzej Hajda ` (4 preceding siblings ...) 2024-11-21 22:40 ` ✓ Xe.CI.BAT: success for lib/gpgpu_shader: simplify load/store shaders and add Xe3 support Patchwork @ 2024-11-21 22:46 ` Patchwork 2024-11-22 12:34 ` ✗ Xe.CI.Full: failure " Patchwork 2024-11-24 13:14 ` ✗ i915.CI.Full: " Patchwork 7 siblings, 0 replies; 15+ messages in thread From: Patchwork @ 2024-11-21 22:46 UTC (permalink / raw) To: Andrzej Hajda; +Cc: igt-dev == Series Details == Series: lib/gpgpu_shader: simplify load/store shaders and add Xe3 support URL : https://patchwork.freedesktop.org/series/141668/ State : success == Summary == CI Bug Log - changes from IGT_8121 -> IGTPW_12165 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/index.html Participating hosts (45 -> 44) ------------------------------ Missing (1): fi-snb-2520m Known issues ------------ Here are the changes found in IGTPW_12165 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@dmabuf@all-tests: - bat-apl-1: [PASS][1] -> [INCOMPLETE][2] ([i915#12904]) +1 other test incomplete [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8121/bat-apl-1/igt@dmabuf@all-tests.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/bat-apl-1/igt@dmabuf@all-tests.html * igt@i915_pm_rpm@module-reload: - bat-adls-6: [PASS][3] -> [FAIL][4] ([i915#12903]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8121/bat-adls-6/igt@i915_pm_rpm@module-reload.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/bat-adls-6/igt@i915_pm_rpm@module-reload.html - bat-dg1-7: [PASS][5] -> [FAIL][6] ([i915#12903]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8121/bat-dg1-7/igt@i915_pm_rpm@module-reload.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/bat-dg1-7/igt@i915_pm_rpm@module-reload.html - bat-rpls-4: [PASS][7] -> [FAIL][8] ([i915#12903]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8121/bat-rpls-4/igt@i915_pm_rpm@module-reload.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/bat-rpls-4/igt@i915_pm_rpm@module-reload.html * igt@i915_selftest@live@gt_mocs: - bat-twl-2: [PASS][9] -> [ABORT][10] ([i915#12919]) +1 other test abort [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8121/bat-twl-2/igt@i915_selftest@live@gt_mocs.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/bat-twl-2/igt@i915_selftest@live@gt_mocs.html #### Possible fixes #### * igt@i915_module_load@load: - {bat-mtlp-9}: [INCOMPLETE][11] -> [PASS][12] [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8121/bat-mtlp-9/igt@i915_module_load@load.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/bat-mtlp-9/igt@i915_module_load@load.html * igt@i915_pm_rpm@module-reload: - bat-dg2-11: [FAIL][13] ([i915#12903]) -> [PASS][14] [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8121/bat-dg2-11/igt@i915_pm_rpm@module-reload.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/bat-dg2-11/igt@i915_pm_rpm@module-reload.html * igt@kms_chamelium_edid@hdmi-edid-read: - bat-dg2-13: [DMESG-WARN][15] ([i915#12253]) -> [PASS][16] [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8121/bat-dg2-13/igt@kms_chamelium_edid@hdmi-edid-read.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/bat-dg2-13/igt@kms_chamelium_edid@hdmi-edid-read.html * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-b-dp-1: - bat-apl-1: [DMESG-WARN][17] -> [PASS][18] +1 other test pass [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8121/bat-apl-1/igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-b-dp-1.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/bat-apl-1/igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-b-dp-1.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [i915#10216]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10216 [i915#11681]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11681 [i915#12253]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12253 [i915#12903]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12903 [i915#12904]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12904 [i915#12919]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12919 [i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555 [i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708 [i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840 [i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077 [i915#4079]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4079 [i915#4083]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4083 [i915#4212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4212 [i915#4213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4213 [i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613 [i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190 [i915#5274]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5274 [i915#6621]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6621 [i915#8809]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8809 [i915#9159]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9159 [i915#9318]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9318 [i915#9688]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9688 Build changes ------------- * CI: CI-20190529 -> None * IGT: IGT_8121 -> IGTPW_12165 * Linux: CI_DRM_15725 -> CI_DRM_15727 CI-20190529: 20190529 CI_DRM_15725: e46649e7764a9f6868ccbcba7b8b23b413303380 @ git://anongit.freedesktop.org/gfx-ci/linux CI_DRM_15727: bb17c42521f57b592e9ad49daca1f9f9045d3199 @ git://anongit.freedesktop.org/gfx-ci/linux IGTPW_12165: 12165 IGT_8121: 8121 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/index.html ^ permalink raw reply [flat|nested] 15+ messages in thread
* ✗ Xe.CI.Full: failure for lib/gpgpu_shader: simplify load/store shaders and add Xe3 support 2024-11-21 17:12 [PATCH v3 0/4] lib/gpgpu_shader: simplify load/store shaders and add Xe3 support Andrzej Hajda ` (5 preceding siblings ...) 2024-11-21 22:46 ` ✓ i915.CI.BAT: " Patchwork @ 2024-11-22 12:34 ` Patchwork 2024-11-24 13:14 ` ✗ i915.CI.Full: " Patchwork 7 siblings, 0 replies; 15+ messages in thread From: Patchwork @ 2024-11-22 12:34 UTC (permalink / raw) To: Hajda, Andrzej; +Cc: igt-dev [-- Attachment #1: Type: text/plain, Size: 130448 bytes --] == Series Details == Series: lib/gpgpu_shader: simplify load/store shaders and add Xe3 support URL : https://patchwork.freedesktop.org/series/141668/ State : failure == Summary == CI Bug Log - changes from XEIGT_8121_full -> XEIGTPW_12165_full ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with XEIGTPW_12165_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in XEIGTPW_12165_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. Participating hosts (4 -> 4) ------------------------------ No changes in participating hosts Possible new issues ------------------- Here are the unknown changes that may have been introduced in XEIGTPW_12165_full: ### IGT changes ### #### Possible regressions #### * igt@core_hotunplug@hotreplug: - shard-bmg: [PASS][1] -> [INCOMPLETE][2] +2 other tests incomplete [1]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-1/igt@core_hotunplug@hotreplug.html [2]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-1/igt@core_hotunplug@hotreplug.html * igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset@ab-dp2-hdmi-a3: - shard-bmg: NOTRUN -> [INCOMPLETE][3] [3]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-1/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset@ab-dp2-hdmi-a3.html * igt@kms_flip@2x-plain-flip-ts-check-interruptible@ab-dp2-hdmi-a3: - shard-bmg: [PASS][4] -> [FAIL][5] [4]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-2/igt@kms_flip@2x-plain-flip-ts-check-interruptible@ab-dp2-hdmi-a3.html [5]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-4/igt@kms_flip@2x-plain-flip-ts-check-interruptible@ab-dp2-hdmi-a3.html * igt@kms_psr@psr2-primary-page-flip@edp-1: - shard-lnl: [PASS][6] -> [FAIL][7] +1 other test fail [6]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-lnl-2/igt@kms_psr@psr2-primary-page-flip@edp-1.html [7]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-lnl-1/igt@kms_psr@psr2-primary-page-flip@edp-1.html * igt@xe_ccs@suspend-resume@tile64-compressed-compfmt0-system-vram01: - shard-dg2-set2: [PASS][8] -> [INCOMPLETE][9] +2 other tests incomplete [8]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-436/igt@xe_ccs@suspend-resume@tile64-compressed-compfmt0-system-vram01.html [9]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-433/igt@xe_ccs@suspend-resume@tile64-compressed-compfmt0-system-vram01.html * igt@xe_exec_fault_mode@twice-bindexecqueue: - shard-bmg: [PASS][10] -> [DMESG-WARN][11] +1 other test dmesg-warn [10]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-2/igt@xe_exec_fault_mode@twice-bindexecqueue.html [11]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-2/igt@xe_exec_fault_mode@twice-bindexecqueue.html #### Warnings #### * igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset: - shard-bmg: [SKIP][12] ([Intel XE#2316]) -> [INCOMPLETE][13] [12]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-6/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset.html [13]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-1/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset.html * igt@xe_vm@large-split-misaligned-binds-33554432: - shard-bmg: [DMESG-WARN][14] ([Intel XE#3468]) -> [DMESG-WARN][15] [14]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-1/igt@xe_vm@large-split-misaligned-binds-33554432.html [15]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-2/igt@xe_vm@large-split-misaligned-binds-33554432.html * igt@xe_wedged@wedged-at-any-timeout: - shard-bmg: [ABORT][16] ([Intel XE#3421]) -> [ABORT][17] [16]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-6/igt@xe_wedged@wedged-at-any-timeout.html [17]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-6/igt@xe_wedged@wedged-at-any-timeout.html Known issues ------------ Here are the changes found in XEIGTPW_12165_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@core_getversion@all-cards: - shard-dg2-set2: [PASS][18] -> [FAIL][19] ([Intel XE#3440]) +1 other test fail [18]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-463/igt@core_getversion@all-cards.html [19]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@core_getversion@all-cards.html * igt@core_hotunplug@hotreplug-lateclose: - shard-dg2-set2: [PASS][20] -> [SKIP][21] ([Intel XE#1885]) +1 other test skip [20]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-435/igt@core_hotunplug@hotreplug-lateclose.html [21]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@core_hotunplug@hotreplug-lateclose.html * igt@core_setmaster@master-drop-set-root: - shard-dg2-set2: [PASS][22] -> [FAIL][23] ([Intel XE#3249]) [22]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-435/igt@core_setmaster@master-drop-set-root.html [23]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-466/igt@core_setmaster@master-drop-set-root.html * igt@core_setmaster@master-drop-set-shared-fd: - shard-dg2-set2: [PASS][24] -> [SKIP][25] ([Intel XE#3453]) [24]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-463/igt@core_setmaster@master-drop-set-shared-fd.html [25]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-466/igt@core_setmaster@master-drop-set-shared-fd.html * igt@core_setmaster@master-drop-set-user: - shard-dg2-set2: [PASS][26] -> [FAIL][27] ([Intel XE#3339]) [26]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-436/igt@core_setmaster@master-drop-set-user.html [27]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@core_setmaster@master-drop-set-user.html * igt@fbdev@eof: - shard-dg2-set2: [PASS][28] -> [SKIP][29] ([Intel XE#2134]) [28]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-463/igt@fbdev@eof.html [29]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-466/igt@fbdev@eof.html * igt@fbdev@info: - shard-dg2-set2: NOTRUN -> [SKIP][30] ([Intel XE#2134]) [30]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-466/igt@fbdev@info.html * igt@kms_addfb_basic@unused-offsets: - shard-bmg: [PASS][31] -> [DMESG-WARN][32] ([Intel XE#1727]) +7 other tests dmesg-warn [31]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-1/igt@kms_addfb_basic@unused-offsets.html [32]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-2/igt@kms_addfb_basic@unused-offsets.html * igt@kms_async_flips@async-flip-suspend-resume@pipe-a-hdmi-a-6: - shard-dg2-set2: NOTRUN -> [DMESG-WARN][33] ([Intel XE#3468]) [33]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-463/igt@kms_async_flips@async-flip-suspend-resume@pipe-a-hdmi-a-6.html * igt@kms_atomic_transition@modeset-transition-nonblocking-fencing: - shard-dg2-set2: [PASS][34] -> [SKIP][35] ([Intel XE#2423] / [i915#2575]) +131 other tests skip [34]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-463/igt@kms_atomic_transition@modeset-transition-nonblocking-fencing.html [35]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@kms_atomic_transition@modeset-transition-nonblocking-fencing.html * igt@kms_big_fb@4-tiled-addfb-size-overflow: - shard-dg2-set2: [PASS][36] -> [SKIP][37] ([Intel XE#2136]) +45 other tests skip [36]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-463/igt@kms_big_fb@4-tiled-addfb-size-overflow.html [37]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@kms_big_fb@4-tiled-addfb-size-overflow.html * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip: - shard-lnl: NOTRUN -> [FAIL][38] ([Intel XE#3162]) [38]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-lnl-8/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html * igt@kms_big_fb@linear-32bpp-rotate-270: - shard-lnl: NOTRUN -> [SKIP][39] ([Intel XE#1407]) [39]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-lnl-4/igt@kms_big_fb@linear-32bpp-rotate-270.html * igt@kms_big_fb@yf-tiled-32bpp-rotate-0: - shard-bmg: NOTRUN -> [SKIP][40] ([Intel XE#1124]) +1 other test skip [40]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-2/igt@kms_big_fb@yf-tiled-32bpp-rotate-0.html * igt@kms_big_fb@yf-tiled-64bpp-rotate-180: - shard-dg2-set2: NOTRUN -> [SKIP][41] ([Intel XE#2136] / [Intel XE#2351]) +6 other tests skip [41]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-466/igt@kms_big_fb@yf-tiled-64bpp-rotate-180.html * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip: - shard-lnl: NOTRUN -> [SKIP][42] ([Intel XE#1124]) +2 other tests skip [42]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-lnl-8/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip.html * igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p: - shard-bmg: [PASS][43] -> [SKIP][44] ([Intel XE#2314] / [Intel XE#2894]) +1 other test skip [43]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-2/igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p.html [44]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-6/igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p.html * igt@kms_ccs@bad-aux-stride-y-tiled-gen12-rc-ccs-cc@pipe-d-dp-4: - shard-dg2-set2: NOTRUN -> [SKIP][45] ([Intel XE#455] / [Intel XE#787]) +12 other tests skip [45]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-433/igt@kms_ccs@bad-aux-stride-y-tiled-gen12-rc-ccs-cc@pipe-d-dp-4.html * igt@kms_ccs@bad-pixel-format-4-tiled-mtl-rc-ccs-cc@pipe-a-hdmi-a-6: - shard-dg2-set2: NOTRUN -> [SKIP][46] ([Intel XE#787]) +90 other tests skip [46]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-435/igt@kms_ccs@bad-pixel-format-4-tiled-mtl-rc-ccs-cc@pipe-a-hdmi-a-6.html * igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-mc-ccs: - shard-bmg: NOTRUN -> [SKIP][47] ([Intel XE#2887]) [47]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-4/igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-mc-ccs.html * igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-mc-ccs: - shard-lnl: NOTRUN -> [SKIP][48] ([Intel XE#2887]) [48]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-lnl-1/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-mc-ccs.html * igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs@pipe-b-dp-2: - shard-bmg: NOTRUN -> [SKIP][49] ([Intel XE#2652] / [Intel XE#787]) +8 other tests skip [49]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-1/igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs@pipe-b-dp-2.html * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc@pipe-b-hdmi-a-6: - shard-dg2-set2: [PASS][50] -> [INCOMPLETE][51] ([Intel XE#1727] / [Intel XE#3468]) +2 other tests incomplete [50]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-463/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc@pipe-b-hdmi-a-6.html [51]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-435/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc@pipe-b-hdmi-a-6.html * igt@kms_cdclk@plane-scaling@pipe-b-dp-4: - shard-dg2-set2: NOTRUN -> [SKIP][52] ([Intel XE#1152]) +3 other tests skip [52]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-433/igt@kms_cdclk@plane-scaling@pipe-b-dp-4.html * igt@kms_chamelium_edid@dp-edid-resolution-list: - shard-lnl: NOTRUN -> [SKIP][53] ([Intel XE#373]) +2 other tests skip [53]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-lnl-4/igt@kms_chamelium_edid@dp-edid-resolution-list.html * igt@kms_chamelium_hpd@dp-hpd-after-hibernate: - shard-bmg: NOTRUN -> [SKIP][54] ([Intel XE#2252]) +2 other tests skip [54]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-1/igt@kms_chamelium_hpd@dp-hpd-after-hibernate.html * igt@kms_chamelium_hpd@hdmi-hpd-for-each-pipe: - shard-dg2-set2: NOTRUN -> [SKIP][55] ([Intel XE#373]) [55]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-463/igt@kms_chamelium_hpd@hdmi-hpd-for-each-pipe.html * igt@kms_content_protection@dp-mst-lic-type-0: - shard-bmg: NOTRUN -> [SKIP][56] ([Intel XE#2390]) [56]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-6/igt@kms_content_protection@dp-mst-lic-type-0.html * igt@kms_content_protection@dp-mst-type-1: - shard-lnl: NOTRUN -> [SKIP][57] ([Intel XE#307]) [57]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-lnl-2/igt@kms_content_protection@dp-mst-type-1.html * igt@kms_content_protection@legacy@pipe-a-dp-4: - shard-dg2-set2: NOTRUN -> [FAIL][58] ([Intel XE#1178]) [58]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-436/igt@kms_content_protection@legacy@pipe-a-dp-4.html * igt@kms_content_protection@srm@pipe-a-dp-2: - shard-bmg: NOTRUN -> [INCOMPLETE][59] ([Intel XE#2715] / [Intel XE#3468]) +1 other test incomplete [59]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-2/igt@kms_content_protection@srm@pipe-a-dp-2.html * igt@kms_content_protection@uevent@pipe-a-dp-2: - shard-bmg: NOTRUN -> [FAIL][60] ([Intel XE#1188]) [60]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-2/igt@kms_content_protection@uevent@pipe-a-dp-2.html * igt@kms_content_protection@uevent@pipe-a-dp-4: - shard-dg2-set2: NOTRUN -> [FAIL][61] ([Intel XE#1188]) [61]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-433/igt@kms_content_protection@uevent@pipe-a-dp-4.html * igt@kms_cursor_crc@cursor-offscreen-512x170: - shard-lnl: NOTRUN -> [SKIP][62] ([Intel XE#2321]) [62]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-lnl-3/igt@kms_cursor_crc@cursor-offscreen-512x170.html - shard-bmg: NOTRUN -> [SKIP][63] ([Intel XE#2321]) [63]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-1/igt@kms_cursor_crc@cursor-offscreen-512x170.html * igt@kms_cursor_crc@cursor-random-64x21: - shard-bmg: NOTRUN -> [SKIP][64] ([Intel XE#2320]) +3 other tests skip [64]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-1/igt@kms_cursor_crc@cursor-random-64x21.html - shard-lnl: NOTRUN -> [SKIP][65] ([Intel XE#1424]) [65]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-lnl-6/igt@kms_cursor_crc@cursor-random-64x21.html * igt@kms_cursor_crc@cursor-suspend: - shard-dg2-set2: [PASS][66] -> [INCOMPLETE][67] ([Intel XE#3468]) +1 other test incomplete [66]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-433/igt@kms_cursor_crc@cursor-suspend.html [67]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-435/igt@kms_cursor_crc@cursor-suspend.html * igt@kms_cursor_edge_walk@64x64-right-edge@pipe-a-edp-1: - shard-lnl: [PASS][68] -> [FAIL][69] ([Intel XE#2577]) +1 other test fail [68]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-lnl-8/igt@kms_cursor_edge_walk@64x64-right-edge@pipe-a-edp-1.html [69]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-lnl-1/igt@kms_cursor_edge_walk@64x64-right-edge@pipe-a-edp-1.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic: - shard-dg2-set2: NOTRUN -> [SKIP][70] ([Intel XE#2423] / [i915#2575]) +16 other tests skip [70]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html * igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size: - shard-bmg: [PASS][71] -> [DMESG-WARN][72] ([Intel XE#3468] / [Intel XE#877]) [71]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-2/igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size.html [72]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-4/igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size.html * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size: - shard-bmg: [PASS][73] -> [SKIP][74] ([Intel XE#2291]) [73]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-1/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html [74]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html * igt@kms_cursor_legacy@cursorb-vs-flipb-toggle: - shard-lnl: NOTRUN -> [SKIP][75] ([Intel XE#309]) +1 other test skip [75]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-lnl-3/igt@kms_cursor_legacy@cursorb-vs-flipb-toggle.html * igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-3: - shard-bmg: NOTRUN -> [SKIP][76] ([Intel XE#1340]) [76]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-1/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-3.html * igt@kms_dsc@dsc-with-bpc: - shard-lnl: NOTRUN -> [SKIP][77] ([Intel XE#2244]) [77]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-lnl-8/igt@kms_dsc@dsc-with-bpc.html * igt@kms_dsc@dsc-with-output-formats-with-bpc: - shard-dg2-set2: NOTRUN -> [SKIP][78] ([Intel XE#455]) +3 other tests skip [78]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-435/igt@kms_dsc@dsc-with-output-formats-with-bpc.html * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-hdmi-a6-dp4: - shard-dg2-set2: NOTRUN -> [FAIL][79] ([Intel XE#3486]) [79]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-433/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-hdmi-a6-dp4.html * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ad-dp2-hdmi-a3: - shard-bmg: [PASS][80] -> [FAIL][81] ([Intel XE#3321] / [Intel XE#3486]) [80]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-1/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ad-dp2-hdmi-a3.html [81]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-2/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ad-dp2-hdmi-a3.html * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bd-hdmi-a6-dp4: - shard-dg2-set2: NOTRUN -> [FAIL][82] ([Intel XE#3321] / [Intel XE#3486]) [82]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-433/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bd-hdmi-a6-dp4.html * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@cd-hdmi-a6-dp4: - shard-dg2-set2: NOTRUN -> [FAIL][83] ([Intel XE#301]) +3 other tests fail [83]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-433/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@cd-hdmi-a6-dp4.html * igt@kms_flip@2x-flip-vs-expired-vblank@ab-dp2-hdmi-a3: - shard-bmg: [PASS][84] -> [FAIL][85] ([Intel XE#2882]) +5 other tests fail [84]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-1/igt@kms_flip@2x-flip-vs-expired-vblank@ab-dp2-hdmi-a3.html [85]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-1/igt@kms_flip@2x-flip-vs-expired-vblank@ab-dp2-hdmi-a3.html * igt@kms_flip@2x-plain-flip-fb-recreate: - shard-bmg: [PASS][86] -> [SKIP][87] ([Intel XE#2316]) +9 other tests skip [86]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-4/igt@kms_flip@2x-plain-flip-fb-recreate.html [87]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-6/igt@kms_flip@2x-plain-flip-fb-recreate.html * igt@kms_flip@flip-vs-absolute-wf_vblank: - shard-lnl: [PASS][88] -> [FAIL][89] ([Intel XE#886]) +4 other tests fail [88]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-lnl-1/igt@kms_flip@flip-vs-absolute-wf_vblank.html [89]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-lnl-1/igt@kms_flip@flip-vs-absolute-wf_vblank.html * igt@kms_flip@flip-vs-expired-vblank-interruptible@d-dp2: - shard-bmg: NOTRUN -> [FAIL][90] ([Intel XE#3486]) [90]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-4/igt@kms_flip@flip-vs-expired-vblank-interruptible@d-dp2.html * igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-upscaling@pipe-a-valid-mode: - shard-bmg: [PASS][91] -> [DMESG-FAIL][92] ([Intel XE#3468]) +24 other tests dmesg-fail [91]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-1/igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-upscaling@pipe-a-valid-mode.html [92]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-1/igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-upscaling@pipe-a-valid-mode.html * igt@kms_frontbuffer_tracking@drrs-modesetfrombusy: - shard-lnl: NOTRUN -> [SKIP][93] ([Intel XE#651]) +1 other test skip [93]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-lnl-4/igt@kms_frontbuffer_tracking@drrs-modesetfrombusy.html * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-move: - shard-dg2-set2: [PASS][94] -> [SKIP][95] ([Intel XE#2136] / [Intel XE#2351]) +11 other tests skip [94]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-436/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-move.html [95]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-466/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-move.html * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-msflip-blt: - shard-bmg: NOTRUN -> [SKIP][96] ([Intel XE#2312]) +1 other test skip [96]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-msflip-blt.html * igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-cur-indfb-draw-render: - shard-lnl: NOTRUN -> [SKIP][97] ([Intel XE#656]) +2 other tests skip [97]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-lnl-3/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-cur-indfb-draw-render.html * igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-indfb-msflip-blt: - shard-bmg: NOTRUN -> [SKIP][98] ([Intel XE#2311]) +5 other tests skip [98]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-indfb-msflip-blt.html * igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-pri-indfb-draw-mmap-wc: - shard-dg2-set2: NOTRUN -> [SKIP][99] ([Intel XE#651]) +3 other tests skip [99]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-435/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-pri-indfb-draw-mmap-wc.html * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render: - shard-dg2-set2: NOTRUN -> [SKIP][100] ([Intel XE#653]) +2 other tests skip [100]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-435/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render.html * igt@kms_frontbuffer_tracking@pipe-fbc-rte@pipe-b-hdmi-a-3: - shard-bmg: NOTRUN -> [FAIL][101] ([Intel XE#2333]) +2 other tests fail [101]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-6/igt@kms_frontbuffer_tracking@pipe-fbc-rte@pipe-b-hdmi-a-3.html * igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-blt: - shard-bmg: NOTRUN -> [SKIP][102] ([Intel XE#2313]) [102]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-1/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-blt.html * igt@kms_panel_fitting@legacy: - shard-bmg: NOTRUN -> [SKIP][103] ([Intel XE#2486]) [103]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-4/igt@kms_panel_fitting@legacy.html * igt@kms_plane_cursor@overlay: - shard-lnl: [PASS][104] -> [FAIL][105] ([Intel XE#1471]) +2 other tests fail [104]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-lnl-4/igt@kms_plane_cursor@overlay.html [105]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-lnl-3/igt@kms_plane_cursor@overlay.html * igt@kms_plane_cursor@overlay@pipe-c-hdmi-a-3-size-64: - shard-bmg: NOTRUN -> [DMESG-WARN][106] ([Intel XE#3468]) +12 other tests dmesg-warn [106]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-6/igt@kms_plane_cursor@overlay@pipe-c-hdmi-a-3-size-64.html * igt@kms_plane_cursor@viewport@pipe-b-edp-1-size-64: - shard-lnl: [PASS][107] -> [FAIL][108] ([Intel XE#1874]) [107]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-lnl-2/igt@kms_plane_cursor@viewport@pipe-b-edp-1-size-64.html [108]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-lnl-8/igt@kms_plane_cursor@viewport@pipe-b-edp-1-size-64.html * igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format: - shard-dg2-set2: NOTRUN -> [SKIP][109] ([Intel XE#2763] / [Intel XE#455]) +1 other test skip [109]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-435/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format.html * igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format@pipe-b: - shard-dg2-set2: NOTRUN -> [SKIP][110] ([Intel XE#2763]) +2 other tests skip [110]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-435/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format@pipe-b.html * igt@kms_plane_scaling@plane-downscale-factor-0-75-with-modifiers@pipe-a: - shard-dg2-set2: NOTRUN -> [DMESG-WARN][111] ([Intel XE#1727]) [111]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-433/igt@kms_plane_scaling@plane-downscale-factor-0-75-with-modifiers@pipe-a.html * igt@kms_plane_scaling@planes-upscale-factor-0-25: - shard-bmg: [PASS][112] -> [DMESG-WARN][113] ([Intel XE#2566] / [Intel XE#3468]) [112]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-2/igt@kms_plane_scaling@planes-upscale-factor-0-25.html [113]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-6/igt@kms_plane_scaling@planes-upscale-factor-0-25.html * igt@kms_pm_dc@dc5-psr: - shard-bmg: NOTRUN -> [SKIP][114] ([Intel XE#2392]) [114]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-6/igt@kms_pm_dc@dc5-psr.html * igt@kms_pm_rpm@universal-planes: - shard-dg2-set2: [PASS][115] -> [SKIP][116] ([Intel XE#2446]) +4 other tests skip [115]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-463/igt@kms_pm_rpm@universal-planes.html [116]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@kms_pm_rpm@universal-planes.html * igt@kms_pm_rpm@universal-planes-dpms: - shard-dg2-set2: [PASS][117] -> [DMESG-WARN][118] ([Intel XE#1727] / [Intel XE#2042] / [Intel XE#3468]) [117]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-436/igt@kms_pm_rpm@universal-planes-dpms.html [118]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-436/igt@kms_pm_rpm@universal-planes-dpms.html * igt@kms_pm_rpm@universal-planes-dpms@plane-32: - shard-dg2-set2: [PASS][119] -> [DMESG-WARN][120] ([Intel XE#1727] / [Intel XE#3468]) [119]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-436/igt@kms_pm_rpm@universal-planes-dpms@plane-32.html [120]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-436/igt@kms_pm_rpm@universal-planes-dpms@plane-32.html * igt@kms_pm_rpm@universal-planes-dpms@plane-41: - shard-dg2-set2: [PASS][121] -> [DMESG-WARN][122] ([Intel XE#3468]) +9 other tests dmesg-warn [121]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-436/igt@kms_pm_rpm@universal-planes-dpms@plane-41.html [122]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-436/igt@kms_pm_rpm@universal-planes-dpms@plane-41.html * igt@kms_psr2_sf@pr-overlay-plane-move-continuous-sf: - shard-lnl: NOTRUN -> [SKIP][123] ([Intel XE#2893]) +1 other test skip [123]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-lnl-5/igt@kms_psr2_sf@pr-overlay-plane-move-continuous-sf.html * igt@kms_psr2_sf@psr2-cursor-plane-update-sf: - shard-bmg: NOTRUN -> [SKIP][124] ([Intel XE#1489]) +2 other tests skip [124]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-4/igt@kms_psr2_sf@psr2-cursor-plane-update-sf.html * igt@kms_psr@fbc-psr-suspend: - shard-bmg: NOTRUN -> [SKIP][125] ([Intel XE#2234] / [Intel XE#2850]) +1 other test skip [125]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-4/igt@kms_psr@fbc-psr-suspend.html * igt@kms_psr@fbc-psr2-sprite-plane-onoff: - shard-dg2-set2: NOTRUN -> [SKIP][126] ([Intel XE#2136]) +12 other tests skip [126]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@kms_psr@fbc-psr2-sprite-plane-onoff.html * igt@kms_psr@psr2-cursor-render: - shard-dg2-set2: NOTRUN -> [SKIP][127] ([Intel XE#2850] / [Intel XE#929]) +3 other tests skip [127]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-436/igt@kms_psr@psr2-cursor-render.html * igt@kms_rotation_crc@primary-y-tiled-reflect-x-90: - shard-lnl: NOTRUN -> [SKIP][128] ([Intel XE#3414]) +1 other test skip [128]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-lnl-3/igt@kms_rotation_crc@primary-y-tiled-reflect-x-90.html * igt@kms_rotation_crc@sprite-rotation-90-pos-100-0: - shard-bmg: NOTRUN -> [SKIP][129] ([Intel XE#3414]) +1 other test skip [129]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-1/igt@kms_rotation_crc@sprite-rotation-90-pos-100-0.html * igt@kms_scaling_modes@scaling-mode-none: - shard-lnl: NOTRUN -> [SKIP][130] ([Intel XE#2413] / [Intel XE#374]) [130]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-lnl-7/igt@kms_scaling_modes@scaling-mode-none.html * igt@kms_scaling_modes@scaling-mode-none@pipe-a-edp-1: - shard-lnl: NOTRUN -> [SKIP][131] ([Intel XE#374]) +2 other tests skip [131]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-lnl-7/igt@kms_scaling_modes@scaling-mode-none@pipe-a-edp-1.html * igt@kms_setmode@clone-exclusive-crtc: - shard-bmg: [PASS][132] -> [SKIP][133] ([Intel XE#1435]) [132]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-1/igt@kms_setmode@clone-exclusive-crtc.html [133]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-6/igt@kms_setmode@clone-exclusive-crtc.html * igt@kms_universal_plane@cursor-fb-leak@pipe-a-edp-1: - shard-lnl: [PASS][134] -> [FAIL][135] ([Intel XE#899]) [134]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-lnl-3/igt@kms_universal_plane@cursor-fb-leak@pipe-a-edp-1.html [135]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-lnl-8/igt@kms_universal_plane@cursor-fb-leak@pipe-a-edp-1.html * igt@kms_vblank@query-busy-hang: - shard-dg2-set2: [PASS][136] -> [INCOMPLETE][137] ([Intel XE#1727]) +1 other test incomplete [136]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-433/igt@kms_vblank@query-busy-hang.html [137]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-435/igt@kms_vblank@query-busy-hang.html * igt@kms_vblank@ts-continuation-suspend: - shard-bmg: [PASS][138] -> [DMESG-WARN][139] ([Intel XE#1727] / [Intel XE#3468]) +13 other tests dmesg-warn [138]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-6/igt@kms_vblank@ts-continuation-suspend.html [139]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-4/igt@kms_vblank@ts-continuation-suspend.html * igt@kms_vblank@ts-continuation-suspend@pipe-a-hdmi-a-6: - shard-dg2-set2: NOTRUN -> [INCOMPLETE][140] ([Intel XE#1727]) [140]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-463/igt@kms_vblank@ts-continuation-suspend@pipe-a-hdmi-a-6.html * igt@kms_vblank@ts-continuation-suspend@pipe-d-dp-2: - shard-bmg: NOTRUN -> [DMESG-WARN][141] ([Intel XE#1727] / [Intel XE#3468]) [141]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-4/igt@kms_vblank@ts-continuation-suspend@pipe-d-dp-2.html * igt@kms_vblank@wait-idle-hang@pipe-a-dp-2: - shard-bmg: NOTRUN -> [DMESG-FAIL][142] ([Intel XE#3468]) +5 other tests dmesg-fail [142]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-4/igt@kms_vblank@wait-idle-hang@pipe-a-dp-2.html * igt@testdisplay: - shard-dg2-set2: [PASS][143] -> [SKIP][144] ([Intel XE#2423]) +1 other test skip [143]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-463/igt@testdisplay.html [144]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-466/igt@testdisplay.html * igt@xe_ccs@suspend-resume@tile64-compressed-compfmt0-system-system: - shard-lnl: [PASS][145] -> [DMESG-WARN][146] ([Intel XE#2932]) +3 other tests dmesg-warn [145]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-lnl-3/igt@xe_ccs@suspend-resume@tile64-compressed-compfmt0-system-system.html [146]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-lnl-1/igt@xe_ccs@suspend-resume@tile64-compressed-compfmt0-system-system.html * igt@xe_ccs@suspend-resume@xmajor-compressed-compfmt0-system-vram01: - shard-dg2-set2: [PASS][147] -> [DMESG-FAIL][148] ([Intel XE#1727] / [Intel XE#3468]) +4 other tests dmesg-fail [147]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-436/igt@xe_ccs@suspend-resume@xmajor-compressed-compfmt0-system-vram01.html [148]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-433/igt@xe_ccs@suspend-resume@xmajor-compressed-compfmt0-system-vram01.html * igt@xe_compute_preempt@compute-preempt-many@engine-drm_xe_engine_class_compute: - shard-dg2-set2: NOTRUN -> [SKIP][149] ([Intel XE#1280] / [Intel XE#455]) [149]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-433/igt@xe_compute_preempt@compute-preempt-many@engine-drm_xe_engine_class_compute.html * igt@xe_drm_fdinfo@utilization-single-full-load-isolation: - shard-bmg: [PASS][150] -> [DMESG-WARN][151] ([Intel XE#3468]) +102 other tests dmesg-warn [150]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-4/igt@xe_drm_fdinfo@utilization-single-full-load-isolation.html [151]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-4/igt@xe_drm_fdinfo@utilization-single-full-load-isolation.html * igt@xe_eudebug@basic-read-event: - shard-bmg: NOTRUN -> [SKIP][152] ([Intel XE#2905]) +3 other tests skip [152]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-6/igt@xe_eudebug@basic-read-event.html * igt@xe_eudebug@exec-queue-placements: - shard-dg2-set2: NOTRUN -> [SKIP][153] ([Intel XE#2905]) +1 other test skip [153]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-433/igt@xe_eudebug@exec-queue-placements.html * igt@xe_eudebug@multigpu-basic-client-many: - shard-lnl: NOTRUN -> [SKIP][154] ([Intel XE#2905]) +2 other tests skip [154]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-lnl-1/igt@xe_eudebug@multigpu-basic-client-many.html * igt@xe_evict@evict-beng-mixed-many-threads-small: - shard-bmg: [PASS][155] -> [TIMEOUT][156] ([Intel XE#1473]) [155]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-1/igt@xe_evict@evict-beng-mixed-many-threads-small.html [156]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-6/igt@xe_evict@evict-beng-mixed-many-threads-small.html * igt@xe_evict@evict-small-cm: - shard-lnl: NOTRUN -> [SKIP][157] ([Intel XE#688]) +1 other test skip [157]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-lnl-2/igt@xe_evict@evict-small-cm.html * igt@xe_exec_balancer@many-execqueues-parallel-userptr-rebind: - shard-dg2-set2: [PASS][158] -> [DMESG-WARN][159] ([Intel XE#1727]) +3 other tests dmesg-warn [158]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-436/igt@xe_exec_balancer@many-execqueues-parallel-userptr-rebind.html [159]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-436/igt@xe_exec_balancer@many-execqueues-parallel-userptr-rebind.html * igt@xe_exec_basic@multigpu-once-bindexecqueue: - shard-bmg: NOTRUN -> [SKIP][160] ([Intel XE#2322]) [160]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-4/igt@xe_exec_basic@multigpu-once-bindexecqueue.html * igt@xe_exec_fault_mode@twice-invalid-fault: - shard-dg2-set2: NOTRUN -> [SKIP][161] ([Intel XE#288]) +1 other test skip [161]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-433/igt@xe_exec_fault_mode@twice-invalid-fault.html * igt@xe_fault_injection@inject-fault-probe-function-xe_guc_ct_init: - shard-bmg: [PASS][162] -> [DMESG-WARN][163] ([Intel XE#3343]) [162]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-1/igt@xe_fault_injection@inject-fault-probe-function-xe_guc_ct_init.html [163]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-2/igt@xe_fault_injection@inject-fault-probe-function-xe_guc_ct_init.html * igt@xe_fault_injection@inject-fault-probe-function-xe_sriov_init: - shard-bmg: [PASS][164] -> [DMESG-WARN][165] ([Intel XE#3467] / [Intel XE#3468]) [164]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-4/igt@xe_fault_injection@inject-fault-probe-function-xe_sriov_init.html [165]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-2/igt@xe_fault_injection@inject-fault-probe-function-xe_sriov_init.html * igt@xe_fault_injection@inject-fault-probe-function-xe_uc_fw_init: - shard-bmg: [PASS][166] -> [DMESG-WARN][167] ([Intel XE#3343] / [Intel XE#3468]) [166]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-6/igt@xe_fault_injection@inject-fault-probe-function-xe_uc_fw_init.html [167]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-1/igt@xe_fault_injection@inject-fault-probe-function-xe_uc_fw_init.html * igt@xe_fault_injection@vm-create-fail-xe_exec_queue_create_bind: - shard-dg2-set2: NOTRUN -> [SKIP][168] ([Intel XE#1130]) +26 other tests skip [168]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@xe_fault_injection@vm-create-fail-xe_exec_queue_create_bind.html * igt@xe_live_ktest@xe_bo@xe_bo_evict_kunit: - shard-dg2-set2: [PASS][169] -> [SKIP][170] ([Intel XE#2229]) +1 other test skip [169]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-463/igt@xe_live_ktest@xe_bo@xe_bo_evict_kunit.html [170]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-466/igt@xe_live_ktest@xe_bo@xe_bo_evict_kunit.html * igt@xe_module_load@force-load: - shard-bmg: NOTRUN -> [SKIP][171] ([Intel XE#2457]) [171]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-1/igt@xe_module_load@force-load.html * igt@xe_module_load@many-reload: - shard-bmg: [PASS][172] -> [DMESG-WARN][173] ([Intel XE#3467]) +3 other tests dmesg-warn [172]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-2/igt@xe_module_load@many-reload.html [173]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-4/igt@xe_module_load@many-reload.html - shard-dg2-set2: [PASS][174] -> [FAIL][175] ([Intel XE#3546]) [174]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-433/igt@xe_module_load@many-reload.html [175]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@xe_module_load@many-reload.html * igt@xe_oa@unprivileged-single-ctx-counters: - shard-bmg: NOTRUN -> [SKIP][176] ([Intel XE#2248]) [176]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-2/igt@xe_oa@unprivileged-single-ctx-counters.html * igt@xe_peer2peer@write@write-gpua-vram01-gpub-system-p2p: - shard-dg2-set2: NOTRUN -> [FAIL][177] ([Intel XE#1173]) [177]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-433/igt@xe_peer2peer@write@write-gpua-vram01-gpub-system-p2p.html * igt@xe_pm@s2idle-exec-after: - shard-dg2-set2: [PASS][178] -> [SKIP][179] ([Intel XE#1130]) +240 other tests skip [178]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-435/igt@xe_pm@s2idle-exec-after.html [179]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@xe_pm@s2idle-exec-after.html * igt@xe_pm@s3-exec-after: - shard-bmg: [PASS][180] -> [DMESG-WARN][181] ([Intel XE#1727] / [Intel XE#3468] / [Intel XE#569]) [180]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-8/igt@xe_pm@s3-exec-after.html [181]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-2/igt@xe_pm@s3-exec-after.html - shard-dg2-set2: [PASS][182] -> [DMESG-WARN][183] ([Intel XE#1727] / [Intel XE#3468] / [Intel XE#569]) [182]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-463/igt@xe_pm@s3-exec-after.html [183]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-436/igt@xe_pm@s3-exec-after.html * igt@xe_pm@s4-vm-bind-userptr: - shard-bmg: [PASS][184] -> [DMESG-WARN][185] ([Intel XE#1727] / [Intel XE#2280] / [Intel XE#3468]) [184]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-4/igt@xe_pm@s4-vm-bind-userptr.html [185]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-4/igt@xe_pm@s4-vm-bind-userptr.html * igt@xe_sriov_flr@flr-vf1-clear: - shard-lnl: NOTRUN -> [SKIP][186] ([Intel XE#3342]) [186]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-lnl-8/igt@xe_sriov_flr@flr-vf1-clear.html - shard-bmg: NOTRUN -> [SKIP][187] ([Intel XE#3342]) [187]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-6/igt@xe_sriov_flr@flr-vf1-clear.html #### Possible fixes #### * igt@core_hotunplug@hotrebind-lateclose: - shard-lnl: [DMESG-WARN][188] -> [PASS][189] [188]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-lnl-3/igt@core_hotunplug@hotrebind-lateclose.html [189]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-lnl-2/igt@core_hotunplug@hotrebind-lateclose.html * igt@fbdev@read: - shard-dg2-set2: [SKIP][190] ([Intel XE#2134]) -> [PASS][191] +1 other test pass [190]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-434/igt@fbdev@read.html [191]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-435/igt@fbdev@read.html * igt@kms_async_flips@alternate-sync-async-flip: - shard-bmg: [FAIL][192] ([Intel XE#827]) -> [PASS][193] +1 other test pass [192]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-1/igt@kms_async_flips@alternate-sync-async-flip.html [193]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-1/igt@kms_async_flips@alternate-sync-async-flip.html * igt@kms_atomic@plane-invalid-params-fence: - shard-dg2-set2: [SKIP][194] ([Intel XE#2423] / [i915#2575]) -> [PASS][195] +72 other tests pass [194]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-466/igt@kms_atomic@plane-invalid-params-fence.html [195]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-435/igt@kms_atomic@plane-invalid-params-fence.html * igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size: - shard-bmg: [DMESG-WARN][196] ([Intel XE#877]) -> [PASS][197] +2 other tests pass [196]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-2/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html [197]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-4/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html * igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size: - shard-bmg: [SKIP][198] ([Intel XE#2291]) -> [PASS][199] +2 other tests pass [198]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size.html [199]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-1/igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size.html * igt@kms_dp_aux_dev: - shard-dg2-set2: [SKIP][200] ([Intel XE#2423]) -> [PASS][201] [200]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-434/igt@kms_dp_aux_dev.html [201]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-433/igt@kms_dp_aux_dev.html * igt@kms_dp_linktrain_fallback@dp-fallback: - shard-bmg: [SKIP][202] ([Intel XE#3070]) -> [PASS][203] [202]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-6/igt@kms_dp_linktrain_fallback@dp-fallback.html [203]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-1/igt@kms_dp_linktrain_fallback@dp-fallback.html * igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible: - shard-bmg: [SKIP][204] ([Intel XE#2316]) -> [PASS][205] +3 other tests pass [204]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-6/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible.html [205]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-4/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible.html * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ac-dp2-hdmi-a3: - shard-bmg: [FAIL][206] ([Intel XE#3486]) -> [PASS][207] [206]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-1/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ac-dp2-hdmi-a3.html [207]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-2/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ac-dp2-hdmi-a3.html * igt@kms_flip@2x-flip-vs-expired-vblank@ac-dp2-hdmi-a3: - shard-bmg: [FAIL][208] ([Intel XE#3321] / [Intel XE#3487]) -> [PASS][209] [208]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-1/igt@kms_flip@2x-flip-vs-expired-vblank@ac-dp2-hdmi-a3.html [209]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-1/igt@kms_flip@2x-flip-vs-expired-vblank@ac-dp2-hdmi-a3.html * igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-downscaling: - shard-bmg: [INCOMPLETE][210] ([Intel XE#1727] / [Intel XE#3468]) -> [PASS][211] +3 other tests pass [210]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-2/igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-downscaling.html [211]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-4/igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-downscaling.html - shard-dg2-set2: [INCOMPLETE][212] ([Intel XE#1727] / [Intel XE#3468]) -> [PASS][213] +1 other test pass [212]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-433/igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-downscaling.html [213]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-463/igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-downscaling.html * igt@kms_force_connector_basic@force-edid: - shard-dg2-set2: [DMESG-WARN][214] ([Intel XE#1727]) -> [PASS][215] [214]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-433/igt@kms_force_connector_basic@force-edid.html [215]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-433/igt@kms_force_connector_basic@force-edid.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-blt: - shard-dg2-set2: [SKIP][216] ([Intel XE#2136] / [Intel XE#2351]) -> [PASS][217] +12 other tests pass [216]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-434/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-blt.html [217]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-435/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-blt.html * igt@kms_frontbuffer_tracking@fbc-indfb-scaledprimary: - shard-dg2-set2: [SKIP][218] ([Intel XE#2136]) -> [PASS][219] +21 other tests pass [218]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-434/igt@kms_frontbuffer_tracking@fbc-indfb-scaledprimary.html [219]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-435/igt@kms_frontbuffer_tracking@fbc-indfb-scaledprimary.html * igt@kms_hdr@invalid-hdr: - shard-bmg: [SKIP][220] ([Intel XE#1503]) -> [PASS][221] [220]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-1/igt@kms_hdr@invalid-hdr.html [221]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-2/igt@kms_hdr@invalid-hdr.html * igt@kms_plane_cursor@overlay@pipe-a-hdmi-a-6-size-64: - shard-dg2-set2: [FAIL][222] ([Intel XE#616]) -> [PASS][223] +1 other test pass [222]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-463/igt@kms_plane_cursor@overlay@pipe-a-hdmi-a-6-size-64.html [223]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-435/igt@kms_plane_cursor@overlay@pipe-a-hdmi-a-6-size-64.html * igt@kms_plane_cursor@viewport@pipe-a-dp-2-size-256: - shard-bmg: [DMESG-FAIL][224] -> [PASS][225] [224]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-2/igt@kms_plane_cursor@viewport@pipe-a-dp-2-size-256.html [225]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-2/igt@kms_plane_cursor@viewport@pipe-a-dp-2-size-256.html * igt@kms_plane_cursor@viewport@pipe-a-dp-2-size-64: - shard-bmg: [DMESG-FAIL][226] ([Intel XE#3468]) -> [PASS][227] +8 other tests pass [226]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-2/igt@kms_plane_cursor@viewport@pipe-a-dp-2-size-64.html [227]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-2/igt@kms_plane_cursor@viewport@pipe-a-dp-2-size-64.html * igt@kms_plane_scaling@2x-scaler-multi-pipe: - shard-bmg: [SKIP][228] ([Intel XE#2571]) -> [PASS][229] [228]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-6/igt@kms_plane_scaling@2x-scaler-multi-pipe.html [229]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-4/igt@kms_plane_scaling@2x-scaler-multi-pipe.html * igt@kms_pm_rpm@legacy-planes-dpms@plane-59: - shard-lnl: [DMESG-WARN][230] ([Intel XE#3184]) -> [PASS][231] +2 other tests pass [230]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-lnl-1/igt@kms_pm_rpm@legacy-planes-dpms@plane-59.html [231]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-lnl-7/igt@kms_pm_rpm@legacy-planes-dpms@plane-59.html * igt@kms_pm_rpm@modeset-lpsp-stress-no-wait: - shard-dg2-set2: [SKIP][232] ([Intel XE#2446]) -> [PASS][233] +2 other tests pass [232]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-434/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html [233]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-433/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html * igt@kms_universal_plane@cursor-fb-leak@pipe-b-edp-1: - shard-lnl: [FAIL][234] ([Intel XE#899]) -> [PASS][235] [234]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-lnl-3/igt@kms_universal_plane@cursor-fb-leak@pipe-b-edp-1.html [235]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-lnl-8/igt@kms_universal_plane@cursor-fb-leak@pipe-b-edp-1.html * igt@kms_vblank@ts-continuation-dpms-rpm@pipe-a-dp-2: - shard-bmg: [DMESG-WARN][236] ([Intel XE#1727] / [Intel XE#3468]) -> [PASS][237] +2 other tests pass [236]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-2/igt@kms_vblank@ts-continuation-dpms-rpm@pipe-a-dp-2.html [237]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-1/igt@kms_vblank@ts-continuation-dpms-rpm@pipe-a-dp-2.html * igt@kms_vblank@ts-continuation-dpms-rpm@pipe-d-hdmi-a-3: - shard-bmg: [DMESG-WARN][238] ([Intel XE#3468]) -> [PASS][239] +27 other tests pass [238]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-2/igt@kms_vblank@ts-continuation-dpms-rpm@pipe-d-hdmi-a-3.html [239]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-1/igt@kms_vblank@ts-continuation-dpms-rpm@pipe-d-hdmi-a-3.html * igt@xe_compute@ccs-mode-basic: - shard-bmg: [INCOMPLETE][240] ([Intel XE#1727]) -> [PASS][241] [240]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-1/igt@xe_compute@ccs-mode-basic.html [241]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-2/igt@xe_compute@ccs-mode-basic.html * igt@xe_exec_threads@threads-cm-shared-vm-userptr-invalidate: - shard-bmg: [DMESG-WARN][242] ([Intel XE#3371] / [Intel XE#3515]) -> [PASS][243] [242]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-4/igt@xe_exec_threads@threads-cm-shared-vm-userptr-invalidate.html [243]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-2/igt@xe_exec_threads@threads-cm-shared-vm-userptr-invalidate.html * igt@xe_exercise_blt@fast-copy: - shard-bmg: [INCOMPLETE][244] -> [PASS][245] [244]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-1/igt@xe_exercise_blt@fast-copy.html [245]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-1/igt@xe_exercise_blt@fast-copy.html * igt@xe_fault_injection@inject-fault-probe-function-xe_ggtt_init_early: - shard-bmg: [DMESG-WARN][246] ([Intel XE#3467] / [Intel XE#3468]) -> [PASS][247] [246]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-1/igt@xe_fault_injection@inject-fault-probe-function-xe_ggtt_init_early.html [247]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-6/igt@xe_fault_injection@inject-fault-probe-function-xe_ggtt_init_early.html * igt@xe_fault_injection@inject-fault-probe-function-xe_wopcm_init: - shard-bmg: [DMESG-WARN][248] ([Intel XE#3343]) -> [PASS][249] [248]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-1/igt@xe_fault_injection@inject-fault-probe-function-xe_wopcm_init.html [249]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-4/igt@xe_fault_injection@inject-fault-probe-function-xe_wopcm_init.html * igt@xe_fault_injection@vm-create-fail-xe_exec_queue_create_bind: - shard-bmg: [DMESG-WARN][250] ([Intel XE#3521]) -> [PASS][251] [250]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-2/igt@xe_fault_injection@vm-create-fail-xe_exec_queue_create_bind.html [251]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-4/igt@xe_fault_injection@vm-create-fail-xe_exec_queue_create_bind.html * igt@xe_live_ktest@xe_bo: - shard-dg2-set2: [TIMEOUT][252] ([Intel XE#2961] / [Intel XE#3191]) -> [PASS][253] +1 other test pass [252]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-463/igt@xe_live_ktest@xe_bo.html [253]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-466/igt@xe_live_ktest@xe_bo.html * igt@xe_module_load@reload-no-display: - shard-bmg: [DMESG-WARN][254] ([Intel XE#3467]) -> [PASS][255] +1 other test pass [254]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-2/igt@xe_module_load@reload-no-display.html [255]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-6/igt@xe_module_load@reload-no-display.html - shard-dg2-set2: [DMESG-WARN][256] ([Intel XE#3467]) -> [PASS][257] +1 other test pass [256]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-433/igt@xe_module_load@reload-no-display.html [257]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-435/igt@xe_module_load@reload-no-display.html * igt@xe_oa@oa-regs-whitelisted: - shard-lnl: [FAIL][258] ([Intel XE#2514]) -> [PASS][259] +1 other test pass [258]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-lnl-7/igt@xe_oa@oa-regs-whitelisted.html [259]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-lnl-7/igt@xe_oa@oa-regs-whitelisted.html * igt@xe_oa@oa-regs-whitelisted@ccs-0: - shard-bmg: [FAIL][260] ([Intel XE#2514]) -> [PASS][261] +1 other test pass [260]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-1/igt@xe_oa@oa-regs-whitelisted@ccs-0.html [261]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-6/igt@xe_oa@oa-regs-whitelisted@ccs-0.html * igt@xe_pm@d3hot-mmap-vram: - shard-dg2-set2: [DMESG-WARN][262] ([Intel XE#3468]) -> [PASS][263] +1 other test pass [262]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-436/igt@xe_pm@d3hot-mmap-vram.html [263]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-463/igt@xe_pm@d3hot-mmap-vram.html * igt@xe_pm@s2idle-basic-exec: - shard-dg2-set2: [DMESG-WARN][264] ([Intel XE#1727] / [Intel XE#3468]) -> [PASS][265] [264]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-435/igt@xe_pm@s2idle-basic-exec.html [265]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-433/igt@xe_pm@s2idle-basic-exec.html * igt@xe_pm@s4-basic: - shard-lnl: [ABORT][266] ([Intel XE#1358] / [Intel XE#1607]) -> [PASS][267] [266]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-lnl-2/igt@xe_pm@s4-basic.html [267]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-lnl-8/igt@xe_pm@s4-basic.html * igt@xe_vm@large-split-binds-536870912: - shard-dg2-set2: [SKIP][268] ([Intel XE#1130]) -> [PASS][269] +129 other tests pass [268]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-434/igt@xe_vm@large-split-binds-536870912.html [269]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-433/igt@xe_vm@large-split-binds-536870912.html #### Warnings #### * igt@kms_async_flips@async-flip-suspend-resume: - shard-dg2-set2: [SKIP][270] ([Intel XE#2423] / [i915#2575]) -> [DMESG-WARN][271] ([Intel XE#3468]) [270]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-434/igt@kms_async_flips@async-flip-suspend-resume.html [271]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-463/igt@kms_async_flips@async-flip-suspend-resume.html * igt@kms_big_fb@4-tiled-32bpp-rotate-90: - shard-dg2-set2: [SKIP][272] ([Intel XE#2136] / [Intel XE#2351]) -> [SKIP][273] ([Intel XE#316]) +1 other test skip [272]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-434/igt@kms_big_fb@4-tiled-32bpp-rotate-90.html [273]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-463/igt@kms_big_fb@4-tiled-32bpp-rotate-90.html * igt@kms_big_fb@x-tiled-32bpp-rotate-0: - shard-dg2-set2: [SKIP][274] ([Intel XE#2136] / [Intel XE#2351]) -> [DMESG-WARN][275] ([Intel XE#1727]) [274]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-466/igt@kms_big_fb@x-tiled-32bpp-rotate-0.html [275]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-435/igt@kms_big_fb@x-tiled-32bpp-rotate-0.html * igt@kms_big_fb@x-tiled-8bpp-rotate-270: - shard-dg2-set2: [SKIP][276] ([Intel XE#316]) -> [SKIP][277] ([Intel XE#2136]) +4 other tests skip [276]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-436/igt@kms_big_fb@x-tiled-8bpp-rotate-270.html [277]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@kms_big_fb@x-tiled-8bpp-rotate-270.html * igt@kms_big_fb@y-tiled-addfb-size-offset-overflow: - shard-dg2-set2: [SKIP][278] ([Intel XE#607]) -> [SKIP][279] ([Intel XE#2136] / [Intel XE#2351]) [278]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-463/igt@kms_big_fb@y-tiled-addfb-size-offset-overflow.html [279]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@kms_big_fb@y-tiled-addfb-size-offset-overflow.html * igt@kms_big_fb@yf-tiled-32bpp-rotate-0: - shard-dg2-set2: [SKIP][280] ([Intel XE#2136] / [Intel XE#2351]) -> [SKIP][281] ([Intel XE#1124]) +1 other test skip [280]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-434/igt@kms_big_fb@yf-tiled-32bpp-rotate-0.html [281]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-433/igt@kms_big_fb@yf-tiled-32bpp-rotate-0.html * igt@kms_big_fb@yf-tiled-32bpp-rotate-180: - shard-dg2-set2: [SKIP][282] ([Intel XE#2136]) -> [SKIP][283] ([Intel XE#1124]) +8 other tests skip [282]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-466/igt@kms_big_fb@yf-tiled-32bpp-rotate-180.html [283]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-433/igt@kms_big_fb@yf-tiled-32bpp-rotate-180.html * igt@kms_big_fb@yf-tiled-addfb: - shard-dg2-set2: [SKIP][284] ([Intel XE#619]) -> [SKIP][285] ([Intel XE#2136] / [Intel XE#2351]) [284]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-436/igt@kms_big_fb@yf-tiled-addfb.html [285]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-466/igt@kms_big_fb@yf-tiled-addfb.html * igt@kms_big_fb@yf-tiled-addfb-size-overflow: - shard-dg2-set2: [SKIP][286] ([Intel XE#610]) -> [SKIP][287] ([Intel XE#2136]) [286]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-436/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html [287]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip: - shard-dg2-set2: [SKIP][288] ([Intel XE#1124]) -> [SKIP][289] ([Intel XE#2136]) +9 other tests skip [288]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-436/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html [289]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-466/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip: - shard-dg2-set2: [SKIP][290] ([Intel XE#1124]) -> [SKIP][291] ([Intel XE#2136] / [Intel XE#2351]) +3 other tests skip [290]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-435/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip.html [291]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-466/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip.html * igt@kms_bw@connected-linear-tiling-1-displays-2560x1440p: - shard-dg2-set2: [SKIP][292] ([Intel XE#2423] / [i915#2575]) -> [SKIP][293] ([Intel XE#367]) +2 other tests skip [292]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-434/igt@kms_bw@connected-linear-tiling-1-displays-2560x1440p.html [293]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-463/igt@kms_bw@connected-linear-tiling-1-displays-2560x1440p.html * igt@kms_bw@connected-linear-tiling-4-displays-2160x1440p: - shard-dg2-set2: [SKIP][294] ([Intel XE#2423] / [i915#2575]) -> [SKIP][295] ([Intel XE#2191]) +3 other tests skip [294]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-434/igt@kms_bw@connected-linear-tiling-4-displays-2160x1440p.html [295]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-463/igt@kms_bw@connected-linear-tiling-4-displays-2160x1440p.html * igt@kms_bw@connected-linear-tiling-4-displays-2560x1440p: - shard-dg2-set2: [SKIP][296] ([Intel XE#2191]) -> [SKIP][297] ([Intel XE#2423] / [i915#2575]) +1 other test skip [296]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-463/igt@kms_bw@connected-linear-tiling-4-displays-2560x1440p.html [297]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@kms_bw@connected-linear-tiling-4-displays-2560x1440p.html * igt@kms_bw@linear-tiling-1-displays-1920x1080p: - shard-dg2-set2: [SKIP][298] ([Intel XE#367]) -> [SKIP][299] ([Intel XE#2423] / [i915#2575]) +9 other tests skip [298]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-436/igt@kms_bw@linear-tiling-1-displays-1920x1080p.html [299]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@kms_bw@linear-tiling-1-displays-1920x1080p.html * igt@kms_ccs@bad-pixel-format-4-tiled-mtl-rc-ccs-cc: - shard-dg2-set2: [SKIP][300] ([Intel XE#2136] / [Intel XE#2351]) -> [SKIP][301] ([Intel XE#455] / [Intel XE#787]) +3 other tests skip [300]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-434/igt@kms_ccs@bad-pixel-format-4-tiled-mtl-rc-ccs-cc.html [301]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-435/igt@kms_ccs@bad-pixel-format-4-tiled-mtl-rc-ccs-cc.html * igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs: - shard-dg2-set2: [SKIP][302] ([Intel XE#455] / [Intel XE#787]) -> [SKIP][303] ([Intel XE#2136] / [Intel XE#2351]) +2 other tests skip [302]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-435/igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs.html [303]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-466/igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs.html * igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs: - shard-dg2-set2: [SKIP][304] ([Intel XE#2136]) -> [SKIP][305] ([Intel XE#455] / [Intel XE#787]) +8 other tests skip [304]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-434/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs.html [305]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-435/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs.html * igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs: - shard-dg2-set2: [SKIP][306] ([Intel XE#2136]) -> [SKIP][307] ([Intel XE#3442]) [306]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-434/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs.html [307]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-433/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs.html * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs-cc: - shard-dg2-set2: [FAIL][308] ([Intel XE#616]) -> [SKIP][309] ([Intel XE#2136]) [308]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-463/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs-cc.html [309]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs-cc.html * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs: - shard-dg2-set2: [SKIP][310] ([Intel XE#2136]) -> [SKIP][311] ([Intel XE#2907]) +3 other tests skip [310]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-466/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs.html [311]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-433/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs.html * igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs: - shard-dg2-set2: [SKIP][312] ([Intel XE#2907]) -> [SKIP][313] ([Intel XE#2136]) [312]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs.html [313]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs.html * igt@kms_ccs@random-ccs-data-4-tiled-mtl-mc-ccs: - shard-dg2-set2: [SKIP][314] ([Intel XE#455] / [Intel XE#787]) -> [SKIP][315] ([Intel XE#2136]) +16 other tests skip [314]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-mtl-mc-ccs.html [315]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-mtl-mc-ccs.html * igt@kms_chamelium_color@ctm-limited-range: - shard-dg2-set2: [SKIP][316] ([Intel XE#2423] / [i915#2575]) -> [SKIP][317] ([Intel XE#306]) [316]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-434/igt@kms_chamelium_color@ctm-limited-range.html [317]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-433/igt@kms_chamelium_color@ctm-limited-range.html * igt@kms_chamelium_color@gamma: - shard-dg2-set2: [SKIP][318] ([Intel XE#306]) -> [SKIP][319] ([Intel XE#2423] / [i915#2575]) +2 other tests skip [318]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-436/igt@kms_chamelium_color@gamma.html [319]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@kms_chamelium_color@gamma.html * igt@kms_chamelium_hpd@hdmi-hpd: - shard-dg2-set2: [SKIP][320] ([Intel XE#373]) -> [SKIP][321] ([Intel XE#2423] / [i915#2575]) +11 other tests skip [320]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-436/igt@kms_chamelium_hpd@hdmi-hpd.html [321]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@kms_chamelium_hpd@hdmi-hpd.html * igt@kms_chamelium_hpd@vga-hpd: - shard-dg2-set2: [SKIP][322] ([Intel XE#2423] / [i915#2575]) -> [SKIP][323] ([Intel XE#373]) +8 other tests skip [322]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-466/igt@kms_chamelium_hpd@vga-hpd.html [323]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-433/igt@kms_chamelium_hpd@vga-hpd.html * igt@kms_content_protection@atomic: - shard-dg2-set2: [FAIL][324] ([Intel XE#1178]) -> [SKIP][325] ([Intel XE#2423] / [i915#2575]) [324]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-435/igt@kms_content_protection@atomic.html [325]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@kms_content_protection@atomic.html * igt@kms_content_protection@legacy: - shard-dg2-set2: [SKIP][326] ([Intel XE#2423] / [i915#2575]) -> [FAIL][327] ([Intel XE#1178]) [326]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-434/igt@kms_content_protection@legacy.html [327]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-436/igt@kms_content_protection@legacy.html * igt@kms_content_protection@lic-type-0: - shard-bmg: [FAIL][328] ([Intel XE#1178]) -> [SKIP][329] ([Intel XE#2341]) [328]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-2/igt@kms_content_protection@lic-type-0.html [329]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-6/igt@kms_content_protection@lic-type-0.html * igt@kms_content_protection@srm: - shard-bmg: [SKIP][330] ([Intel XE#2341]) -> [INCOMPLETE][331] ([Intel XE#2715] / [Intel XE#3468]) +1 other test incomplete [330]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-6/igt@kms_content_protection@srm.html [331]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-2/igt@kms_content_protection@srm.html * igt@kms_content_protection@uevent: - shard-dg2-set2: [SKIP][332] ([Intel XE#2423] / [i915#2575]) -> [FAIL][333] ([Intel XE#1188]) [332]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-434/igt@kms_content_protection@uevent.html [333]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-433/igt@kms_content_protection@uevent.html - shard-bmg: [SKIP][334] ([Intel XE#2341]) -> [FAIL][335] ([Intel XE#1188]) [334]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-6/igt@kms_content_protection@uevent.html [335]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-2/igt@kms_content_protection@uevent.html * igt@kms_cursor_crc@cursor-offscreen-512x512: - shard-dg2-set2: [SKIP][336] ([Intel XE#308]) -> [SKIP][337] ([Intel XE#2423] / [i915#2575]) +4 other tests skip [336]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-436/igt@kms_cursor_crc@cursor-offscreen-512x512.html [337]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@kms_cursor_crc@cursor-offscreen-512x512.html * igt@kms_cursor_crc@cursor-onscreen-512x170: - shard-dg2-set2: [SKIP][338] ([Intel XE#2423] / [i915#2575]) -> [SKIP][339] ([Intel XE#308]) [338]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-466/igt@kms_cursor_crc@cursor-onscreen-512x170.html [339]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-463/igt@kms_cursor_crc@cursor-onscreen-512x170.html * igt@kms_cursor_crc@cursor-sliding-max-size: - shard-dg2-set2: [SKIP][340] ([Intel XE#2423] / [i915#2575]) -> [SKIP][341] ([Intel XE#455]) +5 other tests skip [340]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-434/igt@kms_cursor_crc@cursor-sliding-max-size.html [341]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-463/igt@kms_cursor_crc@cursor-sliding-max-size.html * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic: - shard-bmg: [DMESG-WARN][342] ([Intel XE#3468]) -> [SKIP][343] ([Intel XE#2291]) [342]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-2/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html [343]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-6/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size: - shard-dg2-set2: [SKIP][344] ([Intel XE#323]) -> [SKIP][345] ([Intel XE#2423] / [i915#2575]) [344]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-436/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size.html [345]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size.html * igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions: - shard-bmg: [DMESG-WARN][346] -> [SKIP][347] ([Intel XE#2291]) [346]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-1/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions.html [347]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions.html * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size: - shard-dg2-set2: [SKIP][348] ([Intel XE#2423] / [i915#2575]) -> [SKIP][349] ([Intel XE#323]) [348]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-434/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html [349]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-435/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html * igt@kms_dsc@dsc-with-bpc: - shard-dg2-set2: [SKIP][350] ([Intel XE#2136]) -> [SKIP][351] ([Intel XE#455]) +2 other tests skip [350]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-434/igt@kms_dsc@dsc-with-bpc.html [351]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-463/igt@kms_dsc@dsc-with-bpc.html * igt@kms_fbcon_fbt@psr-suspend: - shard-dg2-set2: [SKIP][352] ([Intel XE#776]) -> [SKIP][353] ([Intel XE#2136]) [352]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-463/igt@kms_fbcon_fbt@psr-suspend.html [353]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@kms_fbcon_fbt@psr-suspend.html * igt@kms_feature_discovery@chamelium: - shard-dg2-set2: [SKIP][354] ([Intel XE#701]) -> [SKIP][355] ([Intel XE#2423] / [i915#2575]) [354]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-433/igt@kms_feature_discovery@chamelium.html [355]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@kms_feature_discovery@chamelium.html * igt@kms_feature_discovery@display-3x: - shard-dg2-set2: [SKIP][356] ([Intel XE#703]) -> [SKIP][357] ([Intel XE#2423] / [i915#2575]) [356]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-435/igt@kms_feature_discovery@display-3x.html [357]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@kms_feature_discovery@display-3x.html * igt@kms_feature_discovery@display-4x: - shard-dg2-set2: [SKIP][358] ([Intel XE#1138]) -> [SKIP][359] ([Intel XE#2423] / [i915#2575]) [358]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-435/igt@kms_feature_discovery@display-4x.html [359]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-466/igt@kms_feature_discovery@display-4x.html * igt@kms_feature_discovery@psr1: - shard-dg2-set2: [SKIP][360] ([Intel XE#1135]) -> [SKIP][361] ([Intel XE#2423] / [i915#2575]) [360]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-463/igt@kms_feature_discovery@psr1.html [361]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@kms_feature_discovery@psr1.html * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible: - shard-dg2-set2: [SKIP][362] ([Intel XE#2423] / [i915#2575]) -> [FAIL][363] ([Intel XE#301]) [362]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-466/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html [363]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-433/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html * igt@kms_flip@2x-modeset-vs-vblank-race: - shard-bmg: [SKIP][364] ([Intel XE#2316]) -> [DMESG-WARN][365] ([Intel XE#3468]) [364]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-6/igt@kms_flip@2x-modeset-vs-vblank-race.html [365]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-1/igt@kms_flip@2x-modeset-vs-vblank-race.html * igt@kms_flip@flip-vs-expired-vblank: - shard-dg2-set2: [FAIL][366] ([Intel XE#301]) -> [SKIP][367] ([Intel XE#2423] / [i915#2575]) [366]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-463/igt@kms_flip@flip-vs-expired-vblank.html [367]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@kms_flip@flip-vs-expired-vblank.html * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling: - shard-dg2-set2: [DMESG-WARN][368] ([Intel XE#1727]) -> [SKIP][369] ([Intel XE#2136]) [368]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-435/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling.html [369]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-466/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling.html * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling: - shard-dg2-set2: [SKIP][370] ([Intel XE#2136] / [Intel XE#2351]) -> [SKIP][371] ([Intel XE#455]) +1 other test skip [370]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-466/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling.html [371]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-435/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling.html * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling: - shard-dg2-set2: [SKIP][372] ([Intel XE#455]) -> [SKIP][373] ([Intel XE#2136] / [Intel XE#2351]) +2 other tests skip [372]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-435/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling.html [373]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-466/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling.html * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling: - shard-dg2-set2: [SKIP][374] ([Intel XE#455]) -> [SKIP][375] ([Intel XE#2136]) +2 other tests skip [374]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-463/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling.html [375]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling.html * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render: - shard-bmg: [SKIP][376] ([Intel XE#2312]) -> [SKIP][377] ([Intel XE#2311]) +12 other tests skip [376]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render.html [377]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-4/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render.html * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-onoff: - shard-dg2-set2: [SKIP][378] ([Intel XE#2136]) -> [SKIP][379] ([Intel XE#651]) +23 other tests skip [378]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-434/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-onoff.html [379]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-463/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-onoff.html * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt: - shard-bmg: [SKIP][380] ([Intel XE#2311]) -> [SKIP][381] ([Intel XE#2312]) +21 other tests skip [380]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-4/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt.html [381]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt.html * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-fullscreen: - shard-dg2-set2: [SKIP][382] ([Intel XE#2136] / [Intel XE#2351]) -> [SKIP][383] ([Intel XE#651]) +8 other tests skip [382]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-466/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-fullscreen.html [383]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-463/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-fullscreen.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt: - shard-bmg: [FAIL][384] ([Intel XE#2333]) -> [DMESG-FAIL][385] ([Intel XE#3468]) +9 other tests dmesg-fail [384]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt.html [385]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt.html * igt@kms_frontbuffer_tracking@fbc-1p-rte: - shard-bmg: [FAIL][386] ([Intel XE#2333]) -> [INCOMPLETE][387] ([Intel XE#1727] / [Intel XE#3468]) [386]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-1p-rte.html [387]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-1/igt@kms_frontbuffer_tracking@fbc-1p-rte.html * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-plflip-blt: - shard-bmg: [DMESG-FAIL][388] ([Intel XE#3468]) -> [SKIP][389] ([Intel XE#2312]) [388]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-plflip-blt.html [389]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-plflip-blt.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-move: - shard-bmg: [SKIP][390] ([Intel XE#2312]) -> [FAIL][391] ([Intel XE#2333]) +5 other tests fail [390]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-move.html [391]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-move.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-pgflip-blt: - shard-dg2-set2: [INCOMPLETE][392] ([Intel XE#1727]) -> [SKIP][393] ([Intel XE#2136]) [392]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-436/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-pgflip-blt.html [393]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-466/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-pgflip-blt.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt: - shard-bmg: [FAIL][394] ([Intel XE#2333]) -> [SKIP][395] ([Intel XE#2312]) +6 other tests skip [394]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt.html [395]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc: - shard-bmg: [DMESG-FAIL][396] ([Intel XE#3468]) -> [FAIL][397] ([Intel XE#2333]) +4 other tests fail [396]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc.html [397]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc.html * igt@kms_frontbuffer_tracking@fbc-tiling-y: - shard-dg2-set2: [SKIP][398] ([Intel XE#2136] / [Intel XE#2351]) -> [SKIP][399] ([Intel XE#658]) [398]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-434/igt@kms_frontbuffer_tracking@fbc-tiling-y.html [399]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-435/igt@kms_frontbuffer_tracking@fbc-tiling-y.html * igt@kms_frontbuffer_tracking@fbcdrrs-1p-rte: - shard-dg2-set2: [SKIP][400] ([Intel XE#651]) -> [SKIP][401] ([Intel XE#2136]) +33 other tests skip [400]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-433/igt@kms_frontbuffer_tracking@fbcdrrs-1p-rte.html [401]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-466/igt@kms_frontbuffer_tracking@fbcdrrs-1p-rte.html * igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-indfb-plflip-blt: - shard-dg2-set2: [SKIP][402] ([Intel XE#651]) -> [SKIP][403] ([Intel XE#2136] / [Intel XE#2351]) +19 other tests skip [402]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-435/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-indfb-plflip-blt.html [403]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-indfb-plflip-blt.html * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt: - shard-dg2-set2: [SKIP][404] ([Intel XE#653]) -> [SKIP][405] ([Intel XE#2136]) +37 other tests skip [404]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-463/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt.html [405]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-466/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render: - shard-bmg: [SKIP][406] ([Intel XE#2313]) -> [SKIP][407] ([Intel XE#2312]) +21 other tests skip [406]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render.html [407]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-blt: - shard-dg2-set2: [SKIP][408] ([Intel XE#653]) -> [SKIP][409] ([Intel XE#2136] / [Intel XE#2351]) +3 other tests skip [408]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-435/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-blt.html [409]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-blt.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-render: - shard-dg2-set2: [SKIP][410] ([Intel XE#2136] / [Intel XE#2351]) -> [SKIP][411] ([Intel XE#653]) [410]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-466/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-render.html [411]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-463/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-render.html * igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt: - shard-bmg: [SKIP][412] ([Intel XE#2312]) -> [SKIP][413] ([Intel XE#2313]) +12 other tests skip [412]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html [413]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-4/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html * igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-blt: - shard-dg2-set2: [SKIP][414] ([Intel XE#2136]) -> [SKIP][415] ([Intel XE#653]) +19 other tests skip [414]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-466/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-blt.html [415]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-463/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-blt.html * igt@kms_joiner@basic-ultra-joiner: - shard-dg2-set2: [SKIP][416] ([Intel XE#2136]) -> [SKIP][417] ([Intel XE#2927]) [416]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-466/igt@kms_joiner@basic-ultra-joiner.html [417]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-433/igt@kms_joiner@basic-ultra-joiner.html * igt@kms_joiner@invalid-modeset-big-joiner: - shard-dg2-set2: [SKIP][418] ([Intel XE#346]) -> [SKIP][419] ([Intel XE#2136]) [418]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-463/igt@kms_joiner@invalid-modeset-big-joiner.html [419]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-466/igt@kms_joiner@invalid-modeset-big-joiner.html * igt@kms_joiner@invalid-modeset-force-ultra-joiner: - shard-dg2-set2: [SKIP][420] ([Intel XE#2136]) -> [SKIP][421] ([Intel XE#2925]) [420]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-466/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html [421]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-436/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html * igt@kms_plane_lowres@tiling-y: - shard-dg2-set2: [SKIP][422] ([Intel XE#455]) -> [SKIP][423] ([Intel XE#2423] / [i915#2575]) +1 other test skip [422]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-463/igt@kms_plane_lowres@tiling-y.html [423]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@kms_plane_lowres@tiling-y.html * igt@kms_plane_scaling@plane-downscale-factor-0-75-with-modifiers: - shard-dg2-set2: [SKIP][424] ([Intel XE#2423] / [i915#2575]) -> [DMESG-WARN][425] ([Intel XE#1727]) +1 other test dmesg-warn [424]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-466/igt@kms_plane_scaling@plane-downscale-factor-0-75-with-modifiers.html [425]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-433/igt@kms_plane_scaling@plane-downscale-factor-0-75-with-modifiers.html * igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25: - shard-dg2-set2: [SKIP][426] ([Intel XE#2763] / [Intel XE#455]) -> [SKIP][427] ([Intel XE#2423] / [i915#2575]) [426]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-433/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25.html [427]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25.html * igt@kms_pm_backlight@basic-brightness: - shard-dg2-set2: [SKIP][428] ([Intel XE#2136]) -> [SKIP][429] ([Intel XE#870]) [428]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-466/igt@kms_pm_backlight@basic-brightness.html [429]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-435/igt@kms_pm_backlight@basic-brightness.html * igt@kms_pm_dc@dc6-dpms: - shard-dg2-set2: [SKIP][430] ([Intel XE#908]) -> [SKIP][431] ([Intel XE#2136] / [Intel XE#2351]) [430]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-463/igt@kms_pm_dc@dc6-dpms.html [431]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-466/igt@kms_pm_dc@dc6-dpms.html * igt@kms_pm_dc@deep-pkgc: - shard-dg2-set2: [SKIP][432] ([Intel XE#908]) -> [SKIP][433] ([Intel XE#2136]) [432]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-435/igt@kms_pm_dc@deep-pkgc.html [433]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@kms_pm_dc@deep-pkgc.html * igt@kms_pm_lpsp@kms-lpsp: - shard-dg2-set2: [FAIL][434] ([Intel XE#3527]) -> [SKIP][435] ([Intel XE#2136]) [434]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-463/igt@kms_pm_lpsp@kms-lpsp.html [435]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@kms_pm_lpsp@kms-lpsp.html * igt@kms_pm_rpm@basic-pci-d3-state: - shard-dg2-set2: [SKIP][436] ([Intel XE#2446]) -> [ABORT][437] ([Intel XE#3468]) [436]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-466/igt@kms_pm_rpm@basic-pci-d3-state.html [437]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-463/igt@kms_pm_rpm@basic-pci-d3-state.html * igt@kms_pm_rpm@dpms-mode-unset-non-lpsp: - shard-dg2-set2: [SKIP][438] ([Intel XE#2446]) -> [DMESG-WARN][439] ([Intel XE#1727] / [Intel XE#3468]) [438]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-434/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html [439]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-433/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html * igt@kms_pm_rpm@modeset-stress-extra-wait: - shard-dg2-set2: [DMESG-WARN][440] ([Intel XE#1727] / [Intel XE#3468]) -> [SKIP][441] ([Intel XE#2446]) [440]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-436/igt@kms_pm_rpm@modeset-stress-extra-wait.html [441]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-466/igt@kms_pm_rpm@modeset-stress-extra-wait.html * igt@kms_pm_rpm@system-suspend-modeset: - shard-dg2-set2: [ABORT][442] ([Intel XE#3468]) -> [SKIP][443] ([Intel XE#2446]) [442]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-433/igt@kms_pm_rpm@system-suspend-modeset.html [443]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@kms_pm_rpm@system-suspend-modeset.html * igt@kms_psr2_sf@fbc-pr-plane-move-sf-dmg-area: - shard-dg2-set2: [SKIP][444] ([Intel XE#2136]) -> [SKIP][445] ([Intel XE#1489]) +6 other tests skip [444]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-434/igt@kms_psr2_sf@fbc-pr-plane-move-sf-dmg-area.html [445]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-436/igt@kms_psr2_sf@fbc-pr-plane-move-sf-dmg-area.html * igt@kms_psr2_sf@fbc-psr2-primary-plane-update-sf-dmg-area: - shard-dg2-set2: [SKIP][446] ([Intel XE#1489]) -> [SKIP][447] ([Intel XE#2136]) +13 other tests skip [446]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-463/igt@kms_psr2_sf@fbc-psr2-primary-plane-update-sf-dmg-area.html [447]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-466/igt@kms_psr2_sf@fbc-psr2-primary-plane-update-sf-dmg-area.html * igt@kms_psr2_su@frontbuffer-xrgb8888: - shard-dg2-set2: [SKIP][448] ([Intel XE#2136]) -> [SKIP][449] ([Intel XE#1122]) [448]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-466/igt@kms_psr2_su@frontbuffer-xrgb8888.html [449]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-463/igt@kms_psr2_su@frontbuffer-xrgb8888.html * igt@kms_psr@fbc-psr-no-drrs: - shard-dg2-set2: [SKIP][450] ([Intel XE#2136] / [Intel XE#2351]) -> [SKIP][451] ([Intel XE#2850] / [Intel XE#929]) +4 other tests skip [450]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-434/igt@kms_psr@fbc-psr-no-drrs.html [451]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-463/igt@kms_psr@fbc-psr-no-drrs.html * igt@kms_psr@fbc-psr-sprite-render: - shard-dg2-set2: [SKIP][452] ([Intel XE#2850] / [Intel XE#929]) -> [SKIP][453] ([Intel XE#2136]) +19 other tests skip [452]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-436/igt@kms_psr@fbc-psr-sprite-render.html [453]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-466/igt@kms_psr@fbc-psr-sprite-render.html * igt@kms_psr@fbc-psr2-sprite-plane-move: - shard-dg2-set2: [SKIP][454] ([Intel XE#2136]) -> [SKIP][455] ([Intel XE#2850] / [Intel XE#929]) +5 other tests skip [454]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-434/igt@kms_psr@fbc-psr2-sprite-plane-move.html [455]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-436/igt@kms_psr@fbc-psr2-sprite-plane-move.html * igt@kms_psr@fbc-psr2-sprite-render: - shard-dg2-set2: [SKIP][456] ([Intel XE#2850] / [Intel XE#929]) -> [SKIP][457] ([Intel XE#2136] / [Intel XE#2351]) +2 other tests skip [456]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-436/igt@kms_psr@fbc-psr2-sprite-render.html [457]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@kms_psr@fbc-psr2-sprite-render.html * igt@kms_psr@psr-sprite-plane-onoff: - shard-dg2-set2: [SKIP][458] ([Intel XE#2850] / [Intel XE#929]) -> [SKIP][459] ([Intel XE#2351]) +1 other test skip [458]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-463/igt@kms_psr@psr-sprite-plane-onoff.html [459]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@kms_psr@psr-sprite-plane-onoff.html * igt@kms_psr_stress_test@flip-primary-invalidate-overlay: - shard-dg2-set2: [SKIP][460] ([Intel XE#2136] / [Intel XE#2351]) -> [SKIP][461] ([Intel XE#2939]) [460]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-466/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html [461]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-435/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html * igt@kms_rotation_crc@primary-y-tiled-reflect-x-0: - shard-dg2-set2: [SKIP][462] ([Intel XE#2423] / [i915#2575]) -> [SKIP][463] ([Intel XE#1127]) +1 other test skip [462]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-434/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html [463]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-433/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html * igt@kms_rotation_crc@primary-y-tiled-reflect-x-180: - shard-dg2-set2: [SKIP][464] ([Intel XE#1127]) -> [SKIP][465] ([Intel XE#2423] / [i915#2575]) [464]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-463/igt@kms_rotation_crc@primary-y-tiled-reflect-x-180.html [465]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@kms_rotation_crc@primary-y-tiled-reflect-x-180.html * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270: - shard-dg2-set2: [SKIP][466] ([Intel XE#2423] / [i915#2575]) -> [SKIP][467] ([Intel XE#3414]) [466]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-466/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html [467]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-433/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html * igt@kms_rotation_crc@sprite-rotation-270: - shard-dg2-set2: [SKIP][468] ([Intel XE#3414]) -> [SKIP][469] ([Intel XE#2423] / [i915#2575]) +3 other tests skip [468]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-435/igt@kms_rotation_crc@sprite-rotation-270.html [469]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@kms_rotation_crc@sprite-rotation-270.html * igt@kms_setmode@basic: - shard-bmg: [DMESG-FAIL][470] ([Intel XE#3468]) -> [DMESG-WARN][471] ([Intel XE#3468]) [470]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-2/igt@kms_setmode@basic.html [471]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-6/igt@kms_setmode@basic.html * igt@kms_setmode@basic@pipe-a-hdmi-a-3: - shard-bmg: [FAIL][472] ([Intel XE#3559]) -> [DMESG-WARN][473] ([Intel XE#3468]) +1 other test dmesg-warn [472]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-2/igt@kms_setmode@basic@pipe-a-hdmi-a-3.html [473]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-6/igt@kms_setmode@basic@pipe-a-hdmi-a-3.html * igt@kms_tiled_display@basic-test-pattern: - shard-dg2-set2: [SKIP][474] ([Intel XE#362]) -> [SKIP][475] ([Intel XE#2423] / [i915#2575]) [474]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-463/igt@kms_tiled_display@basic-test-pattern.html [475]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@kms_tiled_display@basic-test-pattern.html * igt@kms_tv_load_detect@load-detect: - shard-dg2-set2: [SKIP][476] ([Intel XE#2423] / [i915#2575]) -> [SKIP][477] ([Intel XE#330]) [476]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-466/igt@kms_tv_load_detect@load-detect.html [477]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-463/igt@kms_tv_load_detect@load-detect.html * igt@kms_vblank@ts-continuation-dpms-rpm: - shard-dg2-set2: [DMESG-WARN][478] ([Intel XE#1727] / [Intel XE#3468]) -> [SKIP][479] ([Intel XE#2423] / [i915#2575]) [478]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-433/igt@kms_vblank@ts-continuation-dpms-rpm.html [479]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@kms_vblank@ts-continuation-dpms-rpm.html * igt@kms_vblank@ts-continuation-suspend: - shard-dg2-set2: [SKIP][480] ([Intel XE#2423] / [i915#2575]) -> [INCOMPLETE][481] ([Intel XE#1034] / [Intel XE#1727]) [480]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-434/igt@kms_vblank@ts-continuation-suspend.html [481]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-463/igt@kms_vblank@ts-continuation-suspend.html * igt@kms_vrr@lobf: - shard-dg2-set2: [SKIP][482] ([Intel XE#2168]) -> [SKIP][483] ([Intel XE#2423] / [i915#2575]) [482]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-463/igt@kms_vrr@lobf.html [483]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@kms_vrr@lobf.html * igt@kms_writeback@writeback-fb-id-xrgb2101010: - shard-dg2-set2: [SKIP][484] ([Intel XE#756]) -> [SKIP][485] ([Intel XE#2423] / [i915#2575]) [484]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-435/igt@kms_writeback@writeback-fb-id-xrgb2101010.html [485]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-466/igt@kms_writeback@writeback-fb-id-xrgb2101010.html * igt@xe_compute_preempt@compute-preempt: - shard-dg2-set2: [SKIP][486] ([Intel XE#1280] / [Intel XE#455]) -> [SKIP][487] ([Intel XE#1130]) +1 other test skip [486]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-436/igt@xe_compute_preempt@compute-preempt.html [487]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@xe_compute_preempt@compute-preempt.html * igt@xe_compute_preempt@compute-preempt-many: - shard-dg2-set2: [SKIP][488] ([Intel XE#1130]) -> [SKIP][489] ([Intel XE#1280] / [Intel XE#455]) [488]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-466/igt@xe_compute_preempt@compute-preempt-many.html [489]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-433/igt@xe_compute_preempt@compute-preempt-many.html * igt@xe_copy_basic@mem-copy-linear-0x369: - shard-dg2-set2: [SKIP][490] ([Intel XE#1123]) -> [SKIP][491] ([Intel XE#1130]) [490]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-433/igt@xe_copy_basic@mem-copy-linear-0x369.html [491]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-466/igt@xe_copy_basic@mem-copy-linear-0x369.html * igt@xe_copy_basic@mem-copy-linear-0x3fff: - shard-dg2-set2: [SKIP][492] ([Intel XE#1130]) -> [SKIP][493] ([Intel XE#1123]) [492]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-434/igt@xe_copy_basic@mem-copy-linear-0x3fff.html [493]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-463/igt@xe_copy_basic@mem-copy-linear-0x3fff.html * igt@xe_eudebug@basic-close: - shard-dg2-set2: [SKIP][494] ([Intel XE#2905]) -> [SKIP][495] ([Intel XE#1130]) +15 other tests skip [494]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-436/igt@xe_eudebug@basic-close.html [495]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-466/igt@xe_eudebug@basic-close.html * igt@xe_eudebug_online@interrupt-other-debuggable: - shard-dg2-set2: [SKIP][496] ([Intel XE#1130]) -> [SKIP][497] ([Intel XE#2905]) +8 other tests skip [496]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-434/igt@xe_eudebug_online@interrupt-other-debuggable.html [497]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-435/igt@xe_eudebug_online@interrupt-other-debuggable.html * igt@xe_evict@evict-beng-large-multi-vm-cm: - shard-dg2-set2: [FAIL][498] ([Intel XE#1600]) -> [SKIP][499] ([Intel XE#1130]) +1 other test skip [498]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-435/igt@xe_evict@evict-beng-large-multi-vm-cm.html [499]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@xe_evict@evict-beng-large-multi-vm-cm.html * igt@xe_evict@evict-beng-mixed-many-threads-large: - shard-bmg: [TIMEOUT][500] ([Intel XE#1473]) -> [INCOMPLETE][501] ([Intel XE#1473]) [500]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-2/igt@xe_evict@evict-beng-mixed-many-threads-large.html [501]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-6/igt@xe_evict@evict-beng-mixed-many-threads-large.html * igt@xe_evict@evict-beng-mixed-many-threads-small: - shard-dg2-set2: [SKIP][502] ([Intel XE#1130]) -> [TIMEOUT][503] ([Intel XE#1473] / [Intel XE#402]) [502]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-466/igt@xe_evict@evict-beng-mixed-many-threads-small.html [503]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-433/igt@xe_evict@evict-beng-mixed-many-threads-small.html * igt@xe_exec_balancer@many-execqueues-cm-parallel-userptr-invalidate: - shard-dg2-set2: [SKIP][504] ([Intel XE#1130]) -> [DMESG-WARN][505] ([Intel XE#1727]) +2 other tests dmesg-warn [504]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-466/igt@xe_exec_balancer@many-execqueues-cm-parallel-userptr-invalidate.html [505]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-435/igt@xe_exec_balancer@many-execqueues-cm-parallel-userptr-invalidate.html * igt@xe_exec_fault_mode@once-bindexecqueue-imm: - shard-dg2-set2: [SKIP][506] ([Intel XE#288]) -> [SKIP][507] ([Intel XE#1130]) +33 other tests skip [506]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-463/igt@xe_exec_fault_mode@once-bindexecqueue-imm.html [507]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-466/igt@xe_exec_fault_mode@once-bindexecqueue-imm.html * igt@xe_exec_fault_mode@twice-userptr-rebind-imm: - shard-dg2-set2: [SKIP][508] ([Intel XE#1130]) -> [SKIP][509] ([Intel XE#288]) +20 other tests skip [508]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-434/igt@xe_exec_fault_mode@twice-userptr-rebind-imm.html [509]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-433/igt@xe_exec_fault_mode@twice-userptr-rebind-imm.html * igt@xe_exec_mix_modes@exec-simple-batch-store-lr: - shard-dg2-set2: [SKIP][510] ([Intel XE#2360]) -> [SKIP][511] ([Intel XE#1130]) +1 other test skip [510]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-435/igt@xe_exec_mix_modes@exec-simple-batch-store-lr.html [511]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@xe_exec_mix_modes@exec-simple-batch-store-lr.html * igt@xe_exec_threads@threads-bal-mixed-shared-vm-userptr-invalidate: - shard-bmg: [DMESG-WARN][512] ([Intel XE#3468]) -> [DMESG-WARN][513] ([Intel XE#3371] / [Intel XE#3468] / [Intel XE#3515]) [512]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-4/igt@xe_exec_threads@threads-bal-mixed-shared-vm-userptr-invalidate.html [513]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-1/igt@xe_exec_threads@threads-bal-mixed-shared-vm-userptr-invalidate.html * igt@xe_fault_injection@inject-fault-probe-function-xe_guc_ct_init: - shard-dg2-set2: [DMESG-WARN][514] ([Intel XE#1727] / [Intel XE#3343]) -> [SKIP][515] ([Intel XE#1130]) [514]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-435/igt@xe_fault_injection@inject-fault-probe-function-xe_guc_ct_init.html [515]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@xe_fault_injection@inject-fault-probe-function-xe_guc_ct_init.html * igt@xe_fault_injection@inject-fault-probe-function-xe_wopcm_init: - shard-dg2-set2: [SKIP][516] ([Intel XE#1130]) -> [DMESG-WARN][517] ([Intel XE#3343]) [516]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-466/igt@xe_fault_injection@inject-fault-probe-function-xe_wopcm_init.html [517]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-435/igt@xe_fault_injection@inject-fault-probe-function-xe_wopcm_init.html * igt@xe_fault_injection@vm-bind-fail-vm_bind_ioctl_ops_create: - shard-dg2-set2: [DMESG-WARN][518] ([Intel XE#3467]) -> [SKIP][519] ([Intel XE#1130]) [518]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-463/igt@xe_fault_injection@vm-bind-fail-vm_bind_ioctl_ops_create.html [519]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-466/igt@xe_fault_injection@vm-bind-fail-vm_bind_ioctl_ops_create.html * igt@xe_fault_injection@vm-bind-fail-xe_pt_update_ops_run: - shard-dg2-set2: [SKIP][520] ([Intel XE#1130]) -> [DMESG-WARN][521] ([Intel XE#3467]) +1 other test dmesg-warn [520]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-466/igt@xe_fault_injection@vm-bind-fail-xe_pt_update_ops_run.html [521]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-433/igt@xe_fault_injection@vm-bind-fail-xe_pt_update_ops_run.html * igt@xe_fault_injection@vm-bind-fail-xe_vma_ops_alloc: - shard-bmg: [DMESG-FAIL][522] ([Intel XE#3467] / [Intel XE#3468]) -> [FAIL][523] ([Intel XE#3499]) [522]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-4/igt@xe_fault_injection@vm-bind-fail-xe_vma_ops_alloc.html [523]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-1/igt@xe_fault_injection@vm-bind-fail-xe_vma_ops_alloc.html * igt@xe_live_ktest@xe_eudebug: - shard-bmg: [SKIP][524] ([Intel XE#1192]) -> [SKIP][525] ([Intel XE#2833]) [524]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-2/igt@xe_live_ktest@xe_eudebug.html [525]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-1/igt@xe_live_ktest@xe_eudebug.html * igt@xe_mmap@small-bar: - shard-dg2-set2: [SKIP][526] ([Intel XE#512]) -> [SKIP][527] ([Intel XE#1130]) [526]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-463/igt@xe_mmap@small-bar.html [527]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-466/igt@xe_mmap@small-bar.html * igt@xe_oa@closed-fd-and-unmapped-access: - shard-dg2-set2: [SKIP][528] ([Intel XE#3573]) -> [SKIP][529] ([Intel XE#1130]) +12 other tests skip [528]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-435/igt@xe_oa@closed-fd-and-unmapped-access.html [529]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-466/igt@xe_oa@closed-fd-and-unmapped-access.html * igt@xe_oa@syncs-userptr-wait-cfg: - shard-dg2-set2: [SKIP][530] ([Intel XE#1130]) -> [SKIP][531] ([Intel XE#3573]) +7 other tests skip [530]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-466/igt@xe_oa@syncs-userptr-wait-cfg.html [531]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-463/igt@xe_oa@syncs-userptr-wait-cfg.html * igt@xe_pat@display-vs-wb-transient: - shard-dg2-set2: [SKIP][532] ([Intel XE#1337]) -> [SKIP][533] ([Intel XE#1130]) [532]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-463/igt@xe_pat@display-vs-wb-transient.html [533]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@xe_pat@display-vs-wb-transient.html * igt@xe_peer2peer@write: - shard-dg2-set2: [SKIP][534] ([Intel XE#1061]) -> [FAIL][535] ([Intel XE#1173]) [534]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-434/igt@xe_peer2peer@write.html [535]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-433/igt@xe_peer2peer@write.html * igt@xe_pm@s2idle-d3cold-basic-exec: - shard-dg2-set2: [SKIP][536] ([Intel XE#2284] / [Intel XE#366]) -> [SKIP][537] ([Intel XE#1130]) +1 other test skip [536]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-463/igt@xe_pm@s2idle-d3cold-basic-exec.html [537]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-466/igt@xe_pm@s2idle-d3cold-basic-exec.html * igt@xe_pm@s3-d3cold-basic-exec: - shard-dg2-set2: [SKIP][538] ([Intel XE#1130]) -> [SKIP][539] ([Intel XE#2284] / [Intel XE#366]) [538]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-434/igt@xe_pm@s3-d3cold-basic-exec.html [539]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-435/igt@xe_pm@s3-d3cold-basic-exec.html * igt@xe_pm@s3-mocs: - shard-dg2-set2: [DMESG-WARN][540] ([Intel XE#1727] / [Intel XE#3468]) -> [SKIP][541] ([Intel XE#1130]) [540]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-436/igt@xe_pm@s3-mocs.html [541]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-466/igt@xe_pm@s3-mocs.html * igt@xe_pm@s3-vm-bind-prefetch: - shard-bmg: [DMESG-WARN][542] ([Intel XE#1727] / [Intel XE#3468] / [Intel XE#569]) -> [DMESG-WARN][543] ([Intel XE#3468] / [Intel XE#569]) [542]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-bmg-8/igt@xe_pm@s3-vm-bind-prefetch.html [543]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-bmg-6/igt@xe_pm@s3-vm-bind-prefetch.html * igt@xe_pm@s3-vm-bind-unbind-all: - shard-dg2-set2: [SKIP][544] ([Intel XE#1130]) -> [DMESG-WARN][545] ([Intel XE#1727] / [Intel XE#3468] / [Intel XE#569]) +1 other test dmesg-warn [544]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-466/igt@xe_pm@s3-vm-bind-unbind-all.html [545]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-433/igt@xe_pm@s3-vm-bind-unbind-all.html * igt@xe_pm@s4-mocs: - shard-dg2-set2: [DMESG-WARN][546] ([Intel XE#1727] / [Intel XE#2280] / [Intel XE#3468]) -> [SKIP][547] ([Intel XE#1130]) [546]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-435/igt@xe_pm@s4-mocs.html [547]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-466/igt@xe_pm@s4-mocs.html * igt@xe_pm@s4-vm-bind-userptr: - shard-dg2-set2: [SKIP][548] ([Intel XE#1130]) -> [DMESG-WARN][549] ([Intel XE#1727] / [Intel XE#2280] / [Intel XE#3468]) [548]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-466/igt@xe_pm@s4-vm-bind-userptr.html [549]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-463/igt@xe_pm@s4-vm-bind-userptr.html * igt@xe_query@multigpu-query-oa-units: - shard-dg2-set2: [SKIP][550] ([Intel XE#1130]) -> [SKIP][551] ([Intel XE#944]) +2 other tests skip [550]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-466/igt@xe_query@multigpu-query-oa-units.html [551]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-463/igt@xe_query@multigpu-query-oa-units.html * igt@xe_query@multigpu-query-uc-fw-version-guc: - shard-dg2-set2: [SKIP][552] ([Intel XE#944]) -> [SKIP][553] ([Intel XE#1130]) +5 other tests skip [552]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-433/igt@xe_query@multigpu-query-uc-fw-version-guc.html [553]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-466/igt@xe_query@multigpu-query-uc-fw-version-guc.html * igt@xe_sriov_flr@flr-vf1-clear: - shard-dg2-set2: [SKIP][554] ([Intel XE#1130]) -> [SKIP][555] ([Intel XE#3342]) [554]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-434/igt@xe_sriov_flr@flr-vf1-clear.html [555]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-433/igt@xe_sriov_flr@flr-vf1-clear.html * igt@xe_tlb@basic-tlb: - shard-dg2-set2: [FAIL][556] ([Intel XE#2922]) -> [SKIP][557] ([Intel XE#1130]) [556]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8121/shard-dg2-463/igt@xe_tlb@basic-tlb.html [557]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/shard-dg2-434/igt@xe_tlb@basic-tlb.html [Intel XE#1034]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1034 [Intel XE#1061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1061 [Intel XE#1122]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1122 [Intel XE#1123]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1123 [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124 [Intel XE#1127]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1127 [Intel XE#1130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1130 [Intel XE#1135]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1135 [Intel XE#1138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1138 [Intel XE#1152]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1152 [Intel XE#1173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1173 [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178 [Intel XE#1188]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1188 [Intel XE#1192]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1192 [Intel XE#1280]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1280 [Intel XE#1337]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1337 [Intel XE#1340]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1340 [Intel XE#1358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1358 [Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407 [Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424 [Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435 [Intel XE#1471]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1471 [Intel XE#1473]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1473 [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489 [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503 [Intel XE#1600]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1600 [Intel XE#1607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1607 [Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727 [Intel XE#1874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1874 [Intel XE#1885]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1885 [Intel XE#2042]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2042 [Intel XE#2134]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2134 [Intel XE#2136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2136 [Intel XE#2168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2168 [Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191 [Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229 [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234 [Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244 [Intel XE#2248]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2248 [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252 [Intel XE#2280]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2280 [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284 [Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291 [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311 [Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312 [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313 [Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314 [Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316 [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320 [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321 [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322 [Intel XE#2333]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2333 [Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341 [Intel XE#2351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2351 [Intel XE#2360]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2360 [Intel XE#2390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2390 [Intel XE#2392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2392 [Intel XE#2413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2413 [Intel XE#2423]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2423 [Intel XE#2446]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2446 [Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457 [Intel XE#2486]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2486 [Intel XE#2514]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2514 [Intel XE#2566]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2566 [Intel XE#2571]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2571 [Intel XE#2577]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2577 [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652 [Intel XE#2715]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2715 [Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763 [Intel XE#2833]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2833 [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850 [Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288 [Intel XE#2882]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2882 [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887 [Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893 [Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894 [Intel XE#2905]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2905 [Intel XE#2907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2907 [Intel XE#2922]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2922 [Intel XE#2925]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2925 [Intel XE#2927]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2927 [Intel XE#2932]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2932 [Intel XE#2939]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2939 [Intel XE#2961]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2961 [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301 [Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306 [Intel XE#307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/307 [Intel XE#3070]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3070 [Intel XE#308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/308 [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309 [Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316 [Intel XE#3162]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3162 [Intel XE#3184]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3184 [Intel XE#3191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3191 [Intel XE#323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/323 [Intel XE#3249]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3249 [Intel XE#330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/330 [Intel XE#3321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3321 [Intel XE#3339]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3339 [Intel XE#3342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3342 [Intel XE#3343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3343 [Intel XE#3371]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3371 [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414 [Intel XE#3421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3421 [Intel XE#3440]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3440 [Intel XE#3442]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3442 [Intel XE#3453]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3453 [Intel XE#346]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/346 [Intel XE#3467]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3467 [Intel XE#3468]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3468 [Intel XE#3486]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3486 [Intel XE#3487]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3487 [Intel XE#3499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3499 [Intel XE#3515]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3515 [Intel XE#3521]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3521 [Intel XE#3527]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3527 [Intel XE#3546]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3546 [Intel XE#3559]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3559 [Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573 [Intel XE#362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/362 [Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366 [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367 [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373 [Intel XE#374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/374 [Intel XE#402]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/402 [Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455 [Intel XE#512]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/512 [Intel XE#569]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/569 [Intel XE#607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/607 [Intel XE#610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/610 [Intel XE#616]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/616 [Intel XE#619]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/619 [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651 [Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653 [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656 [Intel XE#658]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/658 [Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688 [Intel XE#701]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/701 [Intel XE#703]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/703 [Intel XE#756]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/756 [Intel XE#776]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/776 [Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787 [Intel XE#827]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/827 [Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870 [Intel XE#877]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/877 [Intel XE#886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/886 [Intel XE#899]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/899 [Intel XE#908]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/908 [Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929 [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944 [i915#2575]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2575 Build changes ------------- * IGT: IGT_8121 -> IGTPW_12165 * Linux: xe-2257-e46649e7764a9f6868ccbcba7b8b23b413303380 -> xe-2259-bb17c42521f57b592e9ad49daca1f9f9045d3199 IGTPW_12165: 12165 IGT_8121: 8121 xe-2257-e46649e7764a9f6868ccbcba7b8b23b413303380: e46649e7764a9f6868ccbcba7b8b23b413303380 xe-2259-bb17c42521f57b592e9ad49daca1f9f9045d3199: bb17c42521f57b592e9ad49daca1f9f9045d3199 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12165/index.html [-- Attachment #2: Type: text/html, Size: 167766 bytes --] ^ permalink raw reply [flat|nested] 15+ messages in thread
* ✗ i915.CI.Full: failure for lib/gpgpu_shader: simplify load/store shaders and add Xe3 support 2024-11-21 17:12 [PATCH v3 0/4] lib/gpgpu_shader: simplify load/store shaders and add Xe3 support Andrzej Hajda ` (6 preceding siblings ...) 2024-11-22 12:34 ` ✗ Xe.CI.Full: failure " Patchwork @ 2024-11-24 13:14 ` Patchwork 7 siblings, 0 replies; 15+ messages in thread From: Patchwork @ 2024-11-24 13:14 UTC (permalink / raw) To: Hajda, Andrzej; +Cc: igt-dev == Series Details == Series: lib/gpgpu_shader: simplify load/store shaders and add Xe3 support URL : https://patchwork.freedesktop.org/series/141668/ State : failure == Summary == CI Bug Log - changes from CI_DRM_15727_full -> IGTPW_12165_full ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with IGTPW_12165_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in IGTPW_12165_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/index.html Participating hosts (10 -> 10) ------------------------------ No changes in participating hosts Possible new issues ------------------- Here are the unknown changes that may have been introduced in IGTPW_12165_full: ### IGT changes ### #### Possible regressions #### * igt@gem_ctx_isolation@preservation-s3: - shard-rkl: [PASS][1] -> [DMESG-FAIL][2] +3 other tests dmesg-fail [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-rkl-7/igt@gem_ctx_isolation@preservation-s3.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-2/igt@gem_ctx_isolation@preservation-s3.html * igt@gem_spin_batch@engines: - shard-tglu: [PASS][3] -> [INCOMPLETE][4] +1 other test incomplete [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-tglu-5/igt@gem_spin_batch@engines.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-7/igt@gem_spin_batch@engines.html * igt@gem_tiled_swapping@non-threaded: - shard-snb: [PASS][5] -> [FAIL][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-snb2/igt@gem_tiled_swapping@non-threaded.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-snb1/igt@gem_tiled_swapping@non-threaded.html * igt@kms_cursor_crc@cursor-offscreen-256x85: - shard-rkl: [PASS][7] -> [DMESG-WARN][8] +69 other tests dmesg-warn [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-rkl-5/igt@kms_cursor_crc@cursor-offscreen-256x85.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-3/igt@kms_cursor_crc@cursor-offscreen-256x85.html * igt@kms_flip@2x-flip-vs-modeset-vs-hang: - shard-dg2: NOTRUN -> [SKIP][9] +5 other tests skip [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-2/igt@kms_flip@2x-flip-vs-modeset-vs-hang.html * igt@kms_flip@2x-flip-vs-panning-interruptible: - shard-snb: [PASS][10] -> [INCOMPLETE][11] +1 other test incomplete [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-snb6/igt@kms_flip@2x-flip-vs-panning-interruptible.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-snb1/igt@kms_flip@2x-flip-vs-panning-interruptible.html * igt@kms_flip@flip-vs-fences@a-hdmi-a1: - shard-rkl: NOTRUN -> [DMESG-WARN][12] +10 other tests dmesg-warn [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-2/igt@kms_flip@flip-vs-fences@a-hdmi-a1.html * igt@kms_vblank@ts-continuation-modeset-rpm@pipe-a-hdmi-a-2: - shard-rkl: [PASS][13] -> [SKIP][14] +1 other test skip [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-rkl-5/igt@kms_vblank@ts-continuation-modeset-rpm@pipe-a-hdmi-a-2.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-5/igt@kms_vblank@ts-continuation-modeset-rpm@pipe-a-hdmi-a-2.html * igt@perf@create-destroy-userspace-config: - shard-dg2: [PASS][15] -> [SKIP][16] +1 other test skip [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg2-6/igt@perf@create-destroy-userspace-config.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-11/igt@perf@create-destroy-userspace-config.html #### Warnings #### * igt@device_reset@unbind-cold-reset-rebind: - shard-dg2: [SKIP][17] ([i915#11078]) -> [SKIP][18] [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg2-10/igt@device_reset@unbind-cold-reset-rebind.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-11/igt@device_reset@unbind-cold-reset-rebind.html * igt@i915_selftest@live: - shard-rkl: [ABORT][19] -> [DMESG-FAIL][20] [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-rkl-7/igt@i915_selftest@live.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-3/igt@i915_selftest@live.html * igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset: - shard-dg2: [SKIP][21] ([i915#2575]) -> [SKIP][22] +4 other tests skip [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg2-11/igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-2/igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset.html * igt@perf@non-zero-reason: - shard-dg2: [FAIL][23] ([i915#9100]) -> [SKIP][24] [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg2-1/igt@perf@non-zero-reason.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-11/igt@perf@non-zero-reason.html #### Suppressed #### The following results come from untrusted machines, tests, or statuses. They do not affect the overall result. * igt@kms_flip@2x-flip-vs-blocking-wf-vblank: - {shard-dg2-9}: NOTRUN -> [SKIP][25] +4 other tests skip [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-9/igt@kms_flip@2x-flip-vs-blocking-wf-vblank.html Known issues ------------ Here are the changes found in IGTPW_12165_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@api_intel_bb@blit-reloc-keep-cache: - shard-dg1: NOTRUN -> [SKIP][26] ([i915#8411]) +1 other test skip [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-18/igt@api_intel_bb@blit-reloc-keep-cache.html - shard-dg2: NOTRUN -> [SKIP][27] ([i915#8411]) [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-3/igt@api_intel_bb@blit-reloc-keep-cache.html * igt@core_getversion@all-cards: - shard-dg2: [PASS][28] -> [FAIL][29] ([i915#12869]) [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg2-2/igt@core_getversion@all-cards.html [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-11/igt@core_getversion@all-cards.html * igt@device_reset@cold-reset-bound: - shard-tglu-1: NOTRUN -> [SKIP][30] ([i915#11078]) [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-1/igt@device_reset@cold-reset-bound.html * igt@device_reset@unbind-reset-rebind: - shard-tglu: NOTRUN -> [ABORT][31] ([i915#12817] / [i915#5507]) [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-9/igt@device_reset@unbind-reset-rebind.html * igt@drm_fdinfo@all-busy-check-all: - shard-dg2: NOTRUN -> [SKIP][32] ([i915#8414]) +1 other test skip [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-6/igt@drm_fdinfo@all-busy-check-all.html * igt@drm_fdinfo@busy@vcs1: - shard-dg1: NOTRUN -> [SKIP][33] ([i915#8414]) +14 other tests skip [33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-13/igt@drm_fdinfo@busy@vcs1.html * igt@fbdev@eof: - shard-dg2: [PASS][34] -> [SKIP][35] ([i915#2582]) [34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg2-4/igt@fbdev@eof.html [35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-11/igt@fbdev@eof.html * igt@gem_ccs@block-copy-compressed: - shard-dg1: NOTRUN -> [SKIP][36] ([i915#3555] / [i915#9323]) +1 other test skip [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-17/igt@gem_ccs@block-copy-compressed.html - shard-rkl: NOTRUN -> [SKIP][37] ([i915#3555] / [i915#9323]) [37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-5/igt@gem_ccs@block-copy-compressed.html * igt@gem_ccs@block-multicopy-compressed: - shard-tglu-1: NOTRUN -> [SKIP][38] ([i915#9323]) [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-1/igt@gem_ccs@block-multicopy-compressed.html * igt@gem_ccs@ctrl-surf-copy: - shard-tglu: NOTRUN -> [SKIP][39] ([i915#3555] / [i915#9323]) [39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-9/igt@gem_ccs@ctrl-surf-copy.html * igt@gem_ccs@suspend-resume: - shard-tglu: NOTRUN -> [SKIP][40] ([i915#9323]) [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-9/igt@gem_ccs@suspend-resume.html * igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-smem-lmem0: - shard-dg2: NOTRUN -> [INCOMPLETE][41] ([i915#7297]) [41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-1/igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-smem-lmem0.html * igt@gem_close_race@multigpu-basic-process: - shard-dg1: NOTRUN -> [SKIP][42] ([i915#7697]) [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-13/igt@gem_close_race@multigpu-basic-process.html * igt@gem_create@create-ext-set-pat: - shard-tglu-1: NOTRUN -> [SKIP][43] ([i915#8562]) [43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-1/igt@gem_create@create-ext-set-pat.html * igt@gem_ctx_persistence@hang: - shard-dg2: NOTRUN -> [SKIP][44] ([i915#8555]) [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-2/igt@gem_ctx_persistence@hang.html * igt@gem_ctx_persistence@heartbeat-hang: - shard-dg1: NOTRUN -> [SKIP][45] ([i915#8555]) [45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-13/igt@gem_ctx_persistence@heartbeat-hang.html * igt@gem_ctx_persistence@legacy-engines-queued: - shard-snb: NOTRUN -> [SKIP][46] ([i915#1099]) +2 other tests skip [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-snb7/igt@gem_ctx_persistence@legacy-engines-queued.html * igt@gem_ctx_sseu@invalid-args: - shard-dg1: NOTRUN -> [SKIP][47] ([i915#280]) [47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-17/igt@gem_ctx_sseu@invalid-args.html * igt@gem_ctx_sseu@invalid-sseu: - shard-tglu: NOTRUN -> [SKIP][48] ([i915#280]) [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-4/igt@gem_ctx_sseu@invalid-sseu.html * igt@gem_exec_balancer@bonded-dual: - shard-dg2: NOTRUN -> [SKIP][49] ([i915#4771]) [49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-4/igt@gem_exec_balancer@bonded-dual.html * igt@gem_exec_balancer@bonded-sync: - shard-dg1: NOTRUN -> [SKIP][50] ([i915#4771]) +1 other test skip [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-12/igt@gem_exec_balancer@bonded-sync.html * igt@gem_exec_balancer@hog: - shard-dg2: NOTRUN -> [SKIP][51] ([i915#4812]) [51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-7/igt@gem_exec_balancer@hog.html * igt@gem_exec_flush@basic-wb-set-default: - shard-dg2: NOTRUN -> [SKIP][52] ([i915#3539] / [i915#4852]) [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-5/igt@gem_exec_flush@basic-wb-set-default.html * igt@gem_exec_reloc@basic-gtt-read: - shard-dg2: NOTRUN -> [SKIP][53] ([i915#3281]) +6 other tests skip [53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-3/igt@gem_exec_reloc@basic-gtt-read.html * igt@gem_exec_reloc@basic-gtt-read-noreloc: - shard-rkl: NOTRUN -> [SKIP][54] ([i915#3281]) +5 other tests skip [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-2/igt@gem_exec_reloc@basic-gtt-read-noreloc.html * igt@gem_exec_reloc@basic-wc-read: - shard-dg1: NOTRUN -> [SKIP][55] ([i915#3281]) +11 other tests skip [55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-14/igt@gem_exec_reloc@basic-wc-read.html * igt@gem_exec_schedule@preempt-queue: - shard-dg1: NOTRUN -> [SKIP][56] ([i915#4812]) +1 other test skip [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-12/igt@gem_exec_schedule@preempt-queue.html * igt@gem_exec_suspend@basic-s4-devices: - shard-rkl: NOTRUN -> [ABORT][57] ([i915#7975] / [i915#8213]) +1 other test abort [57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-5/igt@gem_exec_suspend@basic-s4-devices.html * igt@gem_fence_thrash@bo-write-verify-x: - shard-dg2: NOTRUN -> [SKIP][58] ([i915#4860]) +2 other tests skip [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-7/igt@gem_fence_thrash@bo-write-verify-x.html * igt@gem_fenced_exec_thrash@no-spare-fences: - shard-dg1: NOTRUN -> [SKIP][59] ([i915#4860]) +2 other tests skip [59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-12/igt@gem_fenced_exec_thrash@no-spare-fences.html * igt@gem_huc_copy@huc-copy: - shard-tglu: NOTRUN -> [SKIP][60] ([i915#2190]) [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-9/igt@gem_huc_copy@huc-copy.html - shard-glk: NOTRUN -> [SKIP][61] ([i915#2190]) [61]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-glk4/igt@gem_huc_copy@huc-copy.html * igt@gem_lmem_swapping@massive-random: - shard-tglu-1: NOTRUN -> [SKIP][62] ([i915#4613]) [62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-1/igt@gem_lmem_swapping@massive-random.html * igt@gem_lmem_swapping@random: - shard-glk: NOTRUN -> [SKIP][63] ([i915#4613]) +1 other test skip [63]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-glk9/igt@gem_lmem_swapping@random.html * igt@gem_lmem_swapping@verify: - shard-dg2: [PASS][64] -> [SKIP][65] ([i915#12936]) +2 other tests skip [64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg2-1/igt@gem_lmem_swapping@verify.html [65]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-11/igt@gem_lmem_swapping@verify.html * igt@gem_lmem_swapping@verify-ccs: - shard-tglu: NOTRUN -> [SKIP][66] ([i915#4613]) +5 other tests skip [66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-7/igt@gem_lmem_swapping@verify-ccs.html * igt@gem_lmem_swapping@verify-random: - shard-dg2: NOTRUN -> [SKIP][67] ([i915#12936]) [67]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-11/igt@gem_lmem_swapping@verify-random.html - shard-rkl: NOTRUN -> [SKIP][68] ([i915#4613]) +2 other tests skip [68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-1/igt@gem_lmem_swapping@verify-random.html * igt@gem_lmem_swapping@verify-random-ccs: - shard-dg1: NOTRUN -> [SKIP][69] ([i915#12193]) +1 other test skip [69]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-13/igt@gem_lmem_swapping@verify-random-ccs.html * igt@gem_lmem_swapping@verify-random-ccs@lmem0: - shard-dg1: NOTRUN -> [SKIP][70] ([i915#4565]) +1 other test skip [70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-13/igt@gem_lmem_swapping@verify-random-ccs@lmem0.html * igt@gem_mmap_gtt@big-bo-tiledx: - shard-dg2: NOTRUN -> [SKIP][71] ([i915#4077]) +2 other tests skip [71]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-10/igt@gem_mmap_gtt@big-bo-tiledx.html * igt@gem_mmap_gtt@coherency: - shard-dg1: NOTRUN -> [SKIP][72] ([i915#4077]) +11 other tests skip [72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-12/igt@gem_mmap_gtt@coherency.html * igt@gem_mmap_wc@read: - shard-dg1: NOTRUN -> [SKIP][73] ([i915#4083]) +4 other tests skip [73]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-14/igt@gem_mmap_wc@read.html * igt@gem_partial_pwrite_pread@reads: - shard-dg1: NOTRUN -> [SKIP][74] ([i915#3282]) +3 other tests skip [74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-17/igt@gem_partial_pwrite_pread@reads.html * igt@gem_pwrite@basic-exhaustion: - shard-tglu: NOTRUN -> [WARN][75] ([i915#2658]) [75]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-8/igt@gem_pwrite@basic-exhaustion.html * igt@gem_pxp@create-regular-buffer: - shard-rkl: NOTRUN -> [TIMEOUT][76] ([i915#12917]) +1 other test timeout [76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-2/igt@gem_pxp@create-regular-buffer.html * igt@gem_pxp@create-regular-context-1: - shard-dg2: NOTRUN -> [SKIP][77] ([i915#4270]) +2 other tests skip [77]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-10/igt@gem_pxp@create-regular-context-1.html * igt@gem_pxp@protected-encrypted-src-copy-not-readible: - shard-dg1: NOTRUN -> [SKIP][78] ([i915#4270]) +5 other tests skip [78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-14/igt@gem_pxp@protected-encrypted-src-copy-not-readible.html * igt@gem_pxp@protected-raw-src-copy-not-readible: - shard-tglu: [PASS][79] -> [SKIP][80] ([i915#4270]) [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-tglu-9/igt@gem_pxp@protected-raw-src-copy-not-readible.html [80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-9/igt@gem_pxp@protected-raw-src-copy-not-readible.html * igt@gem_render_copy@y-tiled-mc-ccs-to-yf-tiled-ccs: - shard-dg2: NOTRUN -> [SKIP][81] ([i915#2575] / [i915#5190]) +1 other test skip [81]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-11/igt@gem_render_copy@y-tiled-mc-ccs-to-yf-tiled-ccs.html * igt@gem_render_copy@y-tiled-to-vebox-y-tiled: - shard-dg2: NOTRUN -> [SKIP][82] ([i915#5190] / [i915#8428]) +4 other tests skip [82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-10/igt@gem_render_copy@y-tiled-to-vebox-y-tiled.html * igt@gem_set_tiling_vs_blt@tiled-to-untiled: - shard-dg2: NOTRUN -> [SKIP][83] ([i915#4079]) [83]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-7/igt@gem_set_tiling_vs_blt@tiled-to-untiled.html * igt@gem_softpin@evict-snoop: - shard-dg2: NOTRUN -> [SKIP][84] ([i915#4885]) [84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-6/igt@gem_softpin@evict-snoop.html * igt@gem_tiled_pread_pwrite: - shard-dg1: NOTRUN -> [SKIP][85] ([i915#4079]) +1 other test skip [85]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-18/igt@gem_tiled_pread_pwrite.html * igt@gem_userptr_blits@create-destroy-unsync: - shard-rkl: NOTRUN -> [SKIP][86] ([i915#3297]) [86]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-4/igt@gem_userptr_blits@create-destroy-unsync.html - shard-tglu-1: NOTRUN -> [SKIP][87] ([i915#3297]) +2 other tests skip [87]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-1/igt@gem_userptr_blits@create-destroy-unsync.html * igt@gem_userptr_blits@dmabuf-sync: - shard-tglu: NOTRUN -> [SKIP][88] ([i915#3297] / [i915#3323]) [88]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-7/igt@gem_userptr_blits@dmabuf-sync.html * igt@gem_userptr_blits@map-fixed-invalidate-busy: - shard-dg1: NOTRUN -> [SKIP][89] ([i915#3297] / [i915#4880]) [89]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-13/igt@gem_userptr_blits@map-fixed-invalidate-busy.html * igt@gem_userptr_blits@unsync-unmap-after-close: - shard-dg1: NOTRUN -> [SKIP][90] ([i915#3297]) +2 other tests skip [90]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-18/igt@gem_userptr_blits@unsync-unmap-after-close.html - shard-dg2: NOTRUN -> [SKIP][91] ([i915#3297]) [91]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-6/igt@gem_userptr_blits@unsync-unmap-after-close.html * igt@gem_userptr_blits@unsync-unmap-cycles: - shard-tglu: NOTRUN -> [SKIP][92] ([i915#3297]) +1 other test skip [92]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-7/igt@gem_userptr_blits@unsync-unmap-cycles.html * igt@gen9_exec_parse@batch-without-end: - shard-dg2: NOTRUN -> [SKIP][93] ([i915#2856]) [93]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-6/igt@gen9_exec_parse@batch-without-end.html - shard-rkl: NOTRUN -> [SKIP][94] ([i915#2527]) [94]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-3/igt@gen9_exec_parse@batch-without-end.html * igt@gen9_exec_parse@bb-secure: - shard-tglu: NOTRUN -> [SKIP][95] ([i915#2527] / [i915#2856]) +3 other tests skip [95]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-7/igt@gen9_exec_parse@bb-secure.html * igt@gen9_exec_parse@bb-start-cmd: - shard-dg1: NOTRUN -> [SKIP][96] ([i915#2527]) +4 other tests skip [96]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-12/igt@gen9_exec_parse@bb-start-cmd.html * igt@gen9_exec_parse@unaligned-access: - shard-tglu-1: NOTRUN -> [SKIP][97] ([i915#2527] / [i915#2856]) +1 other test skip [97]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-1/igt@gen9_exec_parse@unaligned-access.html * igt@i915_module_load@reload: - shard-snb: [PASS][98] -> [ABORT][99] ([i915#12450]) [98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-snb6/igt@i915_module_load@reload.html [99]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-snb2/igt@i915_module_load@reload.html * igt@i915_module_load@reload-with-fault-injection: - shard-rkl: [PASS][100] -> [ABORT][101] ([i915#9820]) [100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-rkl-4/igt@i915_module_load@reload-with-fault-injection.html [101]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-7/igt@i915_module_load@reload-with-fault-injection.html - shard-dg1: NOTRUN -> [ABORT][102] ([i915#9820]) [102]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-14/igt@i915_module_load@reload-with-fault-injection.html - shard-tglu: [PASS][103] -> [ABORT][104] ([i915#12817] / [i915#9820]) [103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-tglu-3/igt@i915_module_load@reload-with-fault-injection.html [104]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-2/igt@i915_module_load@reload-with-fault-injection.html - shard-dg2: NOTRUN -> [ABORT][105] ([i915#9820]) [105]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-4/igt@i915_module_load@reload-with-fault-injection.html * igt@i915_pm_freq_api@freq-basic-api: - shard-tglu: NOTRUN -> [SKIP][106] ([i915#8399]) +2 other tests skip [106]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-9/igt@i915_pm_freq_api@freq-basic-api.html * igt@i915_pm_freq_api@freq-suspend: - shard-tglu-1: NOTRUN -> [SKIP][107] ([i915#8399]) [107]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-1/igt@i915_pm_freq_api@freq-suspend.html * igt@i915_pm_freq_mult@media-freq@gt0: - shard-dg1: NOTRUN -> [SKIP][108] ([i915#6590]) +1 other test skip [108]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-12/igt@i915_pm_freq_mult@media-freq@gt0.html - shard-tglu: NOTRUN -> [SKIP][109] ([i915#6590]) +1 other test skip [109]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-8/igt@i915_pm_freq_mult@media-freq@gt0.html * igt@i915_pm_rc6_residency@rc6-accuracy: - shard-rkl: [PASS][110] -> [FAIL][111] ([i915#12942]) +1 other test fail [110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-rkl-4/igt@i915_pm_rc6_residency@rc6-accuracy.html [111]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-2/igt@i915_pm_rc6_residency@rc6-accuracy.html * igt@i915_pm_rps@min-max-config-idle: - shard-dg2: NOTRUN -> [SKIP][112] ([i915#11681] / [i915#6621]) [112]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-6/igt@i915_pm_rps@min-max-config-idle.html * igt@i915_pm_rps@thresholds-idle: - shard-dg1: NOTRUN -> [SKIP][113] ([i915#11681]) [113]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-17/igt@i915_pm_rps@thresholds-idle.html * igt@i915_pm_rps@waitboost: - shard-dg2: [PASS][114] -> [SKIP][115] ([i915#2575]) +177 other tests skip [114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg2-1/igt@i915_pm_rps@waitboost.html [115]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-11/igt@i915_pm_rps@waitboost.html * igt@i915_pm_sseu@full-enable: - shard-dg1: NOTRUN -> [SKIP][116] ([i915#4387]) [116]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-13/igt@i915_pm_sseu@full-enable.html - shard-tglu: NOTRUN -> [SKIP][117] ([i915#4387]) [117]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-4/igt@i915_pm_sseu@full-enable.html * igt@i915_query@test-query-geometry-subslices: - shard-rkl: NOTRUN -> [SKIP][118] ([i915#5723]) [118]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-1/igt@i915_query@test-query-geometry-subslices.html - shard-dg1: NOTRUN -> [SKIP][119] ([i915#5723]) [119]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-13/igt@i915_query@test-query-geometry-subslices.html * igt@i915_selftest@mock@memory_region: - shard-tglu-1: NOTRUN -> [DMESG-WARN][120] ([i915#9311]) +1 other test dmesg-warn [120]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-1/igt@i915_selftest@mock@memory_region.html - shard-dg1: NOTRUN -> [DMESG-WARN][121] ([i915#9311]) +1 other test dmesg-warn [121]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-18/igt@i915_selftest@mock@memory_region.html * igt@i915_selftest@perf: - shard-dg2: [PASS][122] -> [FAIL][123] ([i915#12867]) +4 other tests fail [122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg2-10/igt@i915_selftest@perf.html [123]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-11/igt@i915_selftest@perf.html * igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy: - shard-dg2: NOTRUN -> [SKIP][124] ([i915#4212]) [124]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-7/igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy.html * igt@kms_addfb_basic@clobberred-modifier: - shard-dg1: NOTRUN -> [SKIP][125] ([i915#4212]) +1 other test skip [125]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-13/igt@kms_addfb_basic@clobberred-modifier.html * igt@kms_async_flips@invalid-async-flip: - shard-dg2: NOTRUN -> [SKIP][126] ([i915#6228]) [126]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-2/igt@kms_async_flips@invalid-async-flip.html * igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels: - shard-tglu: NOTRUN -> [SKIP][127] ([i915#1769] / [i915#3555]) [127]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-7/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html * igt@kms_big_fb@4-tiled-16bpp-rotate-90: - shard-dg1: NOTRUN -> [SKIP][128] ([i915#4538] / [i915#5286]) +3 other tests skip [128]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-12/igt@kms_big_fb@4-tiled-16bpp-rotate-90.html * igt@kms_big_fb@4-tiled-32bpp-rotate-270: - shard-tglu: NOTRUN -> [SKIP][129] ([i915#5286]) +6 other tests skip [129]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-8/igt@kms_big_fb@4-tiled-32bpp-rotate-270.html * igt@kms_big_fb@4-tiled-64bpp-rotate-0: - shard-tglu-1: NOTRUN -> [SKIP][130] ([i915#5286]) +1 other test skip [130]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-1/igt@kms_big_fb@4-tiled-64bpp-rotate-0.html * igt@kms_big_fb@4-tiled-64bpp-rotate-270: - shard-rkl: NOTRUN -> [SKIP][131] ([i915#5286]) +1 other test skip [131]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-5/igt@kms_big_fb@4-tiled-64bpp-rotate-270.html * igt@kms_big_fb@4-tiled-addfb-size-overflow: - shard-dg1: NOTRUN -> [SKIP][132] ([i915#5286]) +1 other test skip [132]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-13/igt@kms_big_fb@4-tiled-addfb-size-overflow.html * igt@kms_big_fb@y-tiled-16bpp-rotate-270: - shard-dg2: NOTRUN -> [SKIP][133] ([i915#5190]) +4 other tests skip [133]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-11/igt@kms_big_fb@y-tiled-16bpp-rotate-270.html * igt@kms_big_fb@y-tiled-64bpp-rotate-0: - shard-dg2: NOTRUN -> [SKIP][134] ([i915#4538] / [i915#5190]) +5 other tests skip [134]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-3/igt@kms_big_fb@y-tiled-64bpp-rotate-0.html * igt@kms_big_fb@y-tiled-64bpp-rotate-270: - shard-rkl: NOTRUN -> [SKIP][135] ([i915#3638]) +1 other test skip [135]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-2/igt@kms_big_fb@y-tiled-64bpp-rotate-270.html - shard-dg1: NOTRUN -> [SKIP][136] ([i915#3638]) +5 other tests skip [136]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-13/igt@kms_big_fb@y-tiled-64bpp-rotate-270.html * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-async-flip: - shard-dg1: NOTRUN -> [SKIP][137] ([i915#4538]) +5 other tests skip [137]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-17/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html * igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs: - shard-dg2: NOTRUN -> [SKIP][138] ([i915#12313]) +1 other test skip [138]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-4/igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs.html - shard-rkl: NOTRUN -> [SKIP][139] ([i915#12313]) [139]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-2/igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs.html * igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-mc-ccs@pipe-c-hdmi-a-2: - shard-glk: NOTRUN -> [SKIP][140] +170 other tests skip [140]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-glk9/igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-mc-ccs@pipe-c-hdmi-a-2.html * igt@kms_ccs@ccs-on-another-bo-yf-tiled-ccs@pipe-a-hdmi-a-3: - shard-dg2: NOTRUN -> [SKIP][141] ([i915#10307] / [i915#6095]) +128 other tests skip [141]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-5/igt@kms_ccs@ccs-on-another-bo-yf-tiled-ccs@pipe-a-hdmi-a-3.html * igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs: - shard-tglu: NOTRUN -> [SKIP][142] ([i915#12313]) [142]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-8/igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs.html * igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs: - shard-dg1: NOTRUN -> [SKIP][143] ([i915#12805]) [143]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-13/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs.html - shard-tglu: NOTRUN -> [SKIP][144] ([i915#12805]) [144]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-6/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs.html * igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs@pipe-c-hdmi-a-1: - shard-dg2: NOTRUN -> [SKIP][145] ([i915#6095]) +11 other tests skip [145]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-8/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs@pipe-c-hdmi-a-1.html * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs: - shard-dg1: NOTRUN -> [SKIP][146] ([i915#12313]) +1 other test skip [146]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-18/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs.html * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs-cc@pipe-b-hdmi-a-1: - shard-tglu: NOTRUN -> [SKIP][147] ([i915#6095]) +74 other tests skip [147]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-2/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs-cc@pipe-b-hdmi-a-1.html * igt@kms_ccs@crc-sprite-planes-basic-yf-tiled-ccs@pipe-a-hdmi-a-1: - shard-tglu-1: NOTRUN -> [SKIP][148] ([i915#6095]) +29 other tests skip [148]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-1/igt@kms_ccs@crc-sprite-planes-basic-yf-tiled-ccs@pipe-a-hdmi-a-1.html * igt@kms_ccs@random-ccs-data-4-tiled-bmg-ccs: - shard-tglu-1: NOTRUN -> [SKIP][149] ([i915#12313]) [149]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-1/igt@kms_ccs@random-ccs-data-4-tiled-bmg-ccs.html * igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2: - shard-rkl: NOTRUN -> [SKIP][150] ([i915#6095]) +82 other tests skip [150]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-1/igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2.html * igt@kms_ccs@random-ccs-data-yf-tiled-ccs@pipe-a-hdmi-a-3: - shard-dg1: NOTRUN -> [SKIP][151] ([i915#6095]) +152 other tests skip [151]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-13/igt@kms_ccs@random-ccs-data-yf-tiled-ccs@pipe-a-hdmi-a-3.html * igt@kms_ccs@random-ccs-data-yf-tiled-ccs@pipe-d-hdmi-a-1: - shard-dg2: NOTRUN -> [SKIP][152] ([i915#10307] / [i915#10434] / [i915#6095]) [152]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-4/igt@kms_ccs@random-ccs-data-yf-tiled-ccs@pipe-d-hdmi-a-1.html * igt@kms_cdclk@mode-transition-all-outputs: - shard-dg1: NOTRUN -> [SKIP][153] ([i915#3742]) [153]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-13/igt@kms_cdclk@mode-transition-all-outputs.html - shard-rkl: NOTRUN -> [SKIP][154] ([i915#3742]) [154]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-7/igt@kms_cdclk@mode-transition-all-outputs.html * igt@kms_cdclk@plane-scaling: - shard-tglu-1: NOTRUN -> [SKIP][155] ([i915#3742]) [155]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-1/igt@kms_cdclk@plane-scaling.html * igt@kms_chamelium_edid@hdmi-edid-change-during-suspend: - shard-dg1: NOTRUN -> [SKIP][156] ([i915#7828]) +11 other tests skip [156]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-13/igt@kms_chamelium_edid@hdmi-edid-change-during-suspend.html * igt@kms_chamelium_hpd@dp-hpd-enable-disable-mode: - shard-rkl: NOTRUN -> [SKIP][157] ([i915#7828]) +5 other tests skip [157]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-5/igt@kms_chamelium_hpd@dp-hpd-enable-disable-mode.html * igt@kms_chamelium_hpd@dp-hpd-storm: - shard-tglu-1: NOTRUN -> [SKIP][158] ([i915#7828]) +3 other tests skip [158]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-1/igt@kms_chamelium_hpd@dp-hpd-storm.html * igt@kms_chamelium_hpd@dp-hpd-with-enabled-mode: - shard-dg2: NOTRUN -> [SKIP][159] ([i915#7828]) +6 other tests skip [159]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-5/igt@kms_chamelium_hpd@dp-hpd-with-enabled-mode.html * igt@kms_chamelium_hpd@hdmi-hpd-for-each-pipe: - shard-tglu: NOTRUN -> [SKIP][160] ([i915#7828]) +10 other tests skip [160]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-2/igt@kms_chamelium_hpd@hdmi-hpd-for-each-pipe.html * igt@kms_content_protection@atomic-dpms: - shard-rkl: NOTRUN -> [SKIP][161] ([i915#7118] / [i915#9424]) [161]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-5/igt@kms_content_protection@atomic-dpms.html * igt@kms_content_protection@atomic@pipe-a-dp-4: - shard-dg2: NOTRUN -> [TIMEOUT][162] ([i915#7173]) [162]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-10/igt@kms_content_protection@atomic@pipe-a-dp-4.html * igt@kms_content_protection@dp-mst-type-1: - shard-dg1: NOTRUN -> [SKIP][163] ([i915#3299]) +1 other test skip [163]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-13/igt@kms_content_protection@dp-mst-type-1.html - shard-dg2: NOTRUN -> [SKIP][164] ([i915#3299]) [164]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-10/igt@kms_content_protection@dp-mst-type-1.html * igt@kms_content_protection@mei-interface: - shard-tglu: NOTRUN -> [SKIP][165] ([i915#6944] / [i915#9424]) [165]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-9/igt@kms_content_protection@mei-interface.html * igt@kms_content_protection@srm: - shard-tglu-1: NOTRUN -> [SKIP][166] ([i915#6944] / [i915#7116] / [i915#7118]) [166]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-1/igt@kms_content_protection@srm.html * igt@kms_content_protection@uevent: - shard-dg2: NOTRUN -> [SKIP][167] ([i915#7118] / [i915#9424]) +1 other test skip [167]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-5/igt@kms_content_protection@uevent.html - shard-dg1: NOTRUN -> [SKIP][168] ([i915#7116] / [i915#9424]) +1 other test skip [168]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-12/igt@kms_content_protection@uevent.html * igt@kms_cursor_crc@cursor-offscreen-512x170: - shard-tglu: NOTRUN -> [SKIP][169] ([i915#12976]) +3 other tests skip [169]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-3/igt@kms_cursor_crc@cursor-offscreen-512x170.html * igt@kms_cursor_crc@cursor-onscreen-512x170: - shard-dg1: NOTRUN -> [SKIP][170] ([i915#12976]) +1 other test skip [170]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-13/igt@kms_cursor_crc@cursor-onscreen-512x170.html * igt@kms_cursor_crc@cursor-onscreen-512x512: - shard-tglu-1: NOTRUN -> [SKIP][171] ([i915#12976]) +1 other test skip [171]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-1/igt@kms_cursor_crc@cursor-onscreen-512x512.html * igt@kms_cursor_crc@cursor-rapid-movement-max-size: - shard-dg2: NOTRUN -> [SKIP][172] ([i915#2575]) +49 other tests skip [172]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-11/igt@kms_cursor_crc@cursor-rapid-movement-max-size.html * igt@kms_cursor_edge_walk@64x64-top-edge: - shard-rkl: [PASS][173] -> [DMESG-WARN][174] ([i915#12917]) [173]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-rkl-7/igt@kms_cursor_edge_walk@64x64-top-edge.html [174]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-1/igt@kms_cursor_edge_walk@64x64-top-edge.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - shard-dg1: NOTRUN -> [SKIP][175] ([i915#4103] / [i915#4213]) [175]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-12/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html - shard-tglu: NOTRUN -> [SKIP][176] ([i915#4103]) +1 other test skip [176]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html * igt@kms_cursor_legacy@cursorb-vs-flipb-legacy: - shard-dg1: NOTRUN -> [SKIP][177] ([i915#4423]) [177]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-13/igt@kms_cursor_legacy@cursorb-vs-flipb-legacy.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions: - shard-glk: NOTRUN -> [FAIL][178] ([i915#2346]) [178]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-glk4/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html * igt@kms_dirtyfb@drrs-dirtyfb-ioctl: - shard-dg2: NOTRUN -> [SKIP][179] ([i915#9833]) [179]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-5/igt@kms_dirtyfb@drrs-dirtyfb-ioctl.html * igt@kms_dirtyfb@psr-dirtyfb-ioctl: - shard-tglu: NOTRUN -> [SKIP][180] ([i915#9723]) [180]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-10/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html * igt@kms_display_modes@mst-extended-mode-negative: - shard-rkl: NOTRUN -> [SKIP][181] ([i915#8588]) [181]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-4/igt@kms_display_modes@mst-extended-mode-negative.html - shard-dg1: NOTRUN -> [SKIP][182] ([i915#8588]) [182]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-12/igt@kms_display_modes@mst-extended-mode-negative.html * igt@kms_dp_aux_dev: - shard-dg1: NOTRUN -> [SKIP][183] ([i915#1257]) [183]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-17/igt@kms_dp_aux_dev.html * igt@kms_dp_linktrain_fallback@dp-fallback: - shard-tglu-1: NOTRUN -> [SKIP][184] ([i915#12402]) [184]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-1/igt@kms_dp_linktrain_fallback@dp-fallback.html * igt@kms_dsc@dsc-fractional-bpp: - shard-tglu: NOTRUN -> [SKIP][185] ([i915#3840]) +1 other test skip [185]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-4/igt@kms_dsc@dsc-fractional-bpp.html * igt@kms_dsc@dsc-fractional-bpp-with-bpc: - shard-dg2: NOTRUN -> [SKIP][186] ([i915#3840]) [186]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-6/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html - shard-rkl: NOTRUN -> [SKIP][187] ([i915#3840]) [187]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-2/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html * igt@kms_dsc@dsc-with-bpc: - shard-dg1: NOTRUN -> [SKIP][188] ([i915#3555] / [i915#3840]) [188]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-18/igt@kms_dsc@dsc-with-bpc.html * igt@kms_dsc@dsc-with-output-formats: - shard-tglu: NOTRUN -> [SKIP][189] ([i915#3555] / [i915#3840]) [189]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-8/igt@kms_dsc@dsc-with-output-formats.html * igt@kms_dsc@dsc-with-output-formats-with-bpc: - shard-dg1: NOTRUN -> [SKIP][190] ([i915#3840] / [i915#9053]) [190]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-14/igt@kms_dsc@dsc-with-output-formats-with-bpc.html * igt@kms_fbcon_fbt@psr: - shard-tglu-1: NOTRUN -> [SKIP][191] ([i915#3469]) [191]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-1/igt@kms_fbcon_fbt@psr.html * igt@kms_feature_discovery@display-4x: - shard-rkl: NOTRUN -> [SKIP][192] ([i915#1839]) [192]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-3/igt@kms_feature_discovery@display-4x.html - shard-dg2: NOTRUN -> [SKIP][193] ([i915#1839]) [193]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-2/igt@kms_feature_discovery@display-4x.html * igt@kms_flip@2x-flip-vs-absolute-wf_vblank-interruptible@ab-vga1-hdmi-a1: - shard-snb: [PASS][194] -> [FAIL][195] ([i915#2122]) +10 other tests fail [194]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-snb4/igt@kms_flip@2x-flip-vs-absolute-wf_vblank-interruptible@ab-vga1-hdmi-a1.html [195]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-snb6/igt@kms_flip@2x-flip-vs-absolute-wf_vblank-interruptible@ab-vga1-hdmi-a1.html * igt@kms_flip@2x-flip-vs-blocking-wf-vblank: - shard-tglu-1: NOTRUN -> [SKIP][196] ([i915#3637]) +3 other tests skip [196]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-1/igt@kms_flip@2x-flip-vs-blocking-wf-vblank.html * igt@kms_flip@2x-flip-vs-expired-vblank: - shard-rkl: NOTRUN -> [SKIP][197] ([i915#9934]) +1 other test skip [197]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-1/igt@kms_flip@2x-flip-vs-expired-vblank.html * igt@kms_flip@2x-flip-vs-fences: - shard-dg1: NOTRUN -> [SKIP][198] ([i915#8381]) [198]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-12/igt@kms_flip@2x-flip-vs-fences.html * igt@kms_flip@2x-flip-vs-modeset: - shard-tglu: NOTRUN -> [SKIP][199] ([i915#3637]) +9 other tests skip [199]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-8/igt@kms_flip@2x-flip-vs-modeset.html * igt@kms_flip@2x-plain-flip: - shard-dg1: NOTRUN -> [SKIP][200] ([i915#9934]) +7 other tests skip [200]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-18/igt@kms_flip@2x-plain-flip.html * igt@kms_flip@blocking-wf_vblank: - shard-glk: NOTRUN -> [FAIL][201] ([i915#2122]) +3 other tests fail [201]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-glk8/igt@kms_flip@blocking-wf_vblank.html - shard-dg2: [PASS][202] -> [FAIL][203] ([i915#2122]) [202]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg2-8/igt@kms_flip@blocking-wf_vblank.html [203]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-2/igt@kms_flip@blocking-wf_vblank.html - shard-rkl: [PASS][204] -> [FAIL][205] ([i915#11989] / [i915#12840] / [i915#2122]) [204]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-rkl-5/igt@kms_flip@blocking-wf_vblank.html [205]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-3/igt@kms_flip@blocking-wf_vblank.html * igt@kms_flip@blocking-wf_vblank@a-hdmi-a3: - shard-dg2: NOTRUN -> [FAIL][206] ([i915#2122]) +1 other test fail [206]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-2/igt@kms_flip@blocking-wf_vblank@a-hdmi-a3.html * igt@kms_flip@blocking-wf_vblank@b-hdmi-a2: - shard-rkl: [PASS][207] -> [FAIL][208] ([i915#11989] / [i915#12840]) [207]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-rkl-5/igt@kms_flip@blocking-wf_vblank@b-hdmi-a2.html [208]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-3/igt@kms_flip@blocking-wf_vblank@b-hdmi-a2.html * igt@kms_flip@flip-vs-suspend: - shard-dg1: NOTRUN -> [INCOMPLETE][209] ([i915#4839] / [i915#6113]) [209]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-12/igt@kms_flip@flip-vs-suspend.html * igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a1: - shard-rkl: [PASS][210] -> [DMESG-FAIL][211] ([i915#12964]) +1 other test dmesg-fail [210]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-rkl-2/igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a1.html [211]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-4/igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a1.html * igt@kms_flip@flip-vs-suspend@b-hdmi-a3: - shard-dg1: NOTRUN -> [INCOMPLETE][212] ([i915#6113]) [212]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-12/igt@kms_flip@flip-vs-suspend@b-hdmi-a3.html * igt@kms_flip@plain-flip-ts-check-interruptible: - shard-tglu: NOTRUN -> [FAIL][213] ([i915#2122]) +4 other tests fail [213]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-6/igt@kms_flip@plain-flip-ts-check-interruptible.html * igt@kms_flip@plain-flip-ts-check-interruptible@a-hdmi-a3: - shard-dg1: [PASS][214] -> [FAIL][215] ([i915#11989]) [214]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg1-12/igt@kms_flip@plain-flip-ts-check-interruptible@a-hdmi-a3.html [215]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-13/igt@kms_flip@plain-flip-ts-check-interruptible@a-hdmi-a3.html * igt@kms_flip@wf_vblank-ts-check: - shard-rkl: [PASS][216] -> [FAIL][217] ([i915#11989] / [i915#2122]) [216]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-rkl-2/igt@kms_flip@wf_vblank-ts-check.html [217]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-7/igt@kms_flip@wf_vblank-ts-check.html - shard-tglu: [PASS][218] -> [FAIL][219] ([i915#2122]) +2 other tests fail [218]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-tglu-7/igt@kms_flip@wf_vblank-ts-check.html [219]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-9/igt@kms_flip@wf_vblank-ts-check.html * igt@kms_flip@wf_vblank-ts-check@a-hdmi-a1: - shard-rkl: [PASS][220] -> [FAIL][221] ([i915#2122]) +1 other test fail [220]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-rkl-2/igt@kms_flip@wf_vblank-ts-check@a-hdmi-a1.html [221]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-7/igt@kms_flip@wf_vblank-ts-check@a-hdmi-a1.html * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling: - shard-dg1: NOTRUN -> [SKIP][222] ([i915#2672] / [i915#3555] / [i915#4423]) [222]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-18/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling.html * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-valid-mode: - shard-dg1: NOTRUN -> [SKIP][223] ([i915#2587] / [i915#2672] / [i915#4423]) [223]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-18/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-valid-mode.html * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling: - shard-tglu-1: NOTRUN -> [SKIP][224] ([i915#2672] / [i915#3555]) [224]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-1/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling.html * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-valid-mode: - shard-tglu-1: NOTRUN -> [SKIP][225] ([i915#2587] / [i915#2672]) [225]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-1/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-valid-mode.html * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-valid-mode: - shard-dg2: NOTRUN -> [SKIP][226] ([i915#2672]) +2 other tests skip [226]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-6/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-valid-mode.html * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling: - shard-tglu: NOTRUN -> [SKIP][227] ([i915#2587] / [i915#2672] / [i915#3555]) [227]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-2/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling.html * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling@pipe-a-valid-mode: - shard-tglu: NOTRUN -> [SKIP][228] ([i915#2587] / [i915#2672]) +5 other tests skip [228]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-2/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling@pipe-a-valid-mode.html * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-downscaling: - shard-tglu: NOTRUN -> [SKIP][229] ([i915#2672] / [i915#3555]) +4 other tests skip [229]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-9/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-downscaling.html * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling@pipe-a-valid-mode: - shard-dg1: NOTRUN -> [SKIP][230] ([i915#2587] / [i915#2672]) +5 other tests skip [230]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-14/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling@pipe-a-valid-mode.html * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling: - shard-rkl: NOTRUN -> [SKIP][231] ([i915#2672] / [i915#3555]) +2 other tests skip [231]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-7/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling.html - shard-dg1: NOTRUN -> [SKIP][232] ([i915#2672] / [i915#3555]) +5 other tests skip [232]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-18/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling.html - shard-dg2: NOTRUN -> [SKIP][233] ([i915#2672] / [i915#3555]) [233]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-3/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling.html * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-valid-mode: - shard-rkl: NOTRUN -> [SKIP][234] ([i915#2672]) +2 other tests skip [234]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-7/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-valid-mode.html * igt@kms_force_connector_basic@prune-stale-modes: - shard-dg2: NOTRUN -> [SKIP][235] ([i915#5274]) [235]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-5/igt@kms_force_connector_basic@prune-stale-modes.html * igt@kms_frontbuffer_tracking@fbc-rgb565-draw-mmap-cpu: - shard-dg2: [PASS][236] -> [FAIL][237] ([i915#6880]) +1 other test fail [236]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg2-2/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-mmap-cpu.html [237]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-6/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-mmap-cpu.html * igt@kms_frontbuffer_tracking@fbc-rgb565-draw-mmap-gtt: - shard-dg1: NOTRUN -> [SKIP][238] ([i915#8708]) +24 other tests skip [238]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-17/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-mmap-gtt.html * igt@kms_frontbuffer_tracking@fbc-rgb565-draw-render: - shard-dg2: [PASS][239] -> [SKIP][240] +31 other tests skip [239]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg2-6/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-render.html [240]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-11/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-render.html * igt@kms_frontbuffer_tracking@fbc-tiling-y: - shard-dg2: NOTRUN -> [SKIP][241] ([i915#10055]) [241]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-1/igt@kms_frontbuffer_tracking@fbc-tiling-y.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-mmap-gtt: - shard-dg2: NOTRUN -> [SKIP][242] +45 other tests skip [242]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-11/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-mmap-gtt.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render: - shard-dg1: NOTRUN -> [SKIP][243] +58 other tests skip [243]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-12/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-shrfb-plflip-blt: - shard-dg2: NOTRUN -> [SKIP][244] ([i915#5354]) +18 other tests skip [244]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-shrfb-plflip-blt.html - shard-rkl: NOTRUN -> [SKIP][245] ([i915#1825]) +18 other tests skip [245]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-2/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-shrfb-plflip-blt.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt: - shard-tglu-1: NOTRUN -> [SKIP][246] +32 other tests skip [246]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-1/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-fullscreen: - shard-tglu: NOTRUN -> [SKIP][247] +106 other tests skip [247]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-10/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-fullscreen.html * igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-render: - shard-dg1: NOTRUN -> [SKIP][248] ([i915#3458]) +21 other tests skip [248]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-17/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-render.html * igt@kms_frontbuffer_tracking@fbcpsr-tiling-4: - shard-rkl: NOTRUN -> [SKIP][249] ([i915#5439]) [249]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-7/igt@kms_frontbuffer_tracking@fbcpsr-tiling-4.html - shard-dg1: NOTRUN -> [SKIP][250] ([i915#5439]) [250]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-12/igt@kms_frontbuffer_tracking@fbcpsr-tiling-4.html - shard-tglu: NOTRUN -> [SKIP][251] ([i915#5439]) [251]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-9/igt@kms_frontbuffer_tracking@fbcpsr-tiling-4.html * igt@kms_frontbuffer_tracking@pipe-fbc-rte: - shard-tglu-1: NOTRUN -> [SKIP][252] ([i915#9766]) [252]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-1/igt@kms_frontbuffer_tracking@pipe-fbc-rte.html - shard-dg1: NOTRUN -> [SKIP][253] ([i915#9766]) [253]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-18/igt@kms_frontbuffer_tracking@pipe-fbc-rte.html * igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-blt: - shard-rkl: NOTRUN -> [SKIP][254] ([i915#3023]) +10 other tests skip [254]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-2/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-blt.html * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-blt: - shard-dg2: NOTRUN -> [SKIP][255] ([i915#3458]) +13 other tests skip [255]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-8/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-blt.html * igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-gtt: - shard-dg2: NOTRUN -> [SKIP][256] ([i915#8708]) +8 other tests skip [256]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-7/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-gtt.html * igt@kms_hdr@static-swap: - shard-tglu: NOTRUN -> [SKIP][257] ([i915#3555] / [i915#8228]) +1 other test skip [257]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-4/igt@kms_hdr@static-swap.html * igt@kms_hdr@static-toggle-dpms: - shard-dg1: NOTRUN -> [SKIP][258] ([i915#3555] / [i915#8228]) +1 other test skip [258]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-17/igt@kms_hdr@static-toggle-dpms.html * igt@kms_hdr@static-toggle-suspend: - shard-dg2: NOTRUN -> [SKIP][259] ([i915#3555] / [i915#8228]) +1 other test skip [259]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-2/igt@kms_hdr@static-toggle-suspend.html - shard-rkl: NOTRUN -> [SKIP][260] ([i915#3555] / [i915#8228]) [260]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-7/igt@kms_hdr@static-toggle-suspend.html * igt@kms_joiner@basic-ultra-joiner: - shard-tglu: NOTRUN -> [SKIP][261] ([i915#12339]) [261]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-9/igt@kms_joiner@basic-ultra-joiner.html * igt@kms_joiner@invalid-modeset-big-joiner: - shard-dg1: NOTRUN -> [SKIP][262] ([i915#10656]) [262]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-17/igt@kms_joiner@invalid-modeset-big-joiner.html * igt@kms_joiner@invalid-modeset-force-big-joiner: - shard-rkl: NOTRUN -> [SKIP][263] ([i915#12388]) [263]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-4/igt@kms_joiner@invalid-modeset-force-big-joiner.html - shard-tglu-1: NOTRUN -> [SKIP][264] ([i915#12388]) [264]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-1/igt@kms_joiner@invalid-modeset-force-big-joiner.html - shard-dg1: NOTRUN -> [SKIP][265] ([i915#12388]) [265]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-12/igt@kms_joiner@invalid-modeset-force-big-joiner.html * igt@kms_joiner@invalid-modeset-force-ultra-joiner: - shard-tglu: NOTRUN -> [SKIP][266] ([i915#12394]) [266]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-2/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html * igt@kms_joiner@invalid-modeset-ultra-joiner: - shard-rkl: NOTRUN -> [SKIP][267] ([i915#12339]) [267]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-1/igt@kms_joiner@invalid-modeset-ultra-joiner.html - shard-dg1: NOTRUN -> [SKIP][268] ([i915#12339]) [268]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-12/igt@kms_joiner@invalid-modeset-ultra-joiner.html * igt@kms_multipipe_modeset@basic-max-pipe-crc-check: - shard-dg1: NOTRUN -> [SKIP][269] ([i915#1839]) [269]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-17/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html * igt@kms_plane_multiple@tiling-yf: - shard-rkl: NOTRUN -> [SKIP][270] ([i915#3555]) +3 other tests skip [270]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-5/igt@kms_plane_multiple@tiling-yf.html * igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format: - shard-tglu-1: NOTRUN -> [SKIP][271] ([i915#12247]) +4 other tests skip [271]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-1/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format.html * igt@kms_plane_scaling@plane-downscale-factor-0-75-with-pixel-format: - shard-dg2: NOTRUN -> [SKIP][272] ([i915#2575] / [i915#9423]) [272]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-11/igt@kms_plane_scaling@plane-downscale-factor-0-75-with-pixel-format.html * igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-b: - shard-rkl: NOTRUN -> [SKIP][273] ([i915#12247]) +1 other test skip [273]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-7/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-b.html * igt@kms_plane_scaling@plane-upscale-20x20-with-pixel-format: - shard-dg2: [PASS][274] -> [SKIP][275] ([i915#2575] / [i915#9423]) +4 other tests skip [274]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg2-2/igt@kms_plane_scaling@plane-upscale-20x20-with-pixel-format.html [275]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-11/igt@kms_plane_scaling@plane-upscale-20x20-with-pixel-format.html * igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation@pipe-d: - shard-dg1: NOTRUN -> [SKIP][276] ([i915#12247]) +9 other tests skip [276]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-17/igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation@pipe-d.html * igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25: - shard-tglu: NOTRUN -> [SKIP][277] ([i915#12247] / [i915#6953]) [277]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-10/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25.html * igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25@pipe-d: - shard-tglu: NOTRUN -> [SKIP][278] ([i915#12247]) +22 other tests skip [278]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-10/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25@pipe-d.html * igt@kms_pm_backlight@basic-brightness: - shard-dg1: NOTRUN -> [SKIP][279] ([i915#5354]) [279]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-12/igt@kms_pm_backlight@basic-brightness.html * igt@kms_pm_backlight@fade-with-suspend: - shard-tglu: NOTRUN -> [SKIP][280] ([i915#9812]) [280]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-2/igt@kms_pm_backlight@fade-with-suspend.html * igt@kms_pm_dc@dc3co-vpb-simulation: - shard-dg2: NOTRUN -> [SKIP][281] ([i915#9685]) [281]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-2/igt@kms_pm_dc@dc3co-vpb-simulation.html - shard-rkl: NOTRUN -> [SKIP][282] ([i915#9685]) [282]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-7/igt@kms_pm_dc@dc3co-vpb-simulation.html * igt@kms_pm_lpsp@screens-disabled: - shard-rkl: NOTRUN -> [SKIP][283] ([i915#8430]) [283]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-4/igt@kms_pm_lpsp@screens-disabled.html - shard-dg1: NOTRUN -> [SKIP][284] ([i915#8430]) [284]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-14/igt@kms_pm_lpsp@screens-disabled.html - shard-tglu: NOTRUN -> [SKIP][285] ([i915#8430]) [285]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-7/igt@kms_pm_lpsp@screens-disabled.html - shard-dg2: NOTRUN -> [SKIP][286] ([i915#8430]) [286]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-10/igt@kms_pm_lpsp@screens-disabled.html * igt@kms_pm_rpm@dpms-non-lpsp: - shard-rkl: [PASS][287] -> [SKIP][288] ([i915#9519]) [287]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-rkl-5/igt@kms_pm_rpm@dpms-non-lpsp.html [288]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-2/igt@kms_pm_rpm@dpms-non-lpsp.html * igt@kms_pm_rpm@i2c: - shard-glk: [PASS][289] -> [FAIL][290] ([i915#8717]) [289]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-glk4/igt@kms_pm_rpm@i2c.html [290]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-glk4/igt@kms_pm_rpm@i2c.html * igt@kms_pm_rpm@modeset-non-lpsp: - shard-tglu: NOTRUN -> [SKIP][291] ([i915#9519]) +1 other test skip [291]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-7/igt@kms_pm_rpm@modeset-non-lpsp.html - shard-rkl: NOTRUN -> [SKIP][292] ([i915#9519]) [292]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-4/igt@kms_pm_rpm@modeset-non-lpsp.html * igt@kms_prime@basic-crc-hybrid: - shard-dg1: NOTRUN -> [SKIP][293] ([i915#6524]) [293]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-18/igt@kms_prime@basic-crc-hybrid.html * igt@kms_prime@basic-modeset-hybrid: - shard-tglu: NOTRUN -> [SKIP][294] ([i915#6524]) +1 other test skip [294]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-7/igt@kms_prime@basic-modeset-hybrid.html * igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-exceed-sf: - shard-tglu-1: NOTRUN -> [SKIP][295] ([i915#11520]) +1 other test skip [295]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-1/igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-exceed-sf.html * igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-sf: - shard-snb: NOTRUN -> [SKIP][296] ([i915#11520]) +3 other tests skip [296]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-snb6/igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-sf.html * igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-sf: - shard-rkl: NOTRUN -> [SKIP][297] ([i915#11520]) +3 other tests skip [297]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-1/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-sf.html * igt@kms_psr2_sf@pr-overlay-primary-update-sf-dmg-area: - shard-glk: NOTRUN -> [SKIP][298] ([i915#11520]) +4 other tests skip [298]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-glk9/igt@kms_psr2_sf@pr-overlay-primary-update-sf-dmg-area.html * igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area-big-fb: - shard-dg2: NOTRUN -> [SKIP][299] ([i915#11520]) +5 other tests skip [299]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-7/igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area-big-fb.html * igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-fully-sf: - shard-tglu: NOTRUN -> [SKIP][300] ([i915#11520]) +6 other tests skip [300]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-8/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-fully-sf.html * igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-sf: - shard-dg1: NOTRUN -> [SKIP][301] ([i915#11520]) +10 other tests skip [301]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-12/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-sf.html * igt@kms_psr2_su@page_flip-p010: - shard-tglu: NOTRUN -> [SKIP][302] ([i915#9683]) +1 other test skip [302]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-8/igt@kms_psr2_su@page_flip-p010.html * igt@kms_psr@fbc-psr2-no-drrs: - shard-tglu: NOTRUN -> [SKIP][303] ([i915#9732]) +25 other tests skip [303]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-5/igt@kms_psr@fbc-psr2-no-drrs.html * igt@kms_psr@fbc-psr2-sprite-render: - shard-rkl: NOTRUN -> [SKIP][304] ([i915#1072] / [i915#9732]) +10 other tests skip [304]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-7/igt@kms_psr@fbc-psr2-sprite-render.html * igt@kms_psr@pr-cursor-mmap-gtt: - shard-tglu-1: NOTRUN -> [SKIP][305] ([i915#9732]) +9 other tests skip [305]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-1/igt@kms_psr@pr-cursor-mmap-gtt.html * igt@kms_psr@pr-suspend: - shard-dg1: NOTRUN -> [SKIP][306] ([i915#1072] / [i915#9732]) +30 other tests skip [306]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-17/igt@kms_psr@pr-suspend.html * igt@kms_psr@psr-cursor-render: - shard-dg2: NOTRUN -> [SKIP][307] ([i915#1072] / [i915#9732]) +11 other tests skip [307]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-8/igt@kms_psr@psr-cursor-render.html * igt@kms_psr_stress_test@flip-primary-invalidate-overlay: - shard-dg1: NOTRUN -> [SKIP][308] ([i915#9685]) [308]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-17/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0: - shard-tglu: NOTRUN -> [SKIP][309] ([i915#5289]) [309]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-6/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180: - shard-rkl: NOTRUN -> [SKIP][310] ([i915#5289]) +1 other test skip [310]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-5/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270: - shard-tglu-1: NOTRUN -> [SKIP][311] ([i915#5289]) [311]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-1/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html - shard-dg1: NOTRUN -> [SKIP][312] ([i915#5289]) [312]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-12/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html * igt@kms_scaling_modes@scaling-mode-center: - shard-dg1: NOTRUN -> [SKIP][313] ([i915#3555]) +5 other tests skip [313]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-13/igt@kms_scaling_modes@scaling-mode-center.html * igt@kms_scaling_modes@scaling-mode-full-aspect: - shard-tglu: NOTRUN -> [SKIP][314] ([i915#3555]) +6 other tests skip [314]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-2/igt@kms_scaling_modes@scaling-mode-full-aspect.html * igt@kms_sysfs_edid_timing: - shard-dg2: NOTRUN -> [FAIL][315] ([IGT#2]) [315]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-7/igt@kms_sysfs_edid_timing.html - shard-dg1: NOTRUN -> [FAIL][316] ([IGT#2] / [i915#6493]) [316]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-17/igt@kms_sysfs_edid_timing.html * igt@kms_tiled_display@basic-test-pattern: - shard-dg2: NOTRUN -> [SKIP][317] ([i915#8623]) [317]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-6/igt@kms_tiled_display@basic-test-pattern.html * igt@kms_vblank@ts-continuation-idle-hang: - shard-rkl: [PASS][318] -> [DMESG-WARN][319] ([i915#12964]) +4 other tests dmesg-warn [318]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-rkl-1/igt@kms_vblank@ts-continuation-idle-hang.html [319]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-2/igt@kms_vblank@ts-continuation-idle-hang.html * igt@kms_vblank@ts-continuation-idle-hang@pipe-a-hdmi-a-1: - shard-rkl: NOTRUN -> [DMESG-WARN][320] ([i915#12964]) [320]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-2/igt@kms_vblank@ts-continuation-idle-hang@pipe-a-hdmi-a-1.html * igt@kms_vrr@flip-basic-fastset: - shard-dg2: NOTRUN -> [SKIP][321] ([i915#9906]) [321]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-5/igt@kms_vrr@flip-basic-fastset.html - shard-rkl: NOTRUN -> [SKIP][322] ([i915#9906]) [322]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-7/igt@kms_vrr@flip-basic-fastset.html - shard-dg1: NOTRUN -> [SKIP][323] ([i915#9906]) [323]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-12/igt@kms_vrr@flip-basic-fastset.html * igt@kms_vrr@flipline: - shard-tglu-1: NOTRUN -> [SKIP][324] ([i915#3555]) [324]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-1/igt@kms_vrr@flipline.html * igt@kms_vrr@lobf: - shard-tglu-1: NOTRUN -> [SKIP][325] ([i915#11920]) [325]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-1/igt@kms_vrr@lobf.html * igt@kms_vrr@seamless-rr-switch-vrr: - shard-tglu-1: NOTRUN -> [SKIP][326] ([i915#9906]) [326]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-1/igt@kms_vrr@seamless-rr-switch-vrr.html * igt@kms_writeback@writeback-check-output: - shard-tglu: NOTRUN -> [SKIP][327] ([i915#2437]) [327]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-8/igt@kms_writeback@writeback-check-output.html * igt@kms_writeback@writeback-check-output-xrgb2101010: - shard-dg1: NOTRUN -> [SKIP][328] ([i915#2437] / [i915#9412]) [328]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-13/igt@kms_writeback@writeback-check-output-xrgb2101010.html * igt@kms_writeback@writeback-fb-id-xrgb2101010: - shard-glk: NOTRUN -> [SKIP][329] ([i915#2437]) [329]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-glk9/igt@kms_writeback@writeback-fb-id-xrgb2101010.html * igt@perf@invalid-oa-exponent: - shard-dg2: NOTRUN -> [SKIP][330] ([i915#12506]) +1 other test skip [330]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-11/igt@perf@invalid-oa-exponent.html * igt@perf@per-context-mode-unprivileged: - shard-dg1: NOTRUN -> [SKIP][331] ([i915#2433]) [331]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-14/igt@perf@per-context-mode-unprivileged.html * igt@perf_pmu@busy-double-start@vcs0: - shard-dg1: NOTRUN -> [FAIL][332] ([i915#4349]) +2 other tests fail [332]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-13/igt@perf_pmu@busy-double-start@vcs0.html * igt@perf_pmu@invalid-init: - shard-dg2: [PASS][333] -> [SKIP][334] ([i915#12506]) +7 other tests skip [333]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg2-7/igt@perf_pmu@invalid-init.html [334]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-11/igt@perf_pmu@invalid-init.html * igt@perf_pmu@most-busy-check-all: - shard-rkl: [PASS][335] -> [FAIL][336] ([i915#4349]) +1 other test fail [335]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-rkl-2/igt@perf_pmu@most-busy-check-all.html [336]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-2/igt@perf_pmu@most-busy-check-all.html * igt@perf_pmu@rc6-all-gts: - shard-dg1: NOTRUN -> [SKIP][337] ([i915#8516]) [337]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-14/igt@perf_pmu@rc6-all-gts.html * igt@perf_pmu@rc6@other-idle-gt0: - shard-dg2: NOTRUN -> [SKIP][338] ([i915#8516]) +1 other test skip [338]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-10/igt@perf_pmu@rc6@other-idle-gt0.html * igt@prime_vgem@basic-fence-flip: - shard-dg1: NOTRUN -> [SKIP][339] ([i915#3708]) [339]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-14/igt@prime_vgem@basic-fence-flip.html * igt@prime_vgem@basic-fence-mmap: - shard-dg1: NOTRUN -> [SKIP][340] ([i915#3708] / [i915#4077]) [340]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-13/igt@prime_vgem@basic-fence-mmap.html * igt@prime_vgem@basic-read: - shard-rkl: NOTRUN -> [SKIP][341] ([i915#3291] / [i915#3708]) [341]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-1/igt@prime_vgem@basic-read.html * igt@sriov_basic@bind-unbind-vf: - shard-dg1: NOTRUN -> [SKIP][342] ([i915#9917]) +1 other test skip [342]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-13/igt@sriov_basic@bind-unbind-vf.html * igt@sriov_basic@enable-vfs-bind-unbind-each@numvfs-2: - shard-tglu-1: NOTRUN -> [FAIL][343] ([i915#12910]) +8 other tests fail [343]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-1/igt@sriov_basic@enable-vfs-bind-unbind-each@numvfs-2.html * igt@sysfs_heartbeat_interval@precise: - shard-snb: NOTRUN -> [SKIP][344] +158 other tests skip [344]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-snb2/igt@sysfs_heartbeat_interval@precise.html * igt@tools_test@sysfs_l3_parity: - shard-rkl: NOTRUN -> [SKIP][345] +7 other tests skip [345]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-2/igt@tools_test@sysfs_l3_parity.html - shard-dg1: NOTRUN -> [SKIP][346] ([i915#4818]) [346]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-13/igt@tools_test@sysfs_l3_parity.html - shard-dg2: NOTRUN -> [SKIP][347] ([i915#4818]) [347]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-4/igt@tools_test@sysfs_l3_parity.html #### Possible fixes #### * igt@core_hotunplug@unbind-rebind: - shard-snb: [ABORT][348] ([i915#11703]) -> [PASS][349] [348]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-snb7/igt@core_hotunplug@unbind-rebind.html [349]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-snb1/igt@core_hotunplug@unbind-rebind.html * igt@dmabuf@all-tests@dma_fence_chain: - shard-rkl: [DMESG-WARN][350] -> [PASS][351] +44 other tests pass [350]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-rkl-5/igt@dmabuf@all-tests@dma_fence_chain.html [351]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-7/igt@dmabuf@all-tests@dma_fence_chain.html * igt@fbdev@unaligned-read: - shard-dg2: [SKIP][352] ([i915#2582]) -> [PASS][353] +1 other test pass [352]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg2-11/igt@fbdev@unaligned-read.html [353]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-5/igt@fbdev@unaligned-read.html * igt@gem_ctx_freq@sysfs: - shard-dg2: [FAIL][354] ([i915#9561]) -> [PASS][355] +1 other test pass [354]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg2-7/igt@gem_ctx_freq@sysfs.html [355]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-1/igt@gem_ctx_freq@sysfs.html * igt@gem_exec_whisper@basic-queues-priority-all: - shard-rkl: [DMESG-WARN][356] ([i915#12964]) -> [PASS][357] +9 other tests pass [356]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-rkl-7/igt@gem_exec_whisper@basic-queues-priority-all.html [357]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-5/igt@gem_exec_whisper@basic-queues-priority-all.html * igt@gem_lmem_swapping@heavy-multi: - shard-dg2: [SKIP][358] ([i915#12936]) -> [PASS][359] +1 other test pass [358]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg2-11/igt@gem_lmem_swapping@heavy-multi.html [359]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-2/igt@gem_lmem_swapping@heavy-multi.html * igt@gem_pxp@create-protected-buffer: - shard-tglu: [SKIP][360] ([i915#4270]) -> [PASS][361] +1 other test pass [360]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-tglu-3/igt@gem_pxp@create-protected-buffer.html [361]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-4/igt@gem_pxp@create-protected-buffer.html * igt@i915_module_load@reload-with-fault-injection: - shard-snb: [ABORT][362] ([i915#9820]) -> [PASS][363] [362]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-snb1/igt@i915_module_load@reload-with-fault-injection.html [363]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-snb7/igt@i915_module_load@reload-with-fault-injection.html * igt@i915_pm_rc6_residency@rc6-idle: - shard-dg1: [FAIL][364] ([i915#12548] / [i915#3591]) -> [PASS][365] [364]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg1-18/igt@i915_pm_rc6_residency@rc6-idle.html [365]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-12/igt@i915_pm_rc6_residency@rc6-idle.html * igt@i915_pm_rc6_residency@rc6-idle@gt0-vecs0: - shard-dg1: [FAIL][366] ([i915#12739] / [i915#3591]) -> [PASS][367] [366]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg1-18/igt@i915_pm_rc6_residency@rc6-idle@gt0-vecs0.html [367]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-12/igt@i915_pm_rc6_residency@rc6-idle@gt0-vecs0.html * igt@i915_selftest@live@guc_multi_lrc: - shard-rkl: [ABORT][368] -> [PASS][369] [368]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-rkl-7/igt@i915_selftest@live@guc_multi_lrc.html [369]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-3/igt@i915_selftest@live@guc_multi_lrc.html * igt@i915_selftest@perf: - shard-tglu: [ABORT][370] -> [PASS][371] +1 other test pass [370]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-tglu-5/igt@i915_selftest@perf.html [371]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-8/igt@i915_selftest@perf.html * igt@i915_suspend@basic-s3-without-i915: - shard-dg2: [WARN][372] -> [PASS][373] [372]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg2-11/igt@i915_suspend@basic-s3-without-i915.html [373]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-7/igt@i915_suspend@basic-s3-without-i915.html - shard-rkl: [INCOMPLETE][374] ([i915#4817]) -> [PASS][375] [374]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-rkl-3/igt@i915_suspend@basic-s3-without-i915.html [375]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-5/igt@i915_suspend@basic-s3-without-i915.html * igt@kms_big_fb@x-tiled-64bpp-rotate-180: - shard-dg2: [SKIP][376] -> [PASS][377] +26 other tests pass [376]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg2-11/igt@kms_big_fb@x-tiled-64bpp-rotate-180.html [377]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-2/igt@kms_big_fb@x-tiled-64bpp-rotate-180.html * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0: - shard-dg1: [INCOMPLETE][378] -> [PASS][379] [378]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg1-18/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0.html [379]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-17/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0.html * igt@kms_cursor_legacy@cursorb-vs-flipb-toggle: - shard-snb: [SKIP][380] -> [PASS][381] +8 other tests pass [380]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-snb1/igt@kms_cursor_legacy@cursorb-vs-flipb-toggle.html [381]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-snb4/igt@kms_cursor_legacy@cursorb-vs-flipb-toggle.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size: - shard-snb: [FAIL][382] ([i915#2346]) -> [PASS][383] +1 other test pass [382]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-snb6/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html [383]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-snb4/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html * igt@kms_flip@absolute-wf_vblank-interruptible: - shard-rkl: [DMESG-WARN][384] ([i915#12917]) -> [PASS][385] +3 other tests pass [384]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-rkl-7/igt@kms_flip@absolute-wf_vblank-interruptible.html [385]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-7/igt@kms_flip@absolute-wf_vblank-interruptible.html * igt@kms_flip@flip-vs-absolute-wf_vblank@b-hdmi-a2: - shard-rkl: [FAIL][386] ([i915#11989]) -> [PASS][387] [386]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-rkl-5/igt@kms_flip@flip-vs-absolute-wf_vblank@b-hdmi-a2.html [387]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-5/igt@kms_flip@flip-vs-absolute-wf_vblank@b-hdmi-a2.html * igt@kms_flip@flip-vs-suspend-interruptible: - shard-dg1: [INCOMPLETE][388] ([i915#4423] / [i915#4839] / [i915#6113]) -> [PASS][389] [388]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg1-17/igt@kms_flip@flip-vs-suspend-interruptible.html [389]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-14/igt@kms_flip@flip-vs-suspend-interruptible.html * igt@kms_flip@flip-vs-suspend-interruptible@c-hdmi-a4: - shard-dg1: [DMESG-WARN][390] ([i915#4423]) -> [PASS][391] +1 other test pass [390]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg1-17/igt@kms_flip@flip-vs-suspend-interruptible@c-hdmi-a4.html [391]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-14/igt@kms_flip@flip-vs-suspend-interruptible@c-hdmi-a4.html * igt@kms_flip@flip-vs-suspend-interruptible@d-hdmi-a4: - shard-dg1: [INCOMPLETE][392] ([i915#4423] / [i915#6113]) -> [PASS][393] [392]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg1-17/igt@kms_flip@flip-vs-suspend-interruptible@d-hdmi-a4.html [393]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-14/igt@kms_flip@flip-vs-suspend-interruptible@d-hdmi-a4.html * igt@kms_flip@plain-flip-ts-check-interruptible: - shard-snb: [FAIL][394] ([i915#2122]) -> [PASS][395] +5 other tests pass [394]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-snb7/igt@kms_flip@plain-flip-ts-check-interruptible.html [395]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-snb7/igt@kms_flip@plain-flip-ts-check-interruptible.html * igt@kms_flip@plain-flip-ts-check-interruptible@a-hdmi-a1: - shard-rkl: [FAIL][396] ([i915#2122]) -> [PASS][397] +1 other test pass [396]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-rkl-4/igt@kms_flip@plain-flip-ts-check-interruptible@a-hdmi-a1.html [397]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-7/igt@kms_flip@plain-flip-ts-check-interruptible@a-hdmi-a1.html * igt@kms_flip@plain-flip-ts-check-interruptible@c-hdmi-a3: - shard-dg1: [FAIL][398] ([i915#11989]) -> [PASS][399] +1 other test pass [398]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg1-12/igt@kms_flip@plain-flip-ts-check-interruptible@c-hdmi-a3.html [399]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-13/igt@kms_flip@plain-flip-ts-check-interruptible@c-hdmi-a3.html * igt@kms_flip@wf_vblank-ts-check-interruptible@b-hdmi-a1: - shard-tglu: [FAIL][400] ([i915#2122]) -> [PASS][401] +4 other tests pass [400]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-tglu-10/igt@kms_flip@wf_vblank-ts-check-interruptible@b-hdmi-a1.html [401]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-8/igt@kms_flip@wf_vblank-ts-check-interruptible@b-hdmi-a1.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-blt: - shard-dg2: [FAIL][402] ([i915#6880]) -> [PASS][403] [402]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg2-7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-blt.html [403]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-blt.html * igt@kms_getfb@getfb-handle-closed: - shard-dg2: [SKIP][404] ([i915#2575]) -> [PASS][405] +157 other tests pass [404]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg2-11/igt@kms_getfb@getfb-handle-closed.html [405]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-2/igt@kms_getfb@getfb-handle-closed.html * igt@kms_hdr@static-swap: - shard-dg2: [SKIP][406] ([i915#3555] / [i915#8228]) -> [PASS][407] [406]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg2-6/igt@kms_hdr@static-swap.html [407]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-10/igt@kms_hdr@static-swap.html * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5: - shard-dg2: [SKIP][408] ([i915#2575] / [i915#9423]) -> [PASS][409] +2 other tests pass [408]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg2-11/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5.html [409]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-3/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5.html * igt@kms_pm_dc@dc6-dpms: - shard-tglu: [FAIL][410] ([i915#9295]) -> [PASS][411] [410]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-tglu-8/igt@kms_pm_dc@dc6-dpms.html [411]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-tglu-4/igt@kms_pm_dc@dc6-dpms.html * igt@kms_pm_rpm@modeset-lpsp: - shard-rkl: [SKIP][412] -> [PASS][413] [412]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-rkl-7/igt@kms_pm_rpm@modeset-lpsp.html [413]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-2/igt@kms_pm_rpm@modeset-lpsp.html * igt@perf@invalid-remove-userspace-config: - shard-dg2: [SKIP][414] ([i915#12506]) -> [PASS][415] +7 other tests pass [414]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg2-11/igt@perf@invalid-remove-userspace-config.html [415]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-5/igt@perf@invalid-remove-userspace-config.html * igt@perf@polling@0-rcs0: - shard-rkl: [FAIL][416] ([i915#10538]) -> [PASS][417] +1 other test pass [416]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-rkl-1/igt@perf@polling@0-rcs0.html [417]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-4/igt@perf@polling@0-rcs0.html * igt@perf_pmu@most-busy-idle-check-all: - shard-dg2: [FAIL][418] ([i915#11943] / [i915#12515]) -> [PASS][419] +1 other test pass [418]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg2-10/igt@perf_pmu@most-busy-idle-check-all.html [419]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-7/igt@perf_pmu@most-busy-idle-check-all.html * igt@perf_pmu@most-busy-idle-check-all@rcs0: - shard-rkl: [FAIL][420] ([i915#4349]) -> [PASS][421] +1 other test pass [420]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-rkl-2/igt@perf_pmu@most-busy-idle-check-all@rcs0.html [421]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-rkl-2/igt@perf_pmu@most-busy-idle-check-all@rcs0.html - shard-dg1: [FAIL][422] ([i915#11943]) -> [PASS][423] +1 other test pass [422]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg1-12/igt@perf_pmu@most-busy-idle-check-all@rcs0.html [423]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg1-17/igt@perf_pmu@most-busy-idle-check-all@rcs0.html #### Warnings #### * igt@gem_ccs@suspend-resume: - shard-dg2: [SKIP][424] ([i915#2575]) -> [INCOMPLETE][425] ([i915#7297]) [424]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg2-11/igt@gem_ccs@suspend-resume.html [425]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-1/igt@gem_ccs@suspend-resume.html * igt@gem_close_race@multigpu-basic-process: - shard-dg2: [SKIP][426] ([i915#7697]) -> [SKIP][427] ([i915#2575]) [426]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg2-10/igt@gem_close_race@multigpu-basic-process.html [427]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-11/igt@gem_close_race@multigpu-basic-process.html * igt@gem_ctx_sseu@engines: - shard-dg2: [SKIP][428] ([i915#2575]) -> [SKIP][429] ([i915#280]) [428]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg2-11/igt@gem_ctx_sseu@engines.html [429]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-7/igt@gem_ctx_sseu@engines.html * igt@gem_ctx_sseu@invalid-sseu: - shard-dg2: [SKIP][430] ([i915#280]) -> [SKIP][431] ([i915#2575]) [430]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg2-6/igt@gem_ctx_sseu@invalid-sseu.html [431]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-11/igt@gem_ctx_sseu@invalid-sseu.html * igt@gem_exec_balancer@bonded-sync: - shard-dg2: [SKIP][432] ([i915#4771]) -> [SKIP][433] ([i915#2575]) [432]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg2-3/igt@gem_exec_balancer@bonded-sync.html [433]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-11/igt@gem_exec_balancer@bonded-sync.html * igt@gem_exec_fence@submit3: - shard-dg2: [SKIP][434] ([i915#2575]) -> [SKIP][435] ([i915#4812]) [434]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg2-11/igt@gem_exec_fence@submit3.html [435]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-3/igt@gem_exec_fence@submit3.html * igt@gem_exec_flush@basic-uc-set-default: - shard-dg2: [SKIP][436] ([i915#2575]) -> [SKIP][437] ([i915#3539]) +1 other test skip [436]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg2-11/igt@gem_exec_flush@basic-uc-set-default.html [437]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-5/igt@gem_exec_flush@basic-uc-set-default.html * igt@gem_exec_flush@basic-wb-ro-before-default: - shard-dg2: [SKIP][438] ([i915#3539] / [i915#4852]) -> [SKIP][439] ([i915#2575]) +4 other tests skip [438]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg2-2/igt@gem_exec_flush@basic-wb-ro-before-default.html [439]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-11/igt@gem_exec_flush@basic-wb-ro-before-default.html * igt@gem_exec_params@rsvd2-dirt: - shard-dg2: [SKIP][440] ([i915#5107]) -> [SKIP][441] ([i915#2575]) [440]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg2-1/igt@gem_exec_params@rsvd2-dirt.html [441]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-11/igt@gem_exec_params@rsvd2-dirt.html * igt@gem_exec_reloc@basic-active: - shard-dg2: [SKIP][442] ([i915#3281]) -> [SKIP][443] ([i915#2575]) +5 other tests skip [442]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg2-10/igt@gem_exec_reloc@basic-active.html [443]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-11/igt@gem_exec_reloc@basic-active.html * igt@gem_exec_reloc@basic-write-read-active: - shard-dg2: [SKIP][444] ([i915#2575]) -> [SKIP][445] ([i915#3281]) +7 other tests skip [444]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg2-11/igt@gem_exec_reloc@basic-write-read-active.html [445]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-3/igt@gem_exec_reloc@basic-write-read-active.html * igt@gem_exec_schedule@preempt-queue-contexts: - shard-dg2: [SKIP][446] ([i915#4537] / [i915#4812]) -> [SKIP][447] ([i915#2575]) [446]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg2-6/igt@gem_exec_schedule@preempt-queue-contexts.html [447]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-11/igt@gem_exec_schedule@preempt-queue-contexts.html * igt@gem_fenced_exec_thrash@too-many-fences: - shard-dg2: [SKIP][448] ([i915#2575]) -> [SKIP][449] ([i915#4860]) +1 other test skip [448]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg2-11/igt@gem_fenced_exec_thrash@too-many-fences.html [449]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-7/igt@gem_fenced_exec_thrash@too-many-fences.html * igt@gem_mmap_gtt@basic-copy: - shard-dg2: [SKIP][450] ([i915#2575]) -> [SKIP][451] ([i915#4077]) +7 other tests skip [450]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg2-11/igt@gem_mmap_gtt@basic-copy.html [451]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-1/igt@gem_mmap_gtt@basic-copy.html * igt@gem_mmap_wc@copy: - shard-dg2: [SKIP][452] ([i915#4083]) -> [SKIP][453] ([i915#2575]) +3 other tests skip [452]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg2-4/igt@gem_mmap_wc@copy.html [453]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-11/igt@gem_mmap_wc@copy.html * igt@gem_mmap_wc@write-prefaulted: - shard-dg2: [SKIP][454] ([i915#2575]) -> [SKIP][455] ([i915#4083]) +5 other tests skip [454]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg2-11/igt@gem_mmap_wc@write-prefaulted.html [455]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/shard-dg2-6/igt@gem_mmap_wc@write-prefaulted.html * igt@gem_partial_pwrite_pread@write-uncached: - shard-dg2: [SKIP][456] ([i915#2575]) -> [SKIP][457] ([i915#3282]) +2 other tests skip [456]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15727/shard-dg2-11/igt@gem_partial_ == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12165/index.html ^ permalink raw reply [flat|nested] 15+ messages in thread
end of thread, other threads:[~2024-11-24 13:14 UTC | newest] Thread overview: 15+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2024-11-21 17:12 [PATCH v3 0/4] lib/gpgpu_shader: simplify load/store shaders and add Xe3 support Andrzej Hajda 2024-11-21 17:12 ` [PATCH v3 1/4] scripts/generate_iga64_codes: add iga64_macros.h to checksum calculation Andrzej Hajda 2024-11-21 17:12 ` [PATCH v3 2/4] lib/gpgpu_shader: simplify load/store shaders Andrzej Hajda 2024-11-22 14:05 ` Grzegorzek, Dominik 2024-11-22 14:22 ` Hajda, Andrzej 2024-11-22 14:28 ` Grzegorzek, Dominik 2024-11-21 17:12 ` [PATCH v3 3/4] lib/gpgpu_shader: pass surface desription to shaders via inline data Andrzej Hajda 2024-11-22 14:27 ` Grzegorzek, Dominik 2024-11-21 17:12 ` [PATCH v3 4/4] lib/gpgpu_shader: add support for Xe3 platforms Andrzej Hajda 2024-11-22 14:11 ` Grzegorzek, Dominik 2024-11-22 14:24 ` Hajda, Andrzej 2024-11-21 22:40 ` ✓ Xe.CI.BAT: success for lib/gpgpu_shader: simplify load/store shaders and add Xe3 support Patchwork 2024-11-21 22:46 ` ✓ i915.CI.BAT: " Patchwork 2024-11-22 12:34 ` ✗ Xe.CI.Full: failure " Patchwork 2024-11-24 13:14 ` ✗ i915.CI.Full: " Patchwork
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