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* [PATCH] drm/i915: don't implement WaDisableEarlyCull for Haswell
@ 2012-10-10 21:09 Paulo Zanoni
  2012-10-10 21:42 ` Lespiau, Damien
  0 siblings, 1 reply; 3+ messages in thread
From: Paulo Zanoni @ 2012-10-10 21:09 UTC (permalink / raw)
  To: intel-gfx; +Cc: Paulo Zanoni

From: Paulo Zanoni <paulo.r.zanoni@intel.com>

Introduced in commit 87f8020ec9e3069597746040a4e8655189bc0c1a:
  drm/i915: implement WaDisableEarlyCull for VLV and IVB

Notice that the original patch sent to the mailing list did not
include the Haswell chunk, it was added later.

The bit set by the commit does not exist on Haswell machines (at least
that's what the documentation says). Also, the commit gives me a GPU
hang every time we're loading the driver. So let's revert the Haswell
chunk, making the patch do only what its title actually says.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index eb757e5..07da990 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3470,10 +3470,6 @@ static void haswell_init_clock_gating(struct drm_device *dev)
 	 */
 	I915_WRITE(GEN6_UCGCTL2, GEN6_RCZUNIT_CLOCK_GATE_DISABLE);
 
-	/* WaDisableEarlyCull */
-	I915_WRITE(_3D_CHICKEN3,
-		   _MASKED_BIT_ENABLE(_3D_CHICKEN_SF_DISABLE_OBJEND_CULL));
-
 	/* Apply the WaDisableRHWOOptimizationForRenderHang workaround. */
 	I915_WRITE(GEN7_COMMON_SLICE_CHICKEN1,
 		   GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC);
-- 
1.7.11.4

^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [PATCH] drm/i915: don't implement WaDisableEarlyCull for Haswell
  2012-10-10 21:09 [PATCH] drm/i915: don't implement WaDisableEarlyCull for Haswell Paulo Zanoni
@ 2012-10-10 21:42 ` Lespiau, Damien
  2012-10-10 21:46   ` Daniel Vetter
  0 siblings, 1 reply; 3+ messages in thread
From: Lespiau, Damien @ 2012-10-10 21:42 UTC (permalink / raw)
  To: Paulo Zanoni; +Cc: intel-gfx, Paulo Zanoni

On Wed, Oct 10, 2012 at 10:09 PM, Paulo Zanoni <przanoni@gmail.com> wrote:
> From: Paulo Zanoni <paulo.r.zanoni@intel.com>
>
> Introduced in commit 87f8020ec9e3069597746040a4e8655189bc0c1a:
>   drm/i915: implement WaDisableEarlyCull for VLV and IVB
>
> Notice that the original patch sent to the mailing list did not
> include the Haswell chunk, it was added later.
>
> The bit set by the commit does not exist on Haswell machines (at least
> that's what the documentation says). Also, the commit gives me a GPU
> hang every time we're loading the driver. So let's revert the Haswell
> chunk, making the patch do only what its title actually says.
>
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

Indeed the bit definition has disappeared in the documentation, but
the wa is listed in the wa database. A hang is very handy to decide
who is right :)

Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>

-- 
Damien

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH] drm/i915: don't implement WaDisableEarlyCull for Haswell
  2012-10-10 21:42 ` Lespiau, Damien
@ 2012-10-10 21:46   ` Daniel Vetter
  0 siblings, 0 replies; 3+ messages in thread
From: Daniel Vetter @ 2012-10-10 21:46 UTC (permalink / raw)
  To: Lespiau, Damien; +Cc: intel-gfx, Paulo Zanoni

On Wed, Oct 10, 2012 at 10:42:52PM +0100, Lespiau, Damien wrote:
> On Wed, Oct 10, 2012 at 10:09 PM, Paulo Zanoni <przanoni@gmail.com> wrote:
> > From: Paulo Zanoni <paulo.r.zanoni@intel.com>
> >
> > Introduced in commit 87f8020ec9e3069597746040a4e8655189bc0c1a:
> >   drm/i915: implement WaDisableEarlyCull for VLV and IVB
> >
> > Notice that the original patch sent to the mailing list did not
> > include the Haswell chunk, it was added later.
> >
> > The bit set by the commit does not exist on Haswell machines (at least
> > that's what the documentation says). Also, the commit gives me a GPU
> > hang every time we're loading the driver. So let's revert the Haswell
> > chunk, making the patch do only what its title actually says.
> >
> > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> 
> Indeed the bit definition has disappeared in the documentation, but
> the wa is listed in the wa database. A hang is very handy to decide
> who is right :)
> 
> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Queued for -next, thanks for the patch.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2012-10-10 21:45 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
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2012-10-10 21:09 [PATCH] drm/i915: don't implement WaDisableEarlyCull for Haswell Paulo Zanoni
2012-10-10 21:42 ` Lespiau, Damien
2012-10-10 21:46   ` Daniel Vetter

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