From: Paulo Zanoni <przanoni@gmail.com>
To: intel-gfx@lists.freedesktop.org
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Subject: [PATCH 15/15] drm/i915: WARN if IIR is not zero at i8xx irq_postinstall
Date: Tue, 23 Jul 2013 19:33:55 -0300 [thread overview]
Message-ID: <1374618835-28120-16-git-send-email-przanoni@gmail.com> (raw)
In-Reply-To: <1374618835-28120-1-git-send-email-przanoni@gmail.com>
From: Paulo Zanoni <paulo.r.zanoni@intel.com>
Same thing as the previous non-i8xx commit.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
drivers/gpu/drm/i915/i915_irq.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 4f0bc26..8b12caa 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -100,8 +100,8 @@ static const u32 hpd_status_i915[] = { /* i915 and valleyview are the same */
} while (0)
#define INTEL_IRQ_REG_INIT16(type, do_iir, ier_val, imr_val) do { \
- if (do_iir) \
- I915_WRITE16(type##IR, I915_READ16(type##IR)); \
+ WARN(I915_READ16(type##IR) != 0, "Register 0x%x is not 0\n", \
+ type##IR); \
I915_WRITE16(type##MR, (imr_val)); \
I915_WRITE16(type##ER, (ier_val)); \
POSTING_READ16(type##ER); \
--
1.8.1.2
next prev parent reply other threads:[~2013-07-23 22:35 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-07-23 22:33 [PATCH 00/15] Unify interrupt register init/reset Paulo Zanoni
2013-07-23 22:33 ` [PATCH 01/15] drm/i915: add INTEL_IRQ_REG_RESET Paulo Zanoni
2013-07-23 22:33 ` [PATCH 02/15] drm/i915: change how VLV_IIR is reset Paulo Zanoni
2013-07-23 22:33 ` [PATCH 03/15] drm/i915: port i965_irq_uninstall go INTEL_IRQ_REG_RESET Paulo Zanoni
2013-07-24 11:11 ` Chris Wilson
2013-07-24 14:14 ` Paulo Zanoni
2013-07-29 11:47 ` Ville Syrjälä
2013-07-23 22:33 ` [PATCH 04/15] drm/i915: really clear the IIR registers Paulo Zanoni
2013-07-24 11:11 ` Chris Wilson
2013-07-24 13:00 ` Paulo Zanoni
2013-07-24 13:25 ` Chris Wilson
2013-07-23 22:33 ` [PATCH 05/15] drm/i915: add INTEL_IRQ_REG_INIT Paulo Zanoni
2013-07-24 11:13 ` Chris Wilson
2013-07-23 22:33 ` [PATCH 06/15] drm/i915: use INTEL_IRQ_REG_INIT on VLV too Paulo Zanoni
2013-07-23 22:33 ` [PATCH 07/15] drm/i915: reset the IIR registers at preinstall Paulo Zanoni
2013-07-24 11:15 ` Chris Wilson
2013-07-23 22:33 ` [PATCH 08/15] drm/i915: WARN if IIR is not zero at irq_postinstall Paulo Zanoni
2013-07-23 22:33 ` [PATCH 09/15] drm/i915: remove additional zerogin of VLV_IIR at postinstall Paulo Zanoni
2013-07-23 22:33 ` [PATCH 10/15] drm/i915: remove extra clearing of GTIIR from VLV irq preinstall Paulo Zanoni
2013-07-23 22:33 ` [PATCH 11/15] drm/i915: add INTEL_IRQ_REG_RESET16 Paulo Zanoni
2013-07-24 11:18 ` Chris Wilson
2013-07-23 22:33 ` [PATCH 12/15] drm/i915: really clear the IIR registers on i8xx Paulo Zanoni
2013-07-23 22:33 ` [PATCH 13/15] drm/i915: add INTEL_IRQ_REG_INIT16 Paulo Zanoni
2013-07-23 22:33 ` [PATCH 14/15] drm/i915: reset the i8xx IIR registers at preinstall Paulo Zanoni
2013-07-23 22:33 ` Paulo Zanoni [this message]
2013-07-24 11:52 ` [PATCH 00/15] Unify interrupt register init/reset Daniel Vetter
2013-07-24 13:10 ` Paulo Zanoni
2013-07-24 13:16 ` Daniel Vetter
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