* [Intel gfx][i-g-t PATCH 2/4] tests/gem_media_fill: add support for gen8
2013-11-29 6:57 [Intel gfx][i-g-t PATCH 1/4] tests: add gem_media_fill Xiang, Haihao
@ 2013-11-29 6:57 ` Xiang, Haihao
2013-11-29 6:57 ` [Intel gfx][i-g-t PATCH 3/4] tests/gem_media_fill: add support for gen7 Xiang, Haihao
` (2 subsequent siblings)
3 siblings, 0 replies; 8+ messages in thread
From: Xiang, Haihao @ 2013-11-29 6:57 UTC (permalink / raw)
To: intel-gfx
From: "Xiang, Haihao" <haihao.xiang@intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
---
lib/Makefile.sources | 2 +
lib/gen8_media.h | 371 +++++++++++++++++++++++++++++++++++++++++++++++++
lib/media_fill.c | 3 +
lib/media_fill.h | 7 +
lib/media_fill_gen8.c | 366 ++++++++++++++++++++++++++++++++++++++++++++++++
5 files changed, 749 insertions(+)
create mode 100644 lib/gen8_media.h
create mode 100644 lib/media_fill_gen8.c
diff --git a/lib/Makefile.sources b/lib/Makefile.sources
index cad238a..95ccb2f 100644
--- a/lib/Makefile.sources
+++ b/lib/Makefile.sources
@@ -21,6 +21,8 @@ libintel_tools_la_SOURCES = \
intel_reg.h \
media_fill.c \
media_fill.h \
+ media_fill_gen8.c \
+ gen8_media.h \
rendercopy_i915.c \
rendercopy_i830.c \
gen6_render.h \
diff --git a/lib/gen8_media.h b/lib/gen8_media.h
new file mode 100644
index 0000000..c61aed2
--- /dev/null
+++ b/lib/gen8_media.h
@@ -0,0 +1,371 @@
+#ifndef GEN8_MEDIA_H
+#define GEN8_MEDIA_H
+
+#define GEN8_SURFACEFORMAT_R32G32B32A32_FLOAT 0x000
+#define GEN8_SURFACEFORMAT_R32G32B32A32_SINT 0x001
+#define GEN8_SURFACEFORMAT_R32G32B32A32_UINT 0x002
+#define GEN8_SURFACEFORMAT_R32G32B32A32_UNORM 0x003
+#define GEN8_SURFACEFORMAT_R32G32B32A32_SNORM 0x004
+#define GEN8_SURFACEFORMAT_R64G64_FLOAT 0x005
+#define GEN8_SURFACEFORMAT_R32G32B32X32_FLOAT 0x006
+#define GEN8_SURFACEFORMAT_R32G32B32A32_SSCALED 0x007
+#define GEN8_SURFACEFORMAT_R32G32B32A32_USCALED 0x008
+#define GEN8_SURFACEFORMAT_R32G32B32_FLOAT 0x040
+#define GEN8_SURFACEFORMAT_R32G32B32_SINT 0x041
+#define GEN8_SURFACEFORMAT_R32G32B32_UINT 0x042
+#define GEN8_SURFACEFORMAT_R32G32B32_UNORM 0x043
+#define GEN8_SURFACEFORMAT_R32G32B32_SNORM 0x044
+#define GEN8_SURFACEFORMAT_R32G32B32_SSCALED 0x045
+#define GEN8_SURFACEFORMAT_R32G32B32_USCALED 0x046
+#define GEN8_SURFACEFORMAT_R16G16B16A16_UNORM 0x080
+#define GEN8_SURFACEFORMAT_R16G16B16A16_SNORM 0x081
+#define GEN8_SURFACEFORMAT_R16G16B16A16_SINT 0x082
+#define GEN8_SURFACEFORMAT_R16G16B16A16_UINT 0x083
+#define GEN8_SURFACEFORMAT_R16G16B16A16_FLOAT 0x084
+#define GEN8_SURFACEFORMAT_R32G32_FLOAT 0x085
+#define GEN8_SURFACEFORMAT_R32G32_SINT 0x086
+#define GEN8_SURFACEFORMAT_R32G32_UINT 0x087
+#define GEN8_SURFACEFORMAT_R32_FLOAT_X8X24_TYPELESS 0x088
+#define GEN8_SURFACEFORMAT_X32_TYPELESS_G8X24_UINT 0x089
+#define GEN8_SURFACEFORMAT_L32A32_FLOAT 0x08A
+#define GEN8_SURFACEFORMAT_R32G32_UNORM 0x08B
+#define GEN8_SURFACEFORMAT_R32G32_SNORM 0x08C
+#define GEN8_SURFACEFORMAT_R64_FLOAT 0x08D
+#define GEN8_SURFACEFORMAT_R16G16B16X16_UNORM 0x08E
+#define GEN8_SURFACEFORMAT_R16G16B16X16_FLOAT 0x08F
+#define GEN8_SURFACEFORMAT_A32X32_FLOAT 0x090
+#define GEN8_SURFACEFORMAT_L32X32_FLOAT 0x091
+#define GEN8_SURFACEFORMAT_I32X32_FLOAT 0x092
+#define GEN8_SURFACEFORMAT_R16G16B16A16_SSCALED 0x093
+#define GEN8_SURFACEFORMAT_R16G16B16A16_USCALED 0x094
+#define GEN8_SURFACEFORMAT_R32G32_SSCALED 0x095
+#define GEN8_SURFACEFORMAT_R32G32_USCALED 0x096
+#define GEN8_SURFACEFORMAT_B8G8R8A8_UNORM 0x0C0
+#define GEN8_SURFACEFORMAT_B8G8R8A8_UNORM_SRGB 0x0C1
+#define GEN8_SURFACEFORMAT_R10G10B10A2_UNORM 0x0C2
+#define GEN8_SURFACEFORMAT_R10G10B10A2_UNORM_SRGB 0x0C3
+#define GEN8_SURFACEFORMAT_R10G10B10A2_UINT 0x0C4
+#define GEN8_SURFACEFORMAT_R10G10B10_SNORM_A2_UNORM 0x0C5
+#define GEN8_SURFACEFORMAT_R8G8B8A8_UNORM 0x0C7
+#define GEN8_SURFACEFORMAT_R8G8B8A8_UNORM_SRGB 0x0C8
+#define GEN8_SURFACEFORMAT_R8G8B8A8_SNORM 0x0C9
+#define GEN8_SURFACEFORMAT_R8G8B8A8_SINT 0x0CA
+#define GEN8_SURFACEFORMAT_R8G8B8A8_UINT 0x0CB
+#define GEN8_SURFACEFORMAT_R16G16_UNORM 0x0CC
+#define GEN8_SURFACEFORMAT_R16G16_SNORM 0x0CD
+#define GEN8_SURFACEFORMAT_R16G16_SINT 0x0CE
+#define GEN8_SURFACEFORMAT_R16G16_UINT 0x0CF
+#define GEN8_SURFACEFORMAT_R16G16_FLOAT 0x0D0
+#define GEN8_SURFACEFORMAT_B10G10R10A2_UNORM 0x0D1
+#define GEN8_SURFACEFORMAT_B10G10R10A2_UNORM_SRGB 0x0D2
+#define GEN8_SURFACEFORMAT_R11G11B10_FLOAT 0x0D3
+#define GEN8_SURFACEFORMAT_R32_SINT 0x0D6
+#define GEN8_SURFACEFORMAT_R32_UINT 0x0D7
+#define GEN8_SURFACEFORMAT_R32_FLOAT 0x0D8
+#define GEN8_SURFACEFORMAT_R24_UNORM_X8_TYPELESS 0x0D9
+#define GEN8_SURFACEFORMAT_X24_TYPELESS_G8_UINT 0x0DA
+#define GEN8_SURFACEFORMAT_L16A16_UNORM 0x0DF
+#define GEN8_SURFACEFORMAT_I24X8_UNORM 0x0E0
+#define GEN8_SURFACEFORMAT_L24X8_UNORM 0x0E1
+#define GEN8_SURFACEFORMAT_A24X8_UNORM 0x0E2
+#define GEN8_SURFACEFORMAT_I32_FLOAT 0x0E3
+#define GEN8_SURFACEFORMAT_L32_FLOAT 0x0E4
+#define GEN8_SURFACEFORMAT_A32_FLOAT 0x0E5
+#define GEN8_SURFACEFORMAT_B8G8R8X8_UNORM 0x0E9
+#define GEN8_SURFACEFORMAT_B8G8R8X8_UNORM_SRGB 0x0EA
+#define GEN8_SURFACEFORMAT_R8G8B8X8_UNORM 0x0EB
+#define GEN8_SURFACEFORMAT_R8G8B8X8_UNORM_SRGB 0x0EC
+#define GEN8_SURFACEFORMAT_R9G9B9E5_SHAREDEXP 0x0ED
+#define GEN8_SURFACEFORMAT_B10G10R10X2_UNORM 0x0EE
+#define GEN8_SURFACEFORMAT_L16A16_FLOAT 0x0F0
+#define GEN8_SURFACEFORMAT_R32_UNORM 0x0F1
+#define GEN8_SURFACEFORMAT_R32_SNORM 0x0F2
+#define GEN8_SURFACEFORMAT_R10G10B10X2_USCALED 0x0F3
+#define GEN8_SURFACEFORMAT_R8G8B8A8_SSCALED 0x0F4
+#define GEN8_SURFACEFORMAT_R8G8B8A8_USCALED 0x0F5
+#define GEN8_SURFACEFORMAT_R16G16_SSCALED 0x0F6
+#define GEN8_SURFACEFORMAT_R16G16_USCALED 0x0F7
+#define GEN8_SURFACEFORMAT_R32_SSCALED 0x0F8
+#define GEN8_SURFACEFORMAT_R32_USCALED 0x0F9
+#define GEN8_SURFACEFORMAT_B5G6R5_UNORM 0x100
+#define GEN8_SURFACEFORMAT_B5G6R5_UNORM_SRGB 0x101
+#define GEN8_SURFACEFORMAT_B5G5R5A1_UNORM 0x102
+#define GEN8_SURFACEFORMAT_B5G5R5A1_UNORM_SRGB 0x103
+#define GEN8_SURFACEFORMAT_B4G4R4A4_UNORM 0x104
+#define GEN8_SURFACEFORMAT_B4G4R4A4_UNORM_SRGB 0x105
+#define GEN8_SURFACEFORMAT_R8G8_UNORM 0x106
+#define GEN8_SURFACEFORMAT_R8G8_SNORM 0x107
+#define GEN8_SURFACEFORMAT_R8G8_SINT 0x108
+#define GEN8_SURFACEFORMAT_R8G8_UINT 0x109
+#define GEN8_SURFACEFORMAT_R16_UNORM 0x10A
+#define GEN8_SURFACEFORMAT_R16_SNORM 0x10B
+#define GEN8_SURFACEFORMAT_R16_SINT 0x10C
+#define GEN8_SURFACEFORMAT_R16_UINT 0x10D
+#define GEN8_SURFACEFORMAT_R16_FLOAT 0x10E
+#define GEN8_SURFACEFORMAT_I16_UNORM 0x111
+#define GEN8_SURFACEFORMAT_L16_UNORM 0x112
+#define GEN8_SURFACEFORMAT_A16_UNORM 0x113
+#define GEN8_SURFACEFORMAT_L8A8_UNORM 0x114
+#define GEN8_SURFACEFORMAT_I16_FLOAT 0x115
+#define GEN8_SURFACEFORMAT_L16_FLOAT 0x116
+#define GEN8_SURFACEFORMAT_A16_FLOAT 0x117
+#define GEN8_SURFACEFORMAT_R5G5_SNORM_B6_UNORM 0x119
+#define GEN8_SURFACEFORMAT_B5G5R5X1_UNORM 0x11A
+#define GEN8_SURFACEFORMAT_B5G5R5X1_UNORM_SRGB 0x11B
+#define GEN8_SURFACEFORMAT_R8G8_SSCALED 0x11C
+#define GEN8_SURFACEFORMAT_R8G8_USCALED 0x11D
+#define GEN8_SURFACEFORMAT_R16_SSCALED 0x11E
+#define GEN8_SURFACEFORMAT_R16_USCALED 0x11F
+#define GEN8_SURFACEFORMAT_R8_UNORM 0x140
+#define GEN8_SURFACEFORMAT_R8_SNORM 0x141
+#define GEN8_SURFACEFORMAT_R8_SINT 0x142
+#define GEN8_SURFACEFORMAT_R8_UINT 0x143
+#define GEN8_SURFACEFORMAT_A8_UNORM 0x144
+#define GEN8_SURFACEFORMAT_I8_UNORM 0x145
+#define GEN8_SURFACEFORMAT_L8_UNORM 0x146
+#define GEN8_SURFACEFORMAT_P4A4_UNORM 0x147
+#define GEN8_SURFACEFORMAT_A4P4_UNORM 0x148
+#define GEN8_SURFACEFORMAT_R8_SSCALED 0x149
+#define GEN8_SURFACEFORMAT_R8_USCALED 0x14A
+#define GEN8_SURFACEFORMAT_R1_UINT 0x181
+#define GEN8_SURFACEFORMAT_YCRCB_NORMAL 0x182
+#define GEN8_SURFACEFORMAT_YCRCB_SWAPUVY 0x183
+#define GEN8_SURFACEFORMAT_BC1_UNORM 0x186
+#define GEN8_SURFACEFORMAT_BC2_UNORM 0x187
+#define GEN8_SURFACEFORMAT_BC3_UNORM 0x188
+#define GEN8_SURFACEFORMAT_BC4_UNORM 0x189
+#define GEN8_SURFACEFORMAT_BC5_UNORM 0x18A
+#define GEN8_SURFACEFORMAT_BC1_UNORM_SRGB 0x18B
+#define GEN8_SURFACEFORMAT_BC2_UNORM_SRGB 0x18C
+#define GEN8_SURFACEFORMAT_BC3_UNORM_SRGB 0x18D
+#define GEN8_SURFACEFORMAT_MONO8 0x18E
+#define GEN8_SURFACEFORMAT_YCRCB_SWAPUV 0x18F
+#define GEN8_SURFACEFORMAT_YCRCB_SWAPY 0x190
+#define GEN8_SURFACEFORMAT_DXT1_RGB 0x191
+#define GEN8_SURFACEFORMAT_FXT1 0x192
+#define GEN8_SURFACEFORMAT_R8G8B8_UNORM 0x193
+#define GEN8_SURFACEFORMAT_R8G8B8_SNORM 0x194
+#define GEN8_SURFACEFORMAT_R8G8B8_SSCALED 0x195
+#define GEN8_SURFACEFORMAT_R8G8B8_USCALED 0x196
+#define GEN8_SURFACEFORMAT_R64G64B64A64_FLOAT 0x197
+#define GEN8_SURFACEFORMAT_R64G64B64_FLOAT 0x198
+#define GEN8_SURFACEFORMAT_BC4_SNORM 0x199
+#define GEN8_SURFACEFORMAT_BC5_SNORM 0x19A
+#define GEN8_SURFACEFORMAT_R16G16B16_UNORM 0x19C
+#define GEN8_SURFACEFORMAT_R16G16B16_SNORM 0x19D
+#define GEN8_SURFACEFORMAT_R16G16B16_SSCALED 0x19E
+#define GEN8_SURFACEFORMAT_R16G16B16_USCALED 0x19F
+
+#define GEN8_SURFACERETURNFORMAT_FLOAT32 0
+#define GEN8_SURFACERETURNFORMAT_S1 1
+
+#define GEN8_SURFACE_1D 0
+#define GEN8_SURFACE_2D 1
+#define GEN8_SURFACE_3D 2
+#define GEN8_SURFACE_CUBE 3
+#define GEN8_SURFACE_BUFFER 4
+#define GEN8_SURFACE_NULL 7
+
+#define GEN8_FLOATING_POINT_IEEE_754 0
+#define GEN8_FLOATING_POINT_NON_IEEE_754 1
+
+#define GFXPIPE(Pipeline,Opcode,Subopcode) ((3 << 29) | \
+ ((Pipeline) << 27) | \
+ ((Opcode) << 24) | \
+ ((Subopcode) << 16))
+
+#define GEN8_PIPELINE_SELECT GFXPIPE(1, 1, 4)
+# define PIPELINE_SELECT_3D (0 << 0)
+# define PIPELINE_SELECT_MEDIA (1 << 0)
+
+#define GEN8_STATE_BASE_ADDRESS GFXPIPE(0, 1, 1)
+# define BASE_ADDRESS_MODIFY (1 << 0)
+
+#define GEN8_MEDIA_VFE_STATE GFXPIPE(2, 0, 0)
+#define GEN8_MEDIA_CURBE_LOAD GFXPIPE(2, 0, 1)
+#define GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD GFXPIPE(2, 0, 2)
+#define GEN8_MEDIA_OBJECT GFXPIPE(2, 1, 0)
+
+struct gen8_interface_descriptor_data
+{
+ struct {
+ uint32_t pad0:6;
+ uint32_t kernel_start_pointer:26;
+ } desc0;
+
+ struct {
+ uint32_t kernel_start_pointer_high:16;
+ uint32_t pad0:16;
+ } desc1;
+
+ struct {
+ uint32_t pad0:7;
+ uint32_t software_exception_enable:1;
+ uint32_t pad1:3;
+ uint32_t maskstack_exception_enable:1;
+ uint32_t pad2:1;
+ uint32_t illegal_opcode_exception_enable:1;
+ uint32_t pad3:2;
+ uint32_t floating_point_mode:1;
+ uint32_t thread_priority:1;
+ uint32_t single_program_flow:1;
+ uint32_t denorm_mode:1;
+ uint32_t pad4:12;
+ } desc2;
+
+ struct {
+ uint32_t pad0:2;
+ uint32_t sampler_count:3;
+ uint32_t sampler_state_pointer:27;
+ } desc3;
+
+ struct {
+ uint32_t binding_table_entry_count:5;
+ uint32_t binding_table_pointer:11;
+ uint32_t pad0: 16;
+ } desc4;
+
+ struct {
+ uint32_t constant_urb_entry_read_offset:16;
+ uint32_t constant_urb_entry_read_length:16;
+ } desc5;
+
+ struct {
+ uint32_t num_threads_in_tg:10;
+ uint32_t pad0:5;
+ uint32_t global_barrier_enable:1;
+ uint32_t shared_local_memory_size:5;
+ uint32_t barrier_enable:1;
+ uint32_t rounding_mode:2;
+ uint32_t pad1:8;
+ } desc6;
+
+ struct {
+ uint32_t cross_thread_constant_data_read_length:8;
+ uint32_t pad0:24;
+ } desc7;
+};
+
+struct gen8_surface_state
+{
+ struct {
+ uint32_t cube_pos_z:1;
+ uint32_t cube_neg_z:1;
+ uint32_t cube_pos_y:1;
+ uint32_t cube_neg_y:1;
+ uint32_t cube_pos_x:1;
+ uint32_t cube_neg_x:1;
+ uint32_t media_boundary_pixel_mode:2;
+ uint32_t render_cache_read_write:1;
+ uint32_t sampler_l2_bypass_disable:1;
+ uint32_t vert_line_stride_ofs:1;
+ uint32_t vert_line_stride:1;
+ uint32_t tiled_mode:2;
+ uint32_t horizontal_alignment:2;
+ uint32_t vertical_alignment:2;
+ uint32_t surface_format:9; /**< BRW_SURFACEFORMAT_x */
+ uint32_t pad0:1;
+ uint32_t is_array:1;
+ uint32_t surface_type:3; /**< BRW_SURFACE_1D/2D/3D/CUBE */
+ } ss0;
+
+ struct {
+ uint32_t qpitch:15;
+ uint32_t pad1:4;
+ uint32_t base_mip_level:5;
+ uint32_t memory_object_control:7;
+ uint32_t pad0:1;
+ } ss1;
+
+ struct {
+ uint32_t width:14;
+ uint32_t pad1:2;
+ uint32_t height:14;
+ uint32_t pad0:2;
+ } ss2;
+
+ struct {
+ uint32_t pitch:18;
+ uint32_t pad:3;
+ uint32_t depth:11;
+ } ss3;
+
+ struct {
+ uint32_t multisample_position_palette_index:3;
+ uint32_t num_multisamples:3;
+ uint32_t multisampled_surface_storage_format:1;
+ uint32_t render_target_view_extent:11;
+ uint32_t min_array_elt:11;
+ uint32_t rotation:2;
+ uint32_t force_ncmp_reduce_type:1;
+ } ss4;
+
+ struct {
+ uint32_t mip_count:4;
+ uint32_t min_lod:4;
+ uint32_t pad3:6;
+ uint32_t coherency_type:1;
+ uint32_t pad2:5;
+ uint32_t ewa_disable_for_cube:1;
+ uint32_t y_offset:3;
+ uint32_t pad0:1;
+ uint32_t x_offset:7;
+ } ss5;
+
+ struct {
+ uint32_t pad; /* Multisample Control Surface stuff */
+ } ss6;
+
+ struct {
+ uint32_t resource_min_lod:12;
+
+ /* Only on Haswell */
+ uint32_t pad0:4;
+ uint32_t shader_chanel_select_a:3;
+ uint32_t shader_chanel_select_b:3;
+ uint32_t shader_chanel_select_g:3;
+ uint32_t shader_chanel_select_r:3;
+
+ uint32_t alpha_clear_color:1;
+ uint32_t blue_clear_color:1;
+ uint32_t green_clear_color:1;
+ uint32_t red_clear_color:1;
+ } ss7;
+
+ struct {
+ uint32_t base_addr;
+ } ss8;
+
+ struct {
+ uint32_t base_addr_hi:16;
+ uint32_t pad0:16;
+ } ss9;
+
+ struct {
+ uint32_t pad0:12;
+ uint32_t aux_base_addr:20;
+ } ss10;
+
+ struct {
+ uint32_t aux_base_addr_hi:16;
+ uint32_t pad:16;
+ } ss11;
+
+ struct {
+ uint32_t hiz_depth_clear_value;
+ } ss12;
+
+ struct {
+ uint32_t reserved;
+ } ss13;
+
+ struct {
+ uint32_t reserved;
+ } ss14;
+
+ struct {
+ uint32_t reserved;
+ } ss15;
+};
+
+#endif /* GEN8_MEDIA_H */
diff --git a/lib/media_fill.c b/lib/media_fill.c
index 8ee5db6..b893451 100644
--- a/lib/media_fill.c
+++ b/lib/media_fill.c
@@ -5,5 +5,8 @@ media_fillfunc_t get_media_fillfunc(int devid)
{
media_fillfunc_t fill = NULL;
+ if (IS_GEN8(devid))
+ fill = gen8_media_fillfunc;
+
return fill;
}
diff --git a/lib/media_fill.h b/lib/media_fill.h
index 2e058cb..5edd7b3 100644
--- a/lib/media_fill.h
+++ b/lib/media_fill.h
@@ -47,4 +47,11 @@ typedef void (*media_fillfunc_t)(struct intel_batchbuffer *batch,
media_fillfunc_t get_media_fillfunc(int devid);
+void
+gen8_media_fillfunc(struct intel_batchbuffer *batch,
+ struct scratch_buf *dst,
+ unsigned x, unsigned y,
+ unsigned width, unsigned height,
+ uint8_t color);
+
#endif /* RENDE_MEDIA_FILL_H */
diff --git a/lib/media_fill_gen8.c b/lib/media_fill_gen8.c
new file mode 100644
index 0000000..8536b19
--- /dev/null
+++ b/lib/media_fill_gen8.c
@@ -0,0 +1,366 @@
+#include "media_fill.h"
+#include "gen8_media.h"
+
+#include <assert.h>
+
+#define ALIGN(x, y) (((x) + (y)-1) & ~((y)-1))
+
+static const uint32_t media_kernel[][4] = {
+ { 0x00400001, 0x20202288, 0x00000020, 0x00000000 },
+ { 0x00600001, 0x20800208, 0x008d0000, 0x00000000 },
+ { 0x00200001, 0x20800208, 0x00450040, 0x00000000 },
+ { 0x00000001, 0x20880608, 0x00000000, 0x000f000f },
+ { 0x00800001, 0x20a00208, 0x00000020, 0x00000000 },
+ { 0x00800001, 0x20e00208, 0x00000020, 0x00000000 },
+ { 0x00800001, 0x21200208, 0x00000020, 0x00000000 },
+ { 0x00800001, 0x21600208, 0x00000020, 0x00000000 },
+ { 0x05800031, 0x24000a40, 0x0e000080, 0x120a8000 },
+ { 0x00600001, 0x20800208, 0x008d0000, 0x00000000 },
+ { 0x07800031, 0x24000a40, 0x0e000080, 0x82000010 },
+};
+
+static uint32_t
+batch_used(struct intel_batchbuffer *batch)
+{
+ return batch->ptr - batch->buffer;
+}
+
+static uint32_t
+batch_align(struct intel_batchbuffer *batch, uint32_t align)
+{
+ uint32_t offset = batch_used(batch);
+ offset = ALIGN(offset, align);
+ batch->ptr = batch->buffer + offset;
+ return offset;
+}
+
+static void *
+batch_alloc(struct intel_batchbuffer *batch, uint32_t size, uint32_t align)
+{
+ uint32_t offset = batch_align(batch, align);
+ batch->ptr += size;
+ return memset(batch->buffer + offset, 0, size);
+}
+
+static uint32_t
+batch_offset(struct intel_batchbuffer *batch, void *ptr)
+{
+ return (uint8_t *)ptr - batch->buffer;
+}
+
+static uint32_t
+batch_copy(struct intel_batchbuffer *batch, const void *ptr, uint32_t size, uint32_t align)
+{
+ return batch_offset(batch, memcpy(batch_alloc(batch, size, align), ptr, size));
+}
+
+static void
+gen8_render_flush(struct intel_batchbuffer *batch, uint32_t batch_end)
+{
+ int ret;
+
+ ret = drm_intel_bo_subdata(batch->bo, 0, 4096, batch->buffer);
+ if (ret == 0)
+ ret = drm_intel_bo_mrb_exec(batch->bo, batch_end,
+ NULL, 0, 0, 0);
+ assert(ret == 0);
+}
+
+static uint32_t
+gen8_fill_curbe_buffer_data(struct intel_batchbuffer *batch,
+ uint8_t color)
+{
+ uint8_t *curbe_buffer;
+ uint32_t offset;
+
+ curbe_buffer = batch_alloc(batch, sizeof(uint32_t) * 8, 64);
+ offset = batch_offset(batch, curbe_buffer);
+ *curbe_buffer = color;
+
+ return offset;
+}
+
+static uint32_t
+gen8_fill_surface_state(struct intel_batchbuffer *batch,
+ struct scratch_buf *buf,
+ uint32_t format,
+ int is_dst)
+{
+ struct gen8_surface_state *ss;
+ uint32_t write_domain, read_domain, offset;
+ int ret;
+
+ if (is_dst) {
+ write_domain = read_domain = I915_GEM_DOMAIN_RENDER;
+ } else {
+ write_domain = 0;
+ read_domain = I915_GEM_DOMAIN_SAMPLER;
+ }
+
+ ss = batch_alloc(batch, sizeof(*ss), 64);
+ offset = batch_offset(batch, ss);
+
+ ss->ss0.surface_type = GEN8_SURFACE_2D;
+ ss->ss0.surface_format = format;
+ ss->ss0.render_cache_read_write = 1;
+ ss->ss0.vertical_alignment = 1; /* align 4 */
+ ss->ss0.horizontal_alignment = 1; /* align 4 */
+
+ if (buf->tiling == I915_TILING_X)
+ ss->ss0.tiled_mode = 2;
+ else if (buf->tiling == I915_TILING_Y)
+ ss->ss0.tiled_mode = 3;
+
+ ss->ss8.base_addr = buf->bo->offset;
+
+ ret = drm_intel_bo_emit_reloc(batch->bo,
+ batch_offset(batch, ss) + 8 * 4,
+ buf->bo, 0,
+ read_domain, write_domain);
+ assert(ret == 0);
+
+ ss->ss2.height = buf_height(buf) - 1;
+ ss->ss2.width = buf_width(buf) - 1;
+ ss->ss3.pitch = buf->stride - 1;
+
+ ss->ss7.shader_chanel_select_r = 4;
+ ss->ss7.shader_chanel_select_g = 5;
+ ss->ss7.shader_chanel_select_b = 6;
+ ss->ss7.shader_chanel_select_a = 7;
+
+ return offset;
+}
+
+static uint32_t
+gen8_fill_binding_table(struct intel_batchbuffer *batch,
+ struct scratch_buf *dst)
+{
+ uint32_t *binding_table, offset;
+
+ binding_table = batch_alloc(batch, 32, 64);
+ offset = batch_offset(batch, binding_table);
+
+ binding_table[0] = gen8_fill_surface_state(batch, dst, GEN8_SURFACEFORMAT_R8_UNORM, 1);
+
+ return offset;
+}
+
+static uint32_t
+gen8_fill_media_kernel(struct intel_batchbuffer *batch,
+ const uint32_t kernel[][4],
+ size_t size)
+{
+ uint32_t offset;
+
+ offset = batch_copy(batch, kernel, size, 64);
+
+ return offset;
+}
+
+static uint32_t
+gen8_fill_interface_descriptor(struct intel_batchbuffer *batch, struct scratch_buf *dst)
+{
+ struct gen8_interface_descriptor_data *idd;
+ uint32_t offset;
+ uint32_t binding_table_offset, kernel_offset;
+
+ binding_table_offset = gen8_fill_binding_table(batch, dst);
+ kernel_offset = gen8_fill_media_kernel(batch, media_kernel, sizeof(media_kernel));
+
+ idd = batch_alloc(batch, sizeof(*idd), 64);
+ offset = batch_offset(batch, idd);
+
+ idd->desc0.kernel_start_pointer = (kernel_offset >> 6);
+
+ idd->desc2.single_program_flow = 1;
+ idd->desc2.floating_point_mode = GEN8_FLOATING_POINT_IEEE_754;
+
+ idd->desc3.sampler_count = 0; /* 0 samplers used */
+ idd->desc3.sampler_state_pointer = 0;
+
+ idd->desc4.binding_table_entry_count = 0;
+ idd->desc4.binding_table_pointer = (binding_table_offset >> 5);
+
+ idd->desc5.constant_urb_entry_read_offset = 0;
+ idd->desc5.constant_urb_entry_read_length = 1; /* grf 1 */
+
+ return offset;
+}
+
+static void
+gen8_emit_state_base_address(struct intel_batchbuffer *batch)
+{
+ OUT_BATCH(GEN8_STATE_BASE_ADDRESS | (16 - 2));
+
+ /* general */
+ OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
+ OUT_BATCH(0);
+
+ /* stateless data port */
+ OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
+
+ /* surface */
+ OUT_RELOC(batch->bo, I915_GEM_DOMAIN_SAMPLER, 0, BASE_ADDRESS_MODIFY);
+ OUT_BATCH(0);
+
+ /* dynamic */
+ OUT_RELOC(batch->bo, I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION,
+ 0, BASE_ADDRESS_MODIFY);
+ OUT_BATCH(0);
+
+ /* indirect */
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+
+ /* instruction */
+ OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
+ OUT_BATCH(0);
+
+ /* general state buffer size */
+ OUT_BATCH(0xfffff000 | 1);
+ /* dynamic state buffer size */
+ OUT_BATCH(1 << 12 | 1);
+ /* indirect object buffer size */
+ OUT_BATCH(0xfffff000 | 1);
+ /* intruction buffer size */
+ OUT_BATCH(1 << 12);
+}
+
+static void
+gen8_emit_vfe_state(struct intel_batchbuffer *batch)
+{
+ OUT_BATCH(GEN8_MEDIA_VFE_STATE | (9 - 2));
+
+ /* scratch buffer */
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+
+ /* number of threads & urb entries */
+ OUT_BATCH(1 << 16 |
+ 2 << 8);
+
+ OUT_BATCH(0);
+
+ /* urb entry size & curbe size */
+ OUT_BATCH(2 << 16 |
+ 2);
+
+ /* scoreboard */
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+}
+
+static void
+gen8_emit_curbe_load(struct intel_batchbuffer *batch, uint32_t curbe_buffer)
+{
+ OUT_BATCH(GEN8_MEDIA_CURBE_LOAD | (4 - 2));
+ OUT_BATCH(0);
+ /* curbe total data length */
+ OUT_BATCH(64);
+ /* curbe data start address, is relative to the dynamics base address */
+ OUT_BATCH(curbe_buffer);
+}
+
+static void
+gen8_emit_interface_descriptor_load(struct intel_batchbuffer *batch, uint32_t interface_descriptor)
+{
+ OUT_BATCH(GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD | (4 - 2));
+ OUT_BATCH(0);
+ /* interface descriptor data length */
+ OUT_BATCH(sizeof(struct gen8_interface_descriptor_data));
+ /* interface descriptor address, is relative to the dynamics base address */
+ OUT_BATCH(interface_descriptor);
+}
+
+static void
+gen8_emit_media_objects(struct intel_batchbuffer *batch,
+ unsigned x, unsigned y,
+ unsigned width, unsigned height)
+{
+ int i, j;
+
+ for (i = 0; i < width / 16; i++) {
+ for (j = 0; j < height / 16; j++) {
+ OUT_BATCH(GEN8_MEDIA_OBJECT | (8 - 2));
+
+ /* interface descriptor offset */
+ OUT_BATCH(0);
+
+ /* without indirect data */
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+
+ /* scoreboard */
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+
+ /* inline data (xoffset, yoffset) */
+ OUT_BATCH(x + i * 16);
+ OUT_BATCH(y + j * 16);
+ }
+ }
+}
+
+/*
+ * This sets up the media pipeline,
+ *
+ * +---------------+ <---- 4096
+ * | ^ |
+ * | | |
+ * | various |
+ * | state |
+ * | | |
+ * |_______|_______| <---- 2048 + ?
+ * | ^ |
+ * | | |
+ * | batch |
+ * | commands |
+ * | | |
+ * | | |
+ * +---------------+ <---- 0 + ?
+ *
+ */
+
+#define BATCH_STATE_SPLIT 2048
+
+void
+gen8_media_fillfunc(struct intel_batchbuffer *batch,
+ struct scratch_buf *dst,
+ unsigned x, unsigned y,
+ unsigned width, unsigned height,
+ uint8_t color)
+{
+ uint32_t curbe_buffer, interface_descriptor;
+ uint32_t batch_end;
+
+ intel_batchbuffer_flush(batch);
+
+ /* setup states */
+ batch->ptr = &batch->buffer[BATCH_STATE_SPLIT];
+
+ curbe_buffer = gen8_fill_curbe_buffer_data(batch, color);
+ interface_descriptor = gen8_fill_interface_descriptor(batch, dst);
+ assert(batch->ptr < &batch->buffer[4095]);
+
+ /* media pipeline */
+ batch->ptr = batch->buffer;
+ OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
+ gen8_emit_state_base_address(batch);
+
+ gen8_emit_vfe_state(batch);
+
+ gen8_emit_curbe_load(batch, curbe_buffer);
+
+ gen8_emit_interface_descriptor_load(batch, interface_descriptor);
+
+ gen8_emit_media_objects(batch, x, y, width, height);
+
+ OUT_BATCH(MI_BATCH_BUFFER_END);
+
+ batch_end = batch_align(batch, 8);
+ assert(batch_end < BATCH_STATE_SPLIT);
+
+ gen8_render_flush(batch, batch_end);
+ intel_batchbuffer_reset(batch);
+}
--
1.7.9.5
^ permalink raw reply related [flat|nested] 8+ messages in thread* [Intel gfx][i-g-t PATCH 3/4] tests/gem_media_fill: add support for gen7
2013-11-29 6:57 [Intel gfx][i-g-t PATCH 1/4] tests: add gem_media_fill Xiang, Haihao
2013-11-29 6:57 ` [Intel gfx][i-g-t PATCH 2/4] tests/gem_media_fill: add support for gen8 Xiang, Haihao
@ 2013-11-29 6:57 ` Xiang, Haihao
2013-11-29 6:57 ` [Intel gfx][i-g-t PATCH 4/4] tests/gem_media_fill: the assembly code for the shader used in the case Xiang, Haihao
2013-11-29 8:02 ` [Intel gfx][i-g-t PATCH 1/4] tests: add gem_media_fill Daniel Vetter
3 siblings, 0 replies; 8+ messages in thread
From: Xiang, Haihao @ 2013-11-29 6:57 UTC (permalink / raw)
To: intel-gfx
From: "Xiang, Haihao" <haihao.xiang@intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
---
lib/Makefile.sources | 2 +
lib/gen7_media.h | 323 +++++++++++++++++++++++++++++++++++++++++++++
lib/media_fill.c | 2 +
lib/media_fill.h | 7 +
lib/media_fill_gen7.c | 351 +++++++++++++++++++++++++++++++++++++++++++++++++
5 files changed, 685 insertions(+)
create mode 100644 lib/gen7_media.h
create mode 100644 lib/media_fill_gen7.c
diff --git a/lib/Makefile.sources b/lib/Makefile.sources
index 95ccb2f..fd08c1f 100644
--- a/lib/Makefile.sources
+++ b/lib/Makefile.sources
@@ -21,7 +21,9 @@ libintel_tools_la_SOURCES = \
intel_reg.h \
media_fill.c \
media_fill.h \
+ media_fill_gen7.c \
media_fill_gen8.c \
+ gen7_media.h \
gen8_media.h \
rendercopy_i915.c \
rendercopy_i830.c \
diff --git a/lib/gen7_media.h b/lib/gen7_media.h
new file mode 100644
index 0000000..d75ee1b
--- /dev/null
+++ b/lib/gen7_media.h
@@ -0,0 +1,323 @@
+#ifndef GEN7_MEDIA_H
+#define GEN7_MEDIA_H
+
+#define GEN7_SURFACEFORMAT_R32G32B32A32_FLOAT 0x000
+#define GEN7_SURFACEFORMAT_R32G32B32A32_SINT 0x001
+#define GEN7_SURFACEFORMAT_R32G32B32A32_UINT 0x002
+#define GEN7_SURFACEFORMAT_R32G32B32A32_UNORM 0x003
+#define GEN7_SURFACEFORMAT_R32G32B32A32_SNORM 0x004
+#define GEN7_SURFACEFORMAT_R64G64_FLOAT 0x005
+#define GEN7_SURFACEFORMAT_R32G32B32X32_FLOAT 0x006
+#define GEN7_SURFACEFORMAT_R32G32B32A32_SSCALED 0x007
+#define GEN7_SURFACEFORMAT_R32G32B32A32_USCALED 0x008
+#define GEN7_SURFACEFORMAT_R32G32B32_FLOAT 0x040
+#define GEN7_SURFACEFORMAT_R32G32B32_SINT 0x041
+#define GEN7_SURFACEFORMAT_R32G32B32_UINT 0x042
+#define GEN7_SURFACEFORMAT_R32G32B32_UNORM 0x043
+#define GEN7_SURFACEFORMAT_R32G32B32_SNORM 0x044
+#define GEN7_SURFACEFORMAT_R32G32B32_SSCALED 0x045
+#define GEN7_SURFACEFORMAT_R32G32B32_USCALED 0x046
+#define GEN7_SURFACEFORMAT_R16G16B16A16_UNORM 0x080
+#define GEN7_SURFACEFORMAT_R16G16B16A16_SNORM 0x081
+#define GEN7_SURFACEFORMAT_R16G16B16A16_SINT 0x082
+#define GEN7_SURFACEFORMAT_R16G16B16A16_UINT 0x083
+#define GEN7_SURFACEFORMAT_R16G16B16A16_FLOAT 0x084
+#define GEN7_SURFACEFORMAT_R32G32_FLOAT 0x085
+#define GEN7_SURFACEFORMAT_R32G32_SINT 0x086
+#define GEN7_SURFACEFORMAT_R32G32_UINT 0x087
+#define GEN7_SURFACEFORMAT_R32_FLOAT_X8X24_TYPELESS 0x088
+#define GEN7_SURFACEFORMAT_X32_TYPELESS_G8X24_UINT 0x089
+#define GEN7_SURFACEFORMAT_L32A32_FLOAT 0x08A
+#define GEN7_SURFACEFORMAT_R32G32_UNORM 0x08B
+#define GEN7_SURFACEFORMAT_R32G32_SNORM 0x08C
+#define GEN7_SURFACEFORMAT_R64_FLOAT 0x08D
+#define GEN7_SURFACEFORMAT_R16G16B16X16_UNORM 0x08E
+#define GEN7_SURFACEFORMAT_R16G16B16X16_FLOAT 0x08F
+#define GEN7_SURFACEFORMAT_A32X32_FLOAT 0x090
+#define GEN7_SURFACEFORMAT_L32X32_FLOAT 0x091
+#define GEN7_SURFACEFORMAT_I32X32_FLOAT 0x092
+#define GEN7_SURFACEFORMAT_R16G16B16A16_SSCALED 0x093
+#define GEN7_SURFACEFORMAT_R16G16B16A16_USCALED 0x094
+#define GEN7_SURFACEFORMAT_R32G32_SSCALED 0x095
+#define GEN7_SURFACEFORMAT_R32G32_USCALED 0x096
+#define GEN7_SURFACEFORMAT_B8G8R8A8_UNORM 0x0C0
+#define GEN7_SURFACEFORMAT_B8G8R8A8_UNORM_SRGB 0x0C1
+#define GEN7_SURFACEFORMAT_R10G10B10A2_UNORM 0x0C2
+#define GEN7_SURFACEFORMAT_R10G10B10A2_UNORM_SRGB 0x0C3
+#define GEN7_SURFACEFORMAT_R10G10B10A2_UINT 0x0C4
+#define GEN7_SURFACEFORMAT_R10G10B10_SNORM_A2_UNORM 0x0C5
+#define GEN7_SURFACEFORMAT_R8G8B8A8_UNORM 0x0C7
+#define GEN7_SURFACEFORMAT_R8G8B8A8_UNORM_SRGB 0x0C8
+#define GEN7_SURFACEFORMAT_R8G8B8A8_SNORM 0x0C9
+#define GEN7_SURFACEFORMAT_R8G8B8A8_SINT 0x0CA
+#define GEN7_SURFACEFORMAT_R8G8B8A8_UINT 0x0CB
+#define GEN7_SURFACEFORMAT_R16G16_UNORM 0x0CC
+#define GEN7_SURFACEFORMAT_R16G16_SNORM 0x0CD
+#define GEN7_SURFACEFORMAT_R16G16_SINT 0x0CE
+#define GEN7_SURFACEFORMAT_R16G16_UINT 0x0CF
+#define GEN7_SURFACEFORMAT_R16G16_FLOAT 0x0D0
+#define GEN7_SURFACEFORMAT_B10G10R10A2_UNORM 0x0D1
+#define GEN7_SURFACEFORMAT_B10G10R10A2_UNORM_SRGB 0x0D2
+#define GEN7_SURFACEFORMAT_R11G11B10_FLOAT 0x0D3
+#define GEN7_SURFACEFORMAT_R32_SINT 0x0D6
+#define GEN7_SURFACEFORMAT_R32_UINT 0x0D7
+#define GEN7_SURFACEFORMAT_R32_FLOAT 0x0D8
+#define GEN7_SURFACEFORMAT_R24_UNORM_X8_TYPELESS 0x0D9
+#define GEN7_SURFACEFORMAT_X24_TYPELESS_G8_UINT 0x0DA
+#define GEN7_SURFACEFORMAT_L16A16_UNORM 0x0DF
+#define GEN7_SURFACEFORMAT_I24X8_UNORM 0x0E0
+#define GEN7_SURFACEFORMAT_L24X8_UNORM 0x0E1
+#define GEN7_SURFACEFORMAT_A24X8_UNORM 0x0E2
+#define GEN7_SURFACEFORMAT_I32_FLOAT 0x0E3
+#define GEN7_SURFACEFORMAT_L32_FLOAT 0x0E4
+#define GEN7_SURFACEFORMAT_A32_FLOAT 0x0E5
+#define GEN7_SURFACEFORMAT_B8G8R8X8_UNORM 0x0E9
+#define GEN7_SURFACEFORMAT_B8G8R8X8_UNORM_SRGB 0x0EA
+#define GEN7_SURFACEFORMAT_R8G8B8X8_UNORM 0x0EB
+#define GEN7_SURFACEFORMAT_R8G8B8X8_UNORM_SRGB 0x0EC
+#define GEN7_SURFACEFORMAT_R9G9B9E5_SHAREDEXP 0x0ED
+#define GEN7_SURFACEFORMAT_B10G10R10X2_UNORM 0x0EE
+#define GEN7_SURFACEFORMAT_L16A16_FLOAT 0x0F0
+#define GEN7_SURFACEFORMAT_R32_UNORM 0x0F1
+#define GEN7_SURFACEFORMAT_R32_SNORM 0x0F2
+#define GEN7_SURFACEFORMAT_R10G10B10X2_USCALED 0x0F3
+#define GEN7_SURFACEFORMAT_R8G8B8A8_SSCALED 0x0F4
+#define GEN7_SURFACEFORMAT_R8G8B8A8_USCALED 0x0F5
+#define GEN7_SURFACEFORMAT_R16G16_SSCALED 0x0F6
+#define GEN7_SURFACEFORMAT_R16G16_USCALED 0x0F7
+#define GEN7_SURFACEFORMAT_R32_SSCALED 0x0F8
+#define GEN7_SURFACEFORMAT_R32_USCALED 0x0F9
+#define GEN7_SURFACEFORMAT_B5G6R5_UNORM 0x100
+#define GEN7_SURFACEFORMAT_B5G6R5_UNORM_SRGB 0x101
+#define GEN7_SURFACEFORMAT_B5G5R5A1_UNORM 0x102
+#define GEN7_SURFACEFORMAT_B5G5R5A1_UNORM_SRGB 0x103
+#define GEN7_SURFACEFORMAT_B4G4R4A4_UNORM 0x104
+#define GEN7_SURFACEFORMAT_B4G4R4A4_UNORM_SRGB 0x105
+#define GEN7_SURFACEFORMAT_R8G8_UNORM 0x106
+#define GEN7_SURFACEFORMAT_R8G8_SNORM 0x107
+#define GEN7_SURFACEFORMAT_R8G8_SINT 0x108
+#define GEN7_SURFACEFORMAT_R8G8_UINT 0x109
+#define GEN7_SURFACEFORMAT_R16_UNORM 0x10A
+#define GEN7_SURFACEFORMAT_R16_SNORM 0x10B
+#define GEN7_SURFACEFORMAT_R16_SINT 0x10C
+#define GEN7_SURFACEFORMAT_R16_UINT 0x10D
+#define GEN7_SURFACEFORMAT_R16_FLOAT 0x10E
+#define GEN7_SURFACEFORMAT_I16_UNORM 0x111
+#define GEN7_SURFACEFORMAT_L16_UNORM 0x112
+#define GEN7_SURFACEFORMAT_A16_UNORM 0x113
+#define GEN7_SURFACEFORMAT_L8A8_UNORM 0x114
+#define GEN7_SURFACEFORMAT_I16_FLOAT 0x115
+#define GEN7_SURFACEFORMAT_L16_FLOAT 0x116
+#define GEN7_SURFACEFORMAT_A16_FLOAT 0x117
+#define GEN7_SURFACEFORMAT_R5G5_SNORM_B6_UNORM 0x119
+#define GEN7_SURFACEFORMAT_B5G5R5X1_UNORM 0x11A
+#define GEN7_SURFACEFORMAT_B5G5R5X1_UNORM_SRGB 0x11B
+#define GEN7_SURFACEFORMAT_R8G8_SSCALED 0x11C
+#define GEN7_SURFACEFORMAT_R8G8_USCALED 0x11D
+#define GEN7_SURFACEFORMAT_R16_SSCALED 0x11E
+#define GEN7_SURFACEFORMAT_R16_USCALED 0x11F
+#define GEN7_SURFACEFORMAT_R8_UNORM 0x140
+#define GEN7_SURFACEFORMAT_R8_SNORM 0x141
+#define GEN7_SURFACEFORMAT_R8_SINT 0x142
+#define GEN7_SURFACEFORMAT_R8_UINT 0x143
+#define GEN7_SURFACEFORMAT_A8_UNORM 0x144
+#define GEN7_SURFACEFORMAT_I8_UNORM 0x145
+#define GEN7_SURFACEFORMAT_L8_UNORM 0x146
+#define GEN7_SURFACEFORMAT_P4A4_UNORM 0x147
+#define GEN7_SURFACEFORMAT_A4P4_UNORM 0x148
+#define GEN7_SURFACEFORMAT_R8_SSCALED 0x149
+#define GEN7_SURFACEFORMAT_R8_USCALED 0x14A
+#define GEN7_SURFACEFORMAT_R1_UINT 0x181
+#define GEN7_SURFACEFORMAT_YCRCB_NORMAL 0x182
+#define GEN7_SURFACEFORMAT_YCRCB_SWAPUVY 0x183
+#define GEN7_SURFACEFORMAT_BC1_UNORM 0x186
+#define GEN7_SURFACEFORMAT_BC2_UNORM 0x187
+#define GEN7_SURFACEFORMAT_BC3_UNORM 0x188
+#define GEN7_SURFACEFORMAT_BC4_UNORM 0x189
+#define GEN7_SURFACEFORMAT_BC5_UNORM 0x18A
+#define GEN7_SURFACEFORMAT_BC1_UNORM_SRGB 0x18B
+#define GEN7_SURFACEFORMAT_BC2_UNORM_SRGB 0x18C
+#define GEN7_SURFACEFORMAT_BC3_UNORM_SRGB 0x18D
+#define GEN7_SURFACEFORMAT_MONO8 0x18E
+#define GEN7_SURFACEFORMAT_YCRCB_SWAPUV 0x18F
+#define GEN7_SURFACEFORMAT_YCRCB_SWAPY 0x190
+#define GEN7_SURFACEFORMAT_DXT1_RGB 0x191
+#define GEN7_SURFACEFORMAT_FXT1 0x192
+#define GEN7_SURFACEFORMAT_R8G8B8_UNORM 0x193
+#define GEN7_SURFACEFORMAT_R8G8B8_SNORM 0x194
+#define GEN7_SURFACEFORMAT_R8G8B8_SSCALED 0x195
+#define GEN7_SURFACEFORMAT_R8G8B8_USCALED 0x196
+#define GEN7_SURFACEFORMAT_R64G64B64A64_FLOAT 0x197
+#define GEN7_SURFACEFORMAT_R64G64B64_FLOAT 0x198
+#define GEN7_SURFACEFORMAT_BC4_SNORM 0x199
+#define GEN7_SURFACEFORMAT_BC5_SNORM 0x19A
+#define GEN7_SURFACEFORMAT_R16G16B16_UNORM 0x19C
+#define GEN7_SURFACEFORMAT_R16G16B16_SNORM 0x19D
+#define GEN7_SURFACEFORMAT_R16G16B16_SSCALED 0x19E
+#define GEN7_SURFACEFORMAT_R16G16B16_USCALED 0x19F
+
+#define GEN7_SURFACERETURNFORMAT_FLOAT32 0
+#define GEN7_SURFACERETURNFORMAT_S1 1
+
+#define GEN7_SURFACE_1D 0
+#define GEN7_SURFACE_2D 1
+#define GEN7_SURFACE_3D 2
+#define GEN7_SURFACE_CUBE 3
+#define GEN7_SURFACE_BUFFER 4
+#define GEN7_SURFACE_NULL 7
+
+#define GEN7_FLOATING_POINT_IEEE_754 0
+#define GEN7_FLOATING_POINT_NON_IEEE_754 1
+
+#define GFXPIPE(Pipeline,Opcode,Subopcode) ((3 << 29) | \
+ ((Pipeline) << 27) | \
+ ((Opcode) << 24) | \
+ ((Subopcode) << 16))
+
+#define GEN7_PIPELINE_SELECT GFXPIPE(1, 1, 4)
+# define PIPELINE_SELECT_3D (0 << 0)
+# define PIPELINE_SELECT_MEDIA (1 << 0)
+
+#define GEN7_STATE_BASE_ADDRESS GFXPIPE(0, 1, 1)
+# define BASE_ADDRESS_MODIFY (1 << 0)
+
+#define GEN7_MEDIA_VFE_STATE GFXPIPE(2, 0, 0)
+#define GEN7_MEDIA_CURBE_LOAD GFXPIPE(2, 0, 1)
+#define GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD GFXPIPE(2, 0, 2)
+#define GEN7_MEDIA_OBJECT GFXPIPE(2, 1, 0)
+
+struct gen7_interface_descriptor_data
+{
+ struct {
+ uint32_t pad0:6;
+ uint32_t kernel_start_pointer:26;
+ } desc0;
+
+ struct {
+ uint32_t pad0:7;
+ uint32_t software_exception_enable:1;
+ uint32_t pad1:3;
+ uint32_t maskstack_exception_enable:1;
+ uint32_t pad2:1;
+ uint32_t illegal_opcode_exception_enable:1;
+ uint32_t pad3:2;
+ uint32_t floating_point_mode:1;
+ uint32_t thread_priority:1;
+ uint32_t single_program_flow:1;
+ uint32_t pad4:13;
+ } desc1;
+
+ struct {
+ uint32_t pad0:2;
+ uint32_t sampler_count:3;
+ uint32_t sampler_state_pointer:27;
+ } desc2;
+
+ struct {
+ uint32_t binding_table_entry_count:5;
+ uint32_t binding_table_pointer:27;
+ } desc3;
+
+ struct {
+ uint32_t constant_urb_entry_read_offset:16;
+ uint32_t constant_urb_entry_read_length:16;
+ } desc4;
+
+ struct {
+ uint32_t num_threads:8;
+ uint32_t barrier_return_byte:8;
+ uint32_t shared_local_memory_size:5;
+ uint32_t barrier_enable:1;
+ uint32_t rounding_mode:2;
+ uint32_t barrier_return_grf_offset:8;
+ } desc5;
+
+ struct {
+ uint32_t cross_thread_constant_data_read_length:8;
+ uint32_t pad0:24;
+ } desc6;
+
+ struct {
+ uint32_t pad0;
+ } desc7;
+};
+
+struct gen7_surface_state
+{
+ struct {
+ uint32_t cube_pos_z:1;
+ uint32_t cube_neg_z:1;
+ uint32_t cube_pos_y:1;
+ uint32_t cube_neg_y:1;
+ uint32_t cube_pos_x:1;
+ uint32_t cube_neg_x:1;
+ uint32_t pad2:2;
+ uint32_t render_cache_read_write:1;
+ uint32_t pad1:1;
+ uint32_t surface_array_spacing:1;
+ uint32_t vert_line_stride_ofs:1;
+ uint32_t vert_line_stride:1;
+ uint32_t tiled_mode:2;
+ uint32_t horizontal_alignment:1;
+ uint32_t vertical_alignment:2;
+ uint32_t surface_format:9; /**< BRW_SURFACEFORMAT_x */
+ uint32_t pad0:1;
+ uint32_t is_array:1;
+ uint32_t surface_type:3; /**< BRW_SURFACE_1D/2D/3D/CUBE */
+ } ss0;
+
+ struct {
+ uint32_t base_addr;
+ } ss1;
+
+ struct {
+ uint32_t width:14;
+ uint32_t pad1:2;
+ uint32_t height:14;
+ uint32_t pad0:2;
+ } ss2;
+
+ struct {
+ uint32_t pitch:18;
+ uint32_t pad:3;
+ uint32_t depth:11;
+ } ss3;
+
+ struct {
+ uint32_t multisample_position_palette_index:3;
+ uint32_t num_multisamples:3;
+ uint32_t multisampled_surface_storage_format:1;
+ uint32_t render_target_view_extent:11;
+ uint32_t min_array_elt:11;
+ uint32_t rotation:2;
+ uint32_t pad0:1;
+ } ss4;
+
+ struct {
+ uint32_t mip_count:4;
+ uint32_t min_lod:4;
+ uint32_t pad1:12;
+ uint32_t y_offset:4;
+ uint32_t pad0:1;
+ uint32_t x_offset:7;
+ } ss5;
+
+ struct {
+ uint32_t pad; /* Multisample Control Surface stuff */
+ } ss6;
+
+ struct {
+ uint32_t resource_min_lod:12;
+ uint32_t pad0:4;
+ uint32_t shader_chanel_select_a:3;
+ uint32_t shader_chanel_select_b:3;
+ uint32_t shader_chanel_select_g:3;
+ uint32_t shader_chanel_select_r:3;
+ uint32_t alpha_clear_color:1;
+ uint32_t blue_clear_color:1;
+ uint32_t green_clear_color:1;
+ uint32_t red_clear_color:1;
+ } ss7;
+};
+
+#endif /* GEN7_MEDIA_H */
diff --git a/lib/media_fill.c b/lib/media_fill.c
index b893451..084237f 100644
--- a/lib/media_fill.c
+++ b/lib/media_fill.c
@@ -7,6 +7,8 @@ media_fillfunc_t get_media_fillfunc(int devid)
if (IS_GEN8(devid))
fill = gen8_media_fillfunc;
+ else if (IS_GEN7(devid))
+ fill = gen7_media_fillfunc;
return fill;
}
diff --git a/lib/media_fill.h b/lib/media_fill.h
index 5edd7b3..719eb54 100644
--- a/lib/media_fill.h
+++ b/lib/media_fill.h
@@ -54,4 +54,11 @@ gen8_media_fillfunc(struct intel_batchbuffer *batch,
unsigned width, unsigned height,
uint8_t color);
+void
+gen7_media_fillfunc(struct intel_batchbuffer *batch,
+ struct scratch_buf *dst,
+ unsigned x, unsigned y,
+ unsigned width, unsigned height,
+ uint8_t color);
+
#endif /* RENDE_MEDIA_FILL_H */
diff --git a/lib/media_fill_gen7.c b/lib/media_fill_gen7.c
new file mode 100644
index 0000000..4fbda64
--- /dev/null
+++ b/lib/media_fill_gen7.c
@@ -0,0 +1,351 @@
+#include "media_fill.h"
+#include "gen7_media.h"
+
+#include <assert.h>
+
+#define ALIGN(x, y) (((x) + (y)-1) & ~((y)-1))
+
+static const uint32_t media_kernel[][4] = {
+ { 0x00400001, 0x20200231, 0x00000020, 0x00000000 },
+ { 0x00600001, 0x20800021, 0x008d0000, 0x00000000 },
+ { 0x00200001, 0x20800021, 0x00450040, 0x00000000 },
+ { 0x00000001, 0x20880061, 0x00000000, 0x000f000f },
+ { 0x00800001, 0x20a00021, 0x00000020, 0x00000000 },
+ { 0x00800001, 0x20e00021, 0x00000020, 0x00000000 },
+ { 0x00800001, 0x21200021, 0x00000020, 0x00000000 },
+ { 0x00800001, 0x21600021, 0x00000020, 0x00000000 },
+ { 0x05800031, 0x24001ca8, 0x00000080, 0x120a8000 },
+ { 0x00600001, 0x20800021, 0x008d0000, 0x00000000 },
+ { 0x07800031, 0x24001ca8, 0x00000080, 0x82000010 },
+};
+
+static uint32_t
+batch_used(struct intel_batchbuffer *batch)
+{
+ return batch->ptr - batch->buffer;
+}
+
+static uint32_t
+batch_align(struct intel_batchbuffer *batch, uint32_t align)
+{
+ uint32_t offset = batch_used(batch);
+ offset = ALIGN(offset, align);
+ batch->ptr = batch->buffer + offset;
+ return offset;
+}
+
+static void *
+batch_alloc(struct intel_batchbuffer *batch, uint32_t size, uint32_t align)
+{
+ uint32_t offset = batch_align(batch, align);
+ batch->ptr += size;
+ return memset(batch->buffer + offset, 0, size);
+}
+
+static uint32_t
+batch_offset(struct intel_batchbuffer *batch, void *ptr)
+{
+ return (uint8_t *)ptr - batch->buffer;
+}
+
+static uint32_t
+batch_copy(struct intel_batchbuffer *batch, const void *ptr, uint32_t size, uint32_t align)
+{
+ return batch_offset(batch, memcpy(batch_alloc(batch, size, align), ptr, size));
+}
+
+static void
+gen7_render_flush(struct intel_batchbuffer *batch, uint32_t batch_end)
+{
+ int ret;
+
+ ret = drm_intel_bo_subdata(batch->bo, 0, 4096, batch->buffer);
+ if (ret == 0)
+ ret = drm_intel_bo_mrb_exec(batch->bo, batch_end,
+ NULL, 0, 0, 0);
+ assert(ret == 0);
+}
+
+static uint32_t
+gen7_fill_curbe_buffer_data(struct intel_batchbuffer *batch,
+ uint8_t color)
+{
+ uint8_t *curbe_buffer;
+ uint32_t offset;
+
+ curbe_buffer = batch_alloc(batch, sizeof(uint32_t) * 8, 64);
+ offset = batch_offset(batch, curbe_buffer);
+ *curbe_buffer = color;
+
+ return offset;
+}
+
+static uint32_t
+gen7_fill_surface_state(struct intel_batchbuffer *batch,
+ struct scratch_buf *buf,
+ uint32_t format,
+ int is_dst)
+{
+ struct gen7_surface_state *ss;
+ uint32_t write_domain, read_domain, offset;
+ int ret;
+
+ if (is_dst) {
+ write_domain = read_domain = I915_GEM_DOMAIN_RENDER;
+ } else {
+ write_domain = 0;
+ read_domain = I915_GEM_DOMAIN_SAMPLER;
+ }
+
+ ss = batch_alloc(batch, sizeof(*ss), 64);
+ offset = batch_offset(batch, ss);
+
+ ss->ss0.surface_type = GEN7_SURFACE_2D;
+ ss->ss0.surface_format = format;
+ ss->ss0.render_cache_read_write = 1;
+
+ if (buf->tiling == I915_TILING_X)
+ ss->ss0.tiled_mode = 2;
+ else if (buf->tiling == I915_TILING_Y)
+ ss->ss0.tiled_mode = 3;
+
+ ss->ss1.base_addr = buf->bo->offset;
+ ret = drm_intel_bo_emit_reloc(batch->bo,
+ batch_offset(batch, ss) + 4,
+ buf->bo, 0,
+ read_domain, write_domain);
+ assert(ret == 0);
+
+ ss->ss2.height = buf_height(buf) - 1;
+ ss->ss2.width = buf_width(buf) - 1;
+
+ ss->ss3.pitch = buf->stride - 1;
+
+ ss->ss7.shader_chanel_select_r = 4;
+ ss->ss7.shader_chanel_select_g = 5;
+ ss->ss7.shader_chanel_select_b = 6;
+ ss->ss7.shader_chanel_select_a = 7;
+
+ return offset;
+}
+
+static uint32_t
+gen7_fill_binding_table(struct intel_batchbuffer *batch,
+ struct scratch_buf *dst)
+{
+ uint32_t *binding_table, offset;
+
+ binding_table = batch_alloc(batch, 32, 64);
+ offset = batch_offset(batch, binding_table);
+
+ binding_table[0] = gen7_fill_surface_state(batch, dst, GEN7_SURFACEFORMAT_R8_UNORM, 1);
+
+ return offset;
+}
+
+static uint32_t
+gen7_fill_media_kernel(struct intel_batchbuffer *batch,
+ const uint32_t kernel[][4],
+ size_t size)
+{
+ uint32_t offset;
+
+ offset = batch_copy(batch, kernel, size, 64);
+
+ return offset;
+}
+
+static uint32_t
+gen7_fill_interface_descriptor(struct intel_batchbuffer *batch, struct scratch_buf *dst)
+{
+ struct gen7_interface_descriptor_data *idd;
+ uint32_t offset;
+ uint32_t binding_table_offset, kernel_offset;
+
+ binding_table_offset = gen7_fill_binding_table(batch, dst);
+ kernel_offset = gen7_fill_media_kernel(batch, media_kernel, sizeof(media_kernel));
+
+ idd = batch_alloc(batch, sizeof(*idd), 64);
+ offset = batch_offset(batch, idd);
+
+ idd->desc0.kernel_start_pointer = (kernel_offset >> 6);
+
+ idd->desc1.single_program_flow = 1;
+ idd->desc1.floating_point_mode = GEN7_FLOATING_POINT_IEEE_754;
+
+ idd->desc2.sampler_count = 0; /* 0 samplers used */
+ idd->desc2.sampler_state_pointer = 0;
+
+ idd->desc3.binding_table_entry_count = 0;
+ idd->desc3.binding_table_pointer = (binding_table_offset >> 5);
+
+ idd->desc4.constant_urb_entry_read_offset = 0;
+ idd->desc4.constant_urb_entry_read_length = 1; /* grf 1 */
+
+ return offset;
+}
+
+static void
+gen7_emit_state_base_address(struct intel_batchbuffer *batch)
+{
+ OUT_BATCH(GEN7_STATE_BASE_ADDRESS | (10 - 2));
+
+ /* general */
+ OUT_BATCH(0);
+
+ /* surface */
+ OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
+
+ /* dynamic */
+ OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
+
+ /* indirect */
+ OUT_BATCH(0);
+
+ /* instruction */
+ OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
+
+ /* general/dynamic/indirect/instruction access Bound */
+ OUT_BATCH(0);
+ OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
+ OUT_BATCH(0);
+ OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
+}
+
+static void
+gen7_emit_vfe_state(struct intel_batchbuffer *batch)
+{
+ OUT_BATCH(GEN7_MEDIA_VFE_STATE | (8 - 2));
+
+ /* scratch buffer */
+ OUT_BATCH(0);
+
+ /* number of threads & urb entries */
+ OUT_BATCH(1 << 16 |
+ 2 << 8);
+
+ OUT_BATCH(0);
+
+ /* urb entry size & curbe size */
+ OUT_BATCH(2 << 16 | /* in 256 bits unit */
+ 2); /* in 256 bits unit */
+
+ /* scoreboard */
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+}
+
+static void
+gen7_emit_curbe_load(struct intel_batchbuffer *batch, uint32_t curbe_buffer)
+{
+ OUT_BATCH(GEN7_MEDIA_CURBE_LOAD | (4 - 2));
+ OUT_BATCH(0);
+ /* curbe total data length */
+ OUT_BATCH(64);
+ /* curbe data start address, is relative to the dynamics base address */
+ OUT_BATCH(curbe_buffer);
+}
+
+static void
+gen7_emit_interface_descriptor_load(struct intel_batchbuffer *batch, uint32_t interface_descriptor)
+{
+ OUT_BATCH(GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD | (4 - 2));
+ OUT_BATCH(0);
+ /* interface descriptor data length */
+ OUT_BATCH(sizeof(struct gen7_interface_descriptor_data));
+ /* interface descriptor address, is relative to the dynamics base address */
+ OUT_BATCH(interface_descriptor);
+}
+
+static void
+gen7_emit_media_objects(struct intel_batchbuffer *batch,
+ unsigned x, unsigned y,
+ unsigned width, unsigned height)
+{
+ int i, j;
+
+ for (i = 0; i < width / 16; i++) {
+ for (j = 0; j < height / 16; j++) {
+ OUT_BATCH(GEN7_MEDIA_OBJECT | (8 - 2));
+
+ /* interface descriptor offset */
+ OUT_BATCH(0);
+
+ /* without indirect data */
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+
+ /* scoreboard */
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+
+ /* inline data (xoffset, yoffset) */
+ OUT_BATCH(x + i * 16);
+ OUT_BATCH(y + j * 16);
+ }
+ }
+}
+
+/*
+ * This sets up the media pipeline,
+ *
+ * +---------------+ <---- 4096
+ * | ^ |
+ * | | |
+ * | various |
+ * | state |
+ * | | |
+ * |_______|_______| <---- 2048 + ?
+ * | ^ |
+ * | | |
+ * | batch |
+ * | commands |
+ * | | |
+ * | | |
+ * +---------------+ <---- 0 + ?
+ *
+ */
+
+#define BATCH_STATE_SPLIT 2048
+
+void
+gen7_media_fillfunc(struct intel_batchbuffer *batch,
+ struct scratch_buf *dst,
+ unsigned x, unsigned y,
+ unsigned width, unsigned height,
+ uint8_t color)
+{
+ uint32_t curbe_buffer, interface_descriptor;
+ uint32_t batch_end;
+
+ intel_batchbuffer_flush(batch);
+
+ /* setup states */
+ batch->ptr = &batch->buffer[BATCH_STATE_SPLIT];
+
+ curbe_buffer = gen7_fill_curbe_buffer_data(batch, color);
+ interface_descriptor = gen7_fill_interface_descriptor(batch, dst);
+ assert(batch->ptr < &batch->buffer[4095]);
+
+ /* media pipeline */
+ batch->ptr = batch->buffer;
+ OUT_BATCH(GEN7_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
+ gen7_emit_state_base_address(batch);
+
+ gen7_emit_vfe_state(batch);
+
+ gen7_emit_curbe_load(batch, curbe_buffer);
+
+ gen7_emit_interface_descriptor_load(batch, interface_descriptor);
+
+ gen7_emit_media_objects(batch, x, y, width, height);
+
+ OUT_BATCH(MI_BATCH_BUFFER_END);
+
+ batch_end = batch_align(batch, 8);
+ assert(batch_end < BATCH_STATE_SPLIT);
+
+ gen7_render_flush(batch, batch_end);
+ intel_batchbuffer_reset(batch);
+}
--
1.7.9.5
^ permalink raw reply related [flat|nested] 8+ messages in thread* [Intel gfx][i-g-t PATCH 4/4] tests/gem_media_fill: the assembly code for the shader used in the case
2013-11-29 6:57 [Intel gfx][i-g-t PATCH 1/4] tests: add gem_media_fill Xiang, Haihao
2013-11-29 6:57 ` [Intel gfx][i-g-t PATCH 2/4] tests/gem_media_fill: add support for gen8 Xiang, Haihao
2013-11-29 6:57 ` [Intel gfx][i-g-t PATCH 3/4] tests/gem_media_fill: add support for gen7 Xiang, Haihao
@ 2013-11-29 6:57 ` Xiang, Haihao
2013-11-29 7:36 ` ykzhao
2013-11-29 8:02 ` [Intel gfx][i-g-t PATCH 1/4] tests: add gem_media_fill Daniel Vetter
3 siblings, 1 reply; 8+ messages in thread
From: Xiang, Haihao @ 2013-11-29 6:57 UTC (permalink / raw)
To: intel-gfx
From: "Xiang, Haihao" <haihao.xiang@intel.com>
The code is for reference only
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
---
shaders/media/README | 6 ++++++
shaders/media/media_fill.gxa | 30 ++++++++++++++++++++++++++++++
2 files changed, 36 insertions(+)
create mode 100644 shaders/media/README
create mode 100644 shaders/media/media_fill.gxa
diff --git a/shaders/media/README b/shaders/media/README
new file mode 100644
index 0000000..334106c
--- /dev/null
+++ b/shaders/media/README
@@ -0,0 +1,6 @@
+These files are here for reference only.
+
+Commands used to generate the shader on gen8
+$> m4 media_fill.gxa > media_fill.gxm
+$> intel-gen4asm -g 8 -o <output> media_fill.gxm
+
diff --git a/shaders/media/media_fill.gxa b/shaders/media/media_fill.gxa
new file mode 100644
index 0000000..d2931d4
--- /dev/null
+++ b/shaders/media/media_fill.gxa
@@ -0,0 +1,30 @@
+/*
+ * Registers
+ * g0 -- header
+ * g1 -- constant
+ * g2 -- inline data
+ * g3 -- reserved
+ * g4-g12 message payload
+ */
+define(`ORIG', `g2.0<2,2,1>UD')
+define(`COLOR', `g1.0')
+define(`COLORUB', `COLOR<0,1,0>UB')
+define(`COLORUD', `COLOR<0,1,0>UD')
+
+mov(4) COLOR<1>UB COLORUB {align1};
+
+/* WRITE */
+mov(8) g4.0<1>UD g0.0<8,8,1>UD {align1};
+mov(2) g4.0<1>UD ORIG {align1};
+mov(1) g4.8<1>UD 0x000f000fUD {align1};
+
+mov(16) g5.0<1>UD COLORUD {align1 compr};
+mov(16) g7.0<1>UD COLORUD {align1 compr};
+mov(16) g9.0<1>UD COLORUD {align1 compr};
+mov(16) g11.0<1>UD COLORUD {align1 compr};
+
+send(16) 4 acc0<1>UW null write(0, 0, 10, 0) mlen 9 rlen 0 {align1};
+
+/* EOT */
+mov(8) g4.0<1>UD g0.0<8,8,1>UD {align1};
+send(16) 4 acc0<1>UW null thread_spawner(0, 0, 1) mlen 1 rlen 0 {align1 EOT};
--
1.7.9.5
^ permalink raw reply related [flat|nested] 8+ messages in thread* Re: [Intel gfx][i-g-t PATCH 4/4] tests/gem_media_fill: the assembly code for the shader used in the case
2013-11-29 6:57 ` [Intel gfx][i-g-t PATCH 4/4] tests/gem_media_fill: the assembly code for the shader used in the case Xiang, Haihao
@ 2013-11-29 7:36 ` ykzhao
2013-12-02 1:02 ` Xiang, Haihao
0 siblings, 1 reply; 8+ messages in thread
From: ykzhao @ 2013-11-29 7:36 UTC (permalink / raw)
To: Xiang, Haihao; +Cc: intel-gfx@lists.freedesktop.org
On Thu, 2013-11-28 at 23:57 -0700, Xiang, Haihao wrote:
> From: "Xiang, Haihao" <haihao.xiang@intel.com>
>
> The code is for reference only
>
> Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
> ---
> shaders/media/README | 6 ++++++
> shaders/media/media_fill.gxa | 30 ++++++++++++++++++++++++++++++
> 2 files changed, 36 insertions(+)
> create mode 100644 shaders/media/README
> create mode 100644 shaders/media/media_fill.gxa
>
> diff --git a/shaders/media/README b/shaders/media/README
> new file mode 100644
> index 0000000..334106c
> --- /dev/null
> +++ b/shaders/media/README
> @@ -0,0 +1,6 @@
> +These files are here for reference only.
> +
> +Commands used to generate the shader on gen8
> +$> m4 media_fill.gxa > media_fill.gxm
> +$> intel-gen4asm -g 8 -o <output> media_fill.gxm
> +
> diff --git a/shaders/media/media_fill.gxa b/shaders/media/media_fill.gxa
> new file mode 100644
> index 0000000..d2931d4
> --- /dev/null
> +++ b/shaders/media/media_fill.gxa
> @@ -0,0 +1,30 @@
> +/*
> + * Registers
> + * g0 -- header
> + * g1 -- constant
> + * g2 -- inline data
> + * g3 -- reserved
> + * g4-g12 message payload
> + */
> +define(`ORIG', `g2.0<2,2,1>UD')
> +define(`COLOR', `g1.0')
> +define(`COLORUB', `COLOR<0,1,0>UB')
> +define(`COLORUD', `COLOR<0,1,0>UD')
> +
> +mov(4) COLOR<1>UB COLORUB {align1};
> +
> +/* WRITE */
> +mov(8) g4.0<1>UD g0.0<8,8,1>UD {align1};
> +mov(2) g4.0<1>UD ORIG {align1};
> +mov(1) g4.8<1>UD 0x000f000fUD {align1};
> +
> +mov(16) g5.0<1>UD COLORUD {align1 compr};
> +mov(16) g7.0<1>UD COLORUD {align1 compr};
> +mov(16) g9.0<1>UD COLORUD {align1 compr};
> +mov(16) g11.0<1>UD COLORUD {align1 compr};
> +
> +send(16) 4 acc0<1>UW null write(0, 0, 10, 0) mlen 9 rlen 0 {align1};
> +
> +/* EOT */
> +mov(8) g4.0<1>UD g0.0<8,8,1>UD {align1};
> +send(16) 4 acc0<1>UW null thread_spawner(0, 0, 1) mlen 1 rlen 0 {align1 EOT};
Based on the spec the send with EOT flag should use the register space
r112-r127 for <src>. So 4 had better be changed as 127.
Thanks.
Yakui
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [Intel gfx][i-g-t PATCH 4/4] tests/gem_media_fill: the assembly code for the shader used in the case
2013-11-29 7:36 ` ykzhao
@ 2013-12-02 1:02 ` Xiang, Haihao
0 siblings, 0 replies; 8+ messages in thread
From: Xiang, Haihao @ 2013-12-02 1:02 UTC (permalink / raw)
To: ykzhao; +Cc: intel-gfx@lists.freedesktop.org
> On Thu, 2013-11-28 at 23:57 -0700, Xiang, Haihao wrote:
> > From: "Xiang, Haihao" <haihao.xiang@intel.com>
> >
> > The code is for reference only
> >
> > Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
> > ---
> > shaders/media/README | 6 ++++++
> > shaders/media/media_fill.gxa | 30 ++++++++++++++++++++++++++++++
> > 2 files changed, 36 insertions(+)
> > create mode 100644 shaders/media/README
> > create mode 100644 shaders/media/media_fill.gxa
> >
> > diff --git a/shaders/media/README b/shaders/media/README
> > new file mode 100644
> > index 0000000..334106c
> > --- /dev/null
> > +++ b/shaders/media/README
> > @@ -0,0 +1,6 @@
> > +These files are here for reference only.
> > +
> > +Commands used to generate the shader on gen8
> > +$> m4 media_fill.gxa > media_fill.gxm
> > +$> intel-gen4asm -g 8 -o <output> media_fill.gxm
> > +
> > diff --git a/shaders/media/media_fill.gxa b/shaders/media/media_fill.gxa
> > new file mode 100644
> > index 0000000..d2931d4
> > --- /dev/null
> > +++ b/shaders/media/media_fill.gxa
> > @@ -0,0 +1,30 @@
> > +/*
> > + * Registers
> > + * g0 -- header
> > + * g1 -- constant
> > + * g2 -- inline data
> > + * g3 -- reserved
> > + * g4-g12 message payload
> > + */
> > +define(`ORIG', `g2.0<2,2,1>UD')
> > +define(`COLOR', `g1.0')
> > +define(`COLORUB', `COLOR<0,1,0>UB')
> > +define(`COLORUD', `COLOR<0,1,0>UD')
> > +
> > +mov(4) COLOR<1>UB COLORUB {align1};
> > +
> > +/* WRITE */
> > +mov(8) g4.0<1>UD g0.0<8,8,1>UD {align1};
> > +mov(2) g4.0<1>UD ORIG {align1};
> > +mov(1) g4.8<1>UD 0x000f000fUD {align1};
> > +
> > +mov(16) g5.0<1>UD COLORUD {align1 compr};
> > +mov(16) g7.0<1>UD COLORUD {align1 compr};
> > +mov(16) g9.0<1>UD COLORUD {align1 compr};
> > +mov(16) g11.0<1>UD COLORUD {align1 compr};
> > +
> > +send(16) 4 acc0<1>UW null write(0, 0, 10, 0) mlen 9 rlen 0 {align1};
> > +
> > +/* EOT */
> > +mov(8) g4.0<1>UD g0.0<8,8,1>UD {align1};
> > +send(16) 4 acc0<1>UW null thread_spawner(0, 0, 1) mlen 1 rlen 0 {align1 EOT};
>
> Based on the spec the send with EOT flag should use the register space
> r112-r127 for <src>. So 4 had better be changed as 127.
Thanks for pointing out the issue, I will fix it in the new version of
patches.
>
> Thanks.
> Yakui
>
>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [Intel gfx][i-g-t PATCH 1/4] tests: add gem_media_fill
2013-11-29 6:57 [Intel gfx][i-g-t PATCH 1/4] tests: add gem_media_fill Xiang, Haihao
` (2 preceding siblings ...)
2013-11-29 6:57 ` [Intel gfx][i-g-t PATCH 4/4] tests/gem_media_fill: the assembly code for the shader used in the case Xiang, Haihao
@ 2013-11-29 8:02 ` Daniel Vetter
2013-12-02 1:06 ` Xiang, Haihao
3 siblings, 1 reply; 8+ messages in thread
From: Daniel Vetter @ 2013-11-29 8:02 UTC (permalink / raw)
To: Xiang, Haihao; +Cc: intel-gfx
On Fri, Nov 29, 2013 at 02:57:13PM +0800, Xiang, Haihao wrote:
> From: "Xiang, Haihao" <haihao.xiang@intel.com>
>
> It is to check whether media pipeline on render ring works. Codes
> are copied and modified from the rendercopy case which uses 3D pipeline.
> However media pipeline is simpler than 3D pipeline and there is few changes
> between gen6,gen7 and gen8
>
> Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Really awesome. This should also help in writing crazy multi-ring tests
which check correctness. I don't have any clue about media stuff, so
please let someone else from your team quickly review it before you push.
Otherwise lgtm.
-Daniel
> ---
> lib/Makefile.sources | 2 +
> lib/media_fill.c | 9 ++++
> lib/media_fill.h | 50 ++++++++++++++++++
> tests/Makefile.sources | 1 +
> tests/gem_media_fill.c | 132 ++++++++++++++++++++++++++++++++++++++++++++++++
> 5 files changed, 194 insertions(+)
> create mode 100644 lib/media_fill.c
> create mode 100644 lib/media_fill.h
> create mode 100644 tests/gem_media_fill.c
>
> diff --git a/lib/Makefile.sources b/lib/Makefile.sources
> index 699621b..cad238a 100644
> --- a/lib/Makefile.sources
> +++ b/lib/Makefile.sources
> @@ -19,6 +19,8 @@ libintel_tools_la_SOURCES = \
> intel_mmio.c \
> intel_pci.c \
> intel_reg.h \
> + media_fill.c \
> + media_fill.h \
> rendercopy_i915.c \
> rendercopy_i830.c \
> gen6_render.h \
> diff --git a/lib/media_fill.c b/lib/media_fill.c
> new file mode 100644
> index 0000000..8ee5db6
> --- /dev/null
> +++ b/lib/media_fill.c
> @@ -0,0 +1,9 @@
> +#include "i830_reg.h"
> +#include "media_fill.h"
> +
> +media_fillfunc_t get_media_fillfunc(int devid)
> +{
> + media_fillfunc_t fill = NULL;
> +
> + return fill;
> +}
> diff --git a/lib/media_fill.h b/lib/media_fill.h
> new file mode 100644
> index 0000000..2e058cb
> --- /dev/null
> +++ b/lib/media_fill.h
> @@ -0,0 +1,50 @@
> +#ifndef RENDE_MEDIA_FILL_H
> +#define RENDE_MEDIA_FILL_H
> +
> +#include <stdlib.h>
> +#include <sys/ioctl.h>
> +#include <stdio.h>
> +#include <string.h>
> +#include <assert.h>
> +#include <fcntl.h>
> +#include <inttypes.h>
> +#include <errno.h>
> +#include <sys/stat.h>
> +#include <sys/time.h>
> +#include <getopt.h>
> +#include "drm.h"
> +#include "i915_drm.h"
> +#include "drmtest.h"
> +#include "intel_bufmgr.h"
> +#include "intel_batchbuffer.h"
> +#include "intel_gpu_tools.h"
> +
> +struct scratch_buf {
> + drm_intel_bo *bo;
> + uint32_t stride;
> + uint32_t tiling;
> + uint32_t *data;
> + uint32_t *cpu_mapping;
> + uint32_t size;
> + unsigned num_tiles;
> +};
> +
> +static inline unsigned buf_width(struct scratch_buf *buf)
> +{
> + return buf->stride/sizeof(uint8_t);
> +}
> +
> +static inline unsigned buf_height(struct scratch_buf *buf)
> +{
> + return buf->size/buf->stride;
> +}
> +
> +typedef void (*media_fillfunc_t)(struct intel_batchbuffer *batch,
> + struct scratch_buf *dst,
> + unsigned x, unsigned y,
> + unsigned width, unsigned height,
> + uint8_t color);
> +
> +media_fillfunc_t get_media_fillfunc(int devid);
> +
> +#endif /* RENDE_MEDIA_FILL_H */
> diff --git a/tests/Makefile.sources b/tests/Makefile.sources
> index d201809..0ff0e37 100644
> --- a/tests/Makefile.sources
> +++ b/tests/Makefile.sources
> @@ -87,6 +87,7 @@ TESTS_progs = \
> gem_largeobject \
> gem_lut_handle \
> gem_mmap_offset_exhaustion \
> + gem_media_fill \
> gem_pin \
> gem_pipe_control_store_loop \
> gem_reg_read \
> diff --git a/tests/gem_media_fill.c b/tests/gem_media_fill.c
> new file mode 100644
> index 0000000..40b391d
> --- /dev/null
> +++ b/tests/gem_media_fill.c
> @@ -0,0 +1,132 @@
> +/*
> + * Copyright © 2013 Intel Corporation
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the next
> + * paragraph) shall be included in all copies or substantial portions of the
> + * Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
> + * IN THE SOFTWARE.
> + *
> + * Authors:
> + * Damien Lespiau <damien.lespiau@intel.com>
> + * Xiang, Haihao <haihao.xiang@intel.com>
> + */
> +
> +/*
> + * This file is a basic test for the media_fill() function, a very simple
> + * workload for the Media pipeline.
> + */
> +
> +#include <stdbool.h>
> +#include <unistd.h>
> +#include <cairo.h>
> +
> +#include "media_fill.h"
> +
> +#define WIDTH 64
> +#define STRIDE (WIDTH)
> +#define HEIGHT 64
> +#define SIZE (HEIGHT*STRIDE)
> +
> +#define COLOR_C4 0xc4
> +#define COLOR_4C 0x4c
> +
> +typedef struct {
> + int drm_fd;
> + uint32_t devid;
> + drm_intel_bufmgr *bufmgr;
> + uint8_t linear[WIDTH * HEIGHT];
> +} data_t;
> +
> +static void scratch_buf_init(data_t *data, struct scratch_buf *buf,
> + int width, int height, int stride, uint8_t color)
> +{
> + drm_intel_bo *bo;
> + int i;
> +
> + bo = drm_intel_bo_alloc(data->bufmgr, "", SIZE, 4096);
> + for (i = 0; i < width * height; i++)
> + data->linear[i] = color;
> + gem_write(data->drm_fd, bo->handle, 0, data->linear,
> + sizeof(data->linear));
> +
> + buf->bo = bo;
> + buf->stride = stride;
> + buf->tiling = I915_TILING_NONE;
> + buf->size = SIZE;
> +}
> +
> +static void
> +scratch_buf_check(data_t *data, struct scratch_buf *buf, int x, int y,
> + uint8_t color)
> +{
> + uint8_t val;
> +
> + gem_read(data->drm_fd, buf->bo->handle, 0,
> + data->linear, sizeof(data->linear));
> + val = data->linear[y * WIDTH + x];
> + if (val != color) {
> + fprintf(stderr, "Expected 0x%02x, found 0x%02x at (%d,%d)\n",
> + color, val, x, y);
> + abort();
> + }
> +}
> +
> +int main(int argc, char **argv)
> +{
> + data_t data = {0, };
> + struct intel_batchbuffer *batch = NULL;
> + struct scratch_buf dst;
> + media_fillfunc_t media_fill = NULL;
> + int i, j;
> +
> + igt_fixture {
> + data.drm_fd = drm_open_any_render();
> + data.devid = intel_get_drm_devid(data.drm_fd);
> +
> + data.bufmgr = drm_intel_bufmgr_gem_init(data.drm_fd, 4096);
> + igt_assert(data.bufmgr);
> +
> + media_fill = get_media_fillfunc(data.devid);
> +
> + igt_require_f(media_fill,
> + "no media-fill function\n");
> +
> + batch = intel_batchbuffer_alloc(data.bufmgr, data.devid);
> + igt_assert(batch);
> + }
> +
> + scratch_buf_init(&data, &dst, WIDTH, HEIGHT, STRIDE, COLOR_C4);
> +
> + for (i = 0; i < WIDTH; i++) {
> + for (j = 0; j < HEIGHT; j++) {
> + scratch_buf_check(&data, &dst, i, j, COLOR_C4);
> + }
> + }
> +
> + media_fill(batch,
> + &dst, 0, 0, WIDTH / 2, HEIGHT / 2,
> + COLOR_4C);
> +
> + for (i = 0; i < WIDTH; i++) {
> + for (j = 0; j < HEIGHT; j++) {
> + if (i < WIDTH / 2 && j < HEIGHT / 2)
> + scratch_buf_check(&data, &dst, i, j, COLOR_4C);
> + else
> + scratch_buf_check(&data, &dst, i, j, COLOR_C4);
> + }
> + }
> +}
> --
> 1.7.9.5
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [Intel gfx][i-g-t PATCH 1/4] tests: add gem_media_fill
2013-11-29 8:02 ` [Intel gfx][i-g-t PATCH 1/4] tests: add gem_media_fill Daniel Vetter
@ 2013-12-02 1:06 ` Xiang, Haihao
0 siblings, 0 replies; 8+ messages in thread
From: Xiang, Haihao @ 2013-12-02 1:06 UTC (permalink / raw)
To: Daniel Vetter; +Cc: intel-gfx
On Fri, 2013-11-29 at 09:02 +0100, Daniel Vetter wrote:
> On Fri, Nov 29, 2013 at 02:57:13PM +0800, Xiang, Haihao wrote:
> > From: "Xiang, Haihao" <haihao.xiang@intel.com>
> >
> > It is to check whether media pipeline on render ring works. Codes
> > are copied and modified from the rendercopy case which uses 3D pipeline.
> > However media pipeline is simpler than 3D pipeline and there is few changes
> > between gen6,gen7 and gen8
> >
> > Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
>
> Really awesome. This should also help in writing crazy multi-ring tests
> which check correctness. I don't have any clue about media stuff, so
> please let someone else from your team quickly review it before you push.
> Otherwise lgtm.
Thanks for your comments. I will fix the issue Yakui pointed out first
then push the code.
> -Daniel
>
> > ---
> > lib/Makefile.sources | 2 +
> > lib/media_fill.c | 9 ++++
> > lib/media_fill.h | 50 ++++++++++++++++++
> > tests/Makefile.sources | 1 +
> > tests/gem_media_fill.c | 132 ++++++++++++++++++++++++++++++++++++++++++++++++
> > 5 files changed, 194 insertions(+)
> > create mode 100644 lib/media_fill.c
> > create mode 100644 lib/media_fill.h
> > create mode 100644 tests/gem_media_fill.c
> >
> > diff --git a/lib/Makefile.sources b/lib/Makefile.sources
> > index 699621b..cad238a 100644
> > --- a/lib/Makefile.sources
> > +++ b/lib/Makefile.sources
> > @@ -19,6 +19,8 @@ libintel_tools_la_SOURCES = \
> > intel_mmio.c \
> > intel_pci.c \
> > intel_reg.h \
> > + media_fill.c \
> > + media_fill.h \
> > rendercopy_i915.c \
> > rendercopy_i830.c \
> > gen6_render.h \
> > diff --git a/lib/media_fill.c b/lib/media_fill.c
> > new file mode 100644
> > index 0000000..8ee5db6
> > --- /dev/null
> > +++ b/lib/media_fill.c
> > @@ -0,0 +1,9 @@
> > +#include "i830_reg.h"
> > +#include "media_fill.h"
> > +
> > +media_fillfunc_t get_media_fillfunc(int devid)
> > +{
> > + media_fillfunc_t fill = NULL;
> > +
> > + return fill;
> > +}
> > diff --git a/lib/media_fill.h b/lib/media_fill.h
> > new file mode 100644
> > index 0000000..2e058cb
> > --- /dev/null
> > +++ b/lib/media_fill.h
> > @@ -0,0 +1,50 @@
> > +#ifndef RENDE_MEDIA_FILL_H
> > +#define RENDE_MEDIA_FILL_H
> > +
> > +#include <stdlib.h>
> > +#include <sys/ioctl.h>
> > +#include <stdio.h>
> > +#include <string.h>
> > +#include <assert.h>
> > +#include <fcntl.h>
> > +#include <inttypes.h>
> > +#include <errno.h>
> > +#include <sys/stat.h>
> > +#include <sys/time.h>
> > +#include <getopt.h>
> > +#include "drm.h"
> > +#include "i915_drm.h"
> > +#include "drmtest.h"
> > +#include "intel_bufmgr.h"
> > +#include "intel_batchbuffer.h"
> > +#include "intel_gpu_tools.h"
> > +
> > +struct scratch_buf {
> > + drm_intel_bo *bo;
> > + uint32_t stride;
> > + uint32_t tiling;
> > + uint32_t *data;
> > + uint32_t *cpu_mapping;
> > + uint32_t size;
> > + unsigned num_tiles;
> > +};
> > +
> > +static inline unsigned buf_width(struct scratch_buf *buf)
> > +{
> > + return buf->stride/sizeof(uint8_t);
> > +}
> > +
> > +static inline unsigned buf_height(struct scratch_buf *buf)
> > +{
> > + return buf->size/buf->stride;
> > +}
> > +
> > +typedef void (*media_fillfunc_t)(struct intel_batchbuffer *batch,
> > + struct scratch_buf *dst,
> > + unsigned x, unsigned y,
> > + unsigned width, unsigned height,
> > + uint8_t color);
> > +
> > +media_fillfunc_t get_media_fillfunc(int devid);
> > +
> > +#endif /* RENDE_MEDIA_FILL_H */
> > diff --git a/tests/Makefile.sources b/tests/Makefile.sources
> > index d201809..0ff0e37 100644
> > --- a/tests/Makefile.sources
> > +++ b/tests/Makefile.sources
> > @@ -87,6 +87,7 @@ TESTS_progs = \
> > gem_largeobject \
> > gem_lut_handle \
> > gem_mmap_offset_exhaustion \
> > + gem_media_fill \
> > gem_pin \
> > gem_pipe_control_store_loop \
> > gem_reg_read \
> > diff --git a/tests/gem_media_fill.c b/tests/gem_media_fill.c
> > new file mode 100644
> > index 0000000..40b391d
> > --- /dev/null
> > +++ b/tests/gem_media_fill.c
> > @@ -0,0 +1,132 @@
> > +/*
> > + * Copyright © 2013 Intel Corporation
> > + *
> > + * Permission is hereby granted, free of charge, to any person obtaining a
> > + * copy of this software and associated documentation files (the "Software"),
> > + * to deal in the Software without restriction, including without limitation
> > + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> > + * and/or sell copies of the Software, and to permit persons to whom the
> > + * Software is furnished to do so, subject to the following conditions:
> > + *
> > + * The above copyright notice and this permission notice (including the next
> > + * paragraph) shall be included in all copies or substantial portions of the
> > + * Software.
> > + *
> > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> > + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> > + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> > + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
> > + * IN THE SOFTWARE.
> > + *
> > + * Authors:
> > + * Damien Lespiau <damien.lespiau@intel.com>
> > + * Xiang, Haihao <haihao.xiang@intel.com>
> > + */
> > +
> > +/*
> > + * This file is a basic test for the media_fill() function, a very simple
> > + * workload for the Media pipeline.
> > + */
> > +
> > +#include <stdbool.h>
> > +#include <unistd.h>
> > +#include <cairo.h>
> > +
> > +#include "media_fill.h"
> > +
> > +#define WIDTH 64
> > +#define STRIDE (WIDTH)
> > +#define HEIGHT 64
> > +#define SIZE (HEIGHT*STRIDE)
> > +
> > +#define COLOR_C4 0xc4
> > +#define COLOR_4C 0x4c
> > +
> > +typedef struct {
> > + int drm_fd;
> > + uint32_t devid;
> > + drm_intel_bufmgr *bufmgr;
> > + uint8_t linear[WIDTH * HEIGHT];
> > +} data_t;
> > +
> > +static void scratch_buf_init(data_t *data, struct scratch_buf *buf,
> > + int width, int height, int stride, uint8_t color)
> > +{
> > + drm_intel_bo *bo;
> > + int i;
> > +
> > + bo = drm_intel_bo_alloc(data->bufmgr, "", SIZE, 4096);
> > + for (i = 0; i < width * height; i++)
> > + data->linear[i] = color;
> > + gem_write(data->drm_fd, bo->handle, 0, data->linear,
> > + sizeof(data->linear));
> > +
> > + buf->bo = bo;
> > + buf->stride = stride;
> > + buf->tiling = I915_TILING_NONE;
> > + buf->size = SIZE;
> > +}
> > +
> > +static void
> > +scratch_buf_check(data_t *data, struct scratch_buf *buf, int x, int y,
> > + uint8_t color)
> > +{
> > + uint8_t val;
> > +
> > + gem_read(data->drm_fd, buf->bo->handle, 0,
> > + data->linear, sizeof(data->linear));
> > + val = data->linear[y * WIDTH + x];
> > + if (val != color) {
> > + fprintf(stderr, "Expected 0x%02x, found 0x%02x at (%d,%d)\n",
> > + color, val, x, y);
> > + abort();
> > + }
> > +}
> > +
> > +int main(int argc, char **argv)
> > +{
> > + data_t data = {0, };
> > + struct intel_batchbuffer *batch = NULL;
> > + struct scratch_buf dst;
> > + media_fillfunc_t media_fill = NULL;
> > + int i, j;
> > +
> > + igt_fixture {
> > + data.drm_fd = drm_open_any_render();
> > + data.devid = intel_get_drm_devid(data.drm_fd);
> > +
> > + data.bufmgr = drm_intel_bufmgr_gem_init(data.drm_fd, 4096);
> > + igt_assert(data.bufmgr);
> > +
> > + media_fill = get_media_fillfunc(data.devid);
> > +
> > + igt_require_f(media_fill,
> > + "no media-fill function\n");
> > +
> > + batch = intel_batchbuffer_alloc(data.bufmgr, data.devid);
> > + igt_assert(batch);
> > + }
> > +
> > + scratch_buf_init(&data, &dst, WIDTH, HEIGHT, STRIDE, COLOR_C4);
> > +
> > + for (i = 0; i < WIDTH; i++) {
> > + for (j = 0; j < HEIGHT; j++) {
> > + scratch_buf_check(&data, &dst, i, j, COLOR_C4);
> > + }
> > + }
> > +
> > + media_fill(batch,
> > + &dst, 0, 0, WIDTH / 2, HEIGHT / 2,
> > + COLOR_4C);
> > +
> > + for (i = 0; i < WIDTH; i++) {
> > + for (j = 0; j < HEIGHT; j++) {
> > + if (i < WIDTH / 2 && j < HEIGHT / 2)
> > + scratch_buf_check(&data, &dst, i, j, COLOR_4C);
> > + else
> > + scratch_buf_check(&data, &dst, i, j, COLOR_C4);
> > + }
> > + }
> > +}
> > --
> > 1.7.9.5
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
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