* [PATCH 1/6] drm/i915: Asynchronously perform the set-base for a simple modeset
2013-12-02 13:26 [PATCH 0/6] drm-intel-collector - update Rodrigo Vivi
@ 2013-12-02 13:26 ` Rodrigo Vivi
2013-12-02 13:26 ` [PATCH 2/6] drm/i915: Do hw quiescing first during unload Rodrigo Vivi
` (4 subsequent siblings)
5 siblings, 0 replies; 12+ messages in thread
From: Rodrigo Vivi @ 2013-12-02 13:26 UTC (permalink / raw)
To: intel-gfx
From: Chris Wilson <chris@chris-wilson.co.uk>
A simple modeset, where we only wish to switch over to a new framebuffer
such as the transition from fbcon to X, takes around 30-60ms. This is
due to three factors:
1. We need to make sure the fb->obj is in the display domain, which
incurs a cache flush to ensure no dirt is left on the scanout.
2. We need to flush any pending rendering before performing the mmio
so that the frame is complete before it is shown.
3. We currently wait for the vblank after the mmio to be sure that the
old fb is no longer being shown before releasing it.
(1) can only be eliminated by userspace preparing the fb->obj in advance
to already be in the display domain. This can be done through use of the
create2 ioctl, or by reusing an existing fb->obj.
However, (2) and (3) are already solved by the existing page flip
mechanism, and it is surprisingly trivial to wire them up for use in the
set-base fast path. Though it can be argued that this represents a
subtle ABI break in that the set_config ioctl now returns before the old
framebuffer is unpinned. The danger is that userspace will start to
modify it before it is no longer being shown, however we should be able
to prevent that through proper domain tracking.
By combining all of the above, we can achieve an instaneous set_config:
[ 6.601] (II) intel(0): switch to mode 2560x1440@60.0 on pipe 0 using DP2, position (0, 0), rotation normal
[ 6.601] (II) intel(0): Setting screen physical size to 677 x 381
v2 (by Vivi): page_flip_flag was added to intel_crtc_page_flip
in a previous commit. using 0.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
---
drivers/gpu/drm/i915/intel_display.c | 11 +++++++----
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 0bb3d6d..035588a 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9967,10 +9967,13 @@ static int intel_crtc_set_config(struct drm_mode_set *set)
ret = intel_set_mode(set->crtc, set->mode,
set->x, set->y, set->fb);
} else if (config->fb_changed) {
- intel_crtc_wait_for_pending_flips(set->crtc);
-
- ret = intel_pipe_set_base(set->crtc,
- set->x, set->y, set->fb);
+ if (to_intel_framebuffer(set->fb)->obj->ring == NULL ||
+ save_set.x != set->x || save_set.y != set->y ||
+ intel_crtc_page_flip(set->crtc, set->fb, NULL, 0)) {
+ intel_crtc_wait_for_pending_flips(set->crtc);
+ ret = intel_pipe_set_base(set->crtc,
+ set->x, set->y, set->fb);
+ }
}
if (ret) {
--
1.8.3.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH 2/6] drm/i915: Do hw quiescing first during unload
2013-12-02 13:26 [PATCH 0/6] drm-intel-collector - update Rodrigo Vivi
2013-12-02 13:26 ` [PATCH 1/6] drm/i915: Asynchronously perform the set-base for a simple modeset Rodrigo Vivi
@ 2013-12-02 13:26 ` Rodrigo Vivi
2013-12-05 11:49 ` Daniel Vetter
2013-12-02 13:26 ` [PATCH 3/6] drm/i915: Downgrade pipe state mismatches to DRM_DEBUG_KMS Rodrigo Vivi
` (3 subsequent siblings)
5 siblings, 1 reply; 12+ messages in thread
From: Rodrigo Vivi @ 2013-12-02 13:26 UTC (permalink / raw)
To: intel-gfx
From: Chris Wilson <chris@chris-wilson.co.uk>
If we force the hw to idle as our first step during unload, we can abort
the unload upon failure. Later we can probe whether the hardware remain
active even after we try to shut it down.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
---
drivers/gpu/drm/i915/i915_dma.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 89e4cf1..a5d010c 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1702,6 +1702,12 @@ int i915_driver_unload(struct drm_device *dev)
struct drm_i915_private *dev_priv = dev->dev_private;
int ret;
+ ret = i915_gem_suspend(dev);
+ if (ret) {
+ DRM_ERROR("failed to idle hardware: %d\n", ret);
+ return ret;
+ }
+
intel_gpu_ips_teardown();
/* The i915.ko module is still not prepared to be loaded when
@@ -1715,10 +1721,6 @@ int i915_driver_unload(struct drm_device *dev)
if (dev_priv->mm.inactive_shrinker.scan_objects)
unregister_shrinker(&dev_priv->mm.inactive_shrinker);
- ret = i915_gem_suspend(dev);
- if (ret)
- DRM_ERROR("failed to idle hardware: %d\n", ret);
-
io_mapping_free(dev_priv->gtt.mappable);
arch_phys_wc_del(dev_priv->gtt.mtrr);
--
1.8.3.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH 2/6] drm/i915: Do hw quiescing first during unload
2013-12-02 13:26 ` [PATCH 2/6] drm/i915: Do hw quiescing first during unload Rodrigo Vivi
@ 2013-12-05 11:49 ` Daniel Vetter
0 siblings, 0 replies; 12+ messages in thread
From: Daniel Vetter @ 2013-12-05 11:49 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: intel-gfx
On Mon, Dec 02, 2013 at 11:26:07AM -0200, Rodrigo Vivi wrote:
> From: Chris Wilson <chris@chris-wilson.co.uk>
>
> If we force the hw to idle as our first step during unload, we can abort
> the unload upon failure. Later we can probe whether the hardware remain
> active even after we try to shut it down.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Queued for -next, thanks for the patch.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 3/6] drm/i915: Downgrade pipe state mismatches to DRM_DEBUG_KMS
2013-12-02 13:26 [PATCH 0/6] drm-intel-collector - update Rodrigo Vivi
2013-12-02 13:26 ` [PATCH 1/6] drm/i915: Asynchronously perform the set-base for a simple modeset Rodrigo Vivi
2013-12-02 13:26 ` [PATCH 2/6] drm/i915: Do hw quiescing first during unload Rodrigo Vivi
@ 2013-12-02 13:26 ` Rodrigo Vivi
2013-12-05 11:49 ` Daniel Vetter
2013-12-02 13:26 ` [PATCH 4/6] drm/i915: use __packed instead of __attribute__((packed)) Rodrigo Vivi
` (2 subsequent siblings)
5 siblings, 1 reply; 12+ messages in thread
From: Rodrigo Vivi @ 2013-12-02 13:26 UTC (permalink / raw)
To: intel-gfx
From: Adam Jackson <ajax@redhat.com>
This is, by far, the most common kernel retrace in i915 I'm seeing:
https://retrace.fedoraproject.org/faf/problems/1346879/
There's not enough information in the backtrace to know if something
actually went wrong or if this is just an assertion failure, so it's
pretty useless. Downgrade this to DRM_DEBUG_KMS so we can still see it
if we want it.
Signed-off-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
---
drivers/gpu/drm/i915/intel_display.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 035588a..a403611 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9463,7 +9463,7 @@ check_crtc_state(struct drm_device *dev)
if (active &&
!intel_pipe_config_compare(dev, &crtc->config, &pipe_config)) {
- WARN(1, "pipe state doesn't match!\n");
+ DRM_DEBUG_KMS("pipe state doesn't match!\n");
intel_dump_pipe_config(crtc, &pipe_config,
"[hw state]");
intel_dump_pipe_config(crtc, &crtc->config,
--
1.8.3.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH 3/6] drm/i915: Downgrade pipe state mismatches to DRM_DEBUG_KMS
2013-12-02 13:26 ` [PATCH 3/6] drm/i915: Downgrade pipe state mismatches to DRM_DEBUG_KMS Rodrigo Vivi
@ 2013-12-05 11:49 ` Daniel Vetter
0 siblings, 0 replies; 12+ messages in thread
From: Daniel Vetter @ 2013-12-05 11:49 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: intel-gfx
On Mon, Dec 02, 2013 at 11:26:08AM -0200, Rodrigo Vivi wrote:
> From: Adam Jackson <ajax@redhat.com>
>
> This is, by far, the most common kernel retrace in i915 I'm seeing:
>
> https://retrace.fedoraproject.org/faf/problems/1346879/
>
> There's not enough information in the backtrace to know if something
> actually went wrong or if this is just an assertion failure, so it's
> pretty useless. Downgrade this to DRM_DEBUG_KMS so we can still see it
> if we want it.
>
> Signed-off-by: Adam Jackson <ajax@redhat.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Nacked. I want these reports, and if the default dmesg spam doesn't
contain enough information to make those actionable then we need to fix
that. Atm our approach is to just ask for a drm.debug=0xe log reproducing
the issue, which contains all the relevant information.
If distros don't want to bother, then they can carry this locally.
-Daniel
> ---
> drivers/gpu/drm/i915/intel_display.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 035588a..a403611 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -9463,7 +9463,7 @@ check_crtc_state(struct drm_device *dev)
>
> if (active &&
> !intel_pipe_config_compare(dev, &crtc->config, &pipe_config)) {
> - WARN(1, "pipe state doesn't match!\n");
> + DRM_DEBUG_KMS("pipe state doesn't match!\n");
> intel_dump_pipe_config(crtc, &pipe_config,
> "[hw state]");
> intel_dump_pipe_config(crtc, &crtc->config,
> --
> 1.8.3.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 4/6] drm/i915: use __packed instead of __attribute__((packed))
2013-12-02 13:26 [PATCH 0/6] drm-intel-collector - update Rodrigo Vivi
` (2 preceding siblings ...)
2013-12-02 13:26 ` [PATCH 3/6] drm/i915: Downgrade pipe state mismatches to DRM_DEBUG_KMS Rodrigo Vivi
@ 2013-12-02 13:26 ` Rodrigo Vivi
2013-12-03 11:34 ` Damien Lespiau
2013-12-02 13:26 ` [PATCH 5/6] drm/i915: parse backlight modulation frequency from the BIOS VBT Rodrigo Vivi
2013-12-02 13:26 ` [PATCH 6/6] drm/i915: i830M has watermarks like i855 Rodrigo Vivi
5 siblings, 1 reply; 12+ messages in thread
From: Rodrigo Vivi @ 2013-12-02 13:26 UTC (permalink / raw)
To: intel-gfx; +Cc: Jani Nikula
From: Jani Nikula <jani.nikula@intel.com>
Checkpatch tells me
WARNING: __packed is preferred over __attribute__((packed))
so switch over to __packed across the driver before adding new packed
structs.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
---
drivers/gpu/drm/i915/intel_bios.h | 48 +++++++++++++++++-----------------
drivers/gpu/drm/i915/intel_opregion.c | 8 +++---
drivers/gpu/drm/i915/intel_sdvo_regs.h | 40 ++++++++++++++--------------
3 files changed, 48 insertions(+), 48 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h
index f580a2b..81ed58c 100644
--- a/drivers/gpu/drm/i915/intel_bios.h
+++ b/drivers/gpu/drm/i915/intel_bios.h
@@ -39,7 +39,7 @@ struct vbt_header {
u8 reserved0;
u32 bdb_offset; /**< from beginning of VBT */
u32 aim_offset[4]; /**< from beginning of VBT */
-} __attribute__((packed));
+} __packed;
struct bdb_header {
u8 signature[16]; /**< Always 'BIOS_DATA_BLOCK' */
@@ -65,7 +65,7 @@ struct vbios_data {
u8 rsvd4; /* popup memory size */
u8 resize_pci_bios;
u8 rsvd5; /* is crt already on ddc2 */
-} __attribute__((packed));
+} __packed;
/*
* There are several types of BIOS data blocks (BDBs), each block has
@@ -142,7 +142,7 @@ struct bdb_general_features {
u8 dp_ssc_enb:1; /* PCH attached eDP supports SSC */
u8 dp_ssc_freq:1; /* SSC freq for PCH attached eDP */
u8 rsvd11:3; /* finish byte */
-} __attribute__((packed));
+} __packed;
/* pre-915 */
#define GPIO_PIN_DVI_LVDS 0x03 /* "DVI/LVDS DDC GPIO pins" */
@@ -225,7 +225,7 @@ struct old_child_dev_config {
u8 dvo2_wiring;
u16 extended_type;
u8 dvo_function;
-} __attribute__((packed));
+} __packed;
/* This one contains field offsets that are known to be common for all BDB
* versions. Notice that the meaning of the contents contents may still change,
@@ -238,7 +238,7 @@ struct common_child_dev_config {
u8 not_common2[2];
u8 ddc_pin;
u16 edid_ptr;
-} __attribute__((packed));
+} __packed;
/* This field changes depending on the BDB version, so the most reliable way to
* read it is by checking the BDB version and reading the raw pointer. */
@@ -279,7 +279,7 @@ struct bdb_general_definitions {
* sizeof(child_device_config);
*/
union child_device_config devices[0];
-} __attribute__((packed));
+} __packed;
struct bdb_lvds_options {
u8 panel_type;
@@ -293,7 +293,7 @@ struct bdb_lvds_options {
u8 lvds_edid:1;
u8 rsvd2:1;
u8 rsvd4;
-} __attribute__((packed));
+} __packed;
/* LFP pointer table contains entries to the struct below */
struct bdb_lvds_lfp_data_ptr {
@@ -303,12 +303,12 @@ struct bdb_lvds_lfp_data_ptr {
u8 dvo_table_size;
u16 panel_pnp_id_offset;
u8 pnp_table_size;
-} __attribute__((packed));
+} __packed;
struct bdb_lvds_lfp_data_ptrs {
u8 lvds_entries; /* followed by one or more lvds_data_ptr structs */
struct bdb_lvds_lfp_data_ptr ptr[16];
-} __attribute__((packed));
+} __packed;
/* LFP data has 3 blocks per entry */
struct lvds_fp_timing {
@@ -325,7 +325,7 @@ struct lvds_fp_timing {
u32 pfit_reg;
u32 pfit_reg_val;
u16 terminator;
-} __attribute__((packed));
+} __packed;
struct lvds_dvo_timing {
u16 clock; /**< In 10khz */
@@ -353,7 +353,7 @@ struct lvds_dvo_timing {
u8 vsync_positive:1;
u8 hsync_positive:1;
u8 rsvd2:1;
-} __attribute__((packed));
+} __packed;
struct lvds_pnp_id {
u16 mfg_name;
@@ -361,17 +361,17 @@ struct lvds_pnp_id {
u32 serial;
u8 mfg_week;
u8 mfg_year;
-} __attribute__((packed));
+} __packed;
struct bdb_lvds_lfp_data_entry {
struct lvds_fp_timing fp_timing;
struct lvds_dvo_timing dvo_timing;
struct lvds_pnp_id pnp_id;
-} __attribute__((packed));
+} __packed;
struct bdb_lvds_lfp_data {
struct bdb_lvds_lfp_data_entry data[16];
-} __attribute__((packed));
+} __packed;
struct aimdb_header {
char signature[16];
@@ -379,12 +379,12 @@ struct aimdb_header {
u16 aimdb_version;
u16 aimdb_header_size;
u16 aimdb_size;
-} __attribute__((packed));
+} __packed;
struct aimdb_block {
u8 aimdb_id;
u16 aimdb_size;
-} __attribute__((packed));
+} __packed;
struct vch_panel_data {
u16 fp_timing_offset;
@@ -395,12 +395,12 @@ struct vch_panel_data {
u8 text_fitting_size;
u16 graphics_fitting_offset;
u8 graphics_fitting_size;
-} __attribute__((packed));
+} __packed;
struct vch_bdb_22 {
struct aimdb_block aimdb_block;
struct vch_panel_data panels[16];
-} __attribute__((packed));
+} __packed;
struct bdb_sdvo_lvds_options {
u8 panel_backlight;
@@ -416,7 +416,7 @@ struct bdb_sdvo_lvds_options {
u8 panel_misc_bits_2;
u8 panel_misc_bits_3;
u8 panel_misc_bits_4;
-} __attribute__((packed));
+} __packed;
#define BDB_DRIVER_FEATURE_NO_LVDS 0
@@ -462,7 +462,7 @@ struct bdb_driver_features {
u8 hdmi_termination;
u8 custom_vbt_version;
-} __attribute__((packed));
+} __packed;
#define EDP_18BPP 0
#define EDP_24BPP 1
@@ -487,14 +487,14 @@ struct edp_power_seq {
u16 t9;
u16 t10;
u16 t11_t12;
-} __attribute__ ((packed));
+} __packed;
struct edp_link_params {
u8 rate:4;
u8 lanes:4;
u8 preemphasis:4;
u8 vswing:4;
-} __attribute__ ((packed));
+} __packed;
struct bdb_edp {
struct edp_power_seq power_seqs[16];
@@ -505,7 +505,7 @@ struct bdb_edp {
/* ith bit indicates enabled/disabled for (i+1)th panel */
u16 edp_s3d_feature;
u16 edp_t3_optimization;
-} __attribute__ ((packed));
+} __packed;
void intel_setup_bios(struct drm_device *dev);
int intel_parse_bios(struct drm_device *dev);
@@ -733,6 +733,6 @@ struct bdb_mipi {
u32 hl_switch_cnt;
u32 lp_byte_clk;
u32 clk_lane_switch_cnt;
-} __attribute__((packed));
+} __packed;
#endif /* _I830_BIOS_H_ */
diff --git a/drivers/gpu/drm/i915/intel_opregion.c b/drivers/gpu/drm/i915/intel_opregion.c
index 6506df2..853d13e 100644
--- a/drivers/gpu/drm/i915/intel_opregion.c
+++ b/drivers/gpu/drm/i915/intel_opregion.c
@@ -64,7 +64,7 @@ struct opregion_header {
u8 driver_ver[16];
u32 mboxes;
u8 reserved[164];
-} __attribute__((packed));
+} __packed;
/* OpRegion mailbox #1: public ACPI methods */
struct opregion_acpi {
@@ -86,7 +86,7 @@ struct opregion_acpi {
u32 cnot; /* current OS notification */
u32 nrdy; /* driver status */
u8 rsvd2[60];
-} __attribute__((packed));
+} __packed;
/* OpRegion mailbox #2: SWSCI */
struct opregion_swsci {
@@ -94,7 +94,7 @@ struct opregion_swsci {
u32 parm; /* command parameters */
u32 dslp; /* driver sleep time-out */
u8 rsvd[244];
-} __attribute__((packed));
+} __packed;
/* OpRegion mailbox #3: ASLE */
struct opregion_asle {
@@ -115,7 +115,7 @@ struct opregion_asle {
u32 srot; /* supported rotation angles */
u32 iuer; /* IUER events */
u8 rsvd[86];
-} __attribute__((packed));
+} __packed;
/* Driver readiness indicator */
#define ASLE_ARDY_READY (1 << 0)
diff --git a/drivers/gpu/drm/i915/intel_sdvo_regs.h b/drivers/gpu/drm/i915/intel_sdvo_regs.h
index 770bdd6..2e2d4eb 100644
--- a/drivers/gpu/drm/i915/intel_sdvo_regs.h
+++ b/drivers/gpu/drm/i915/intel_sdvo_regs.h
@@ -59,7 +59,7 @@ struct intel_sdvo_caps {
unsigned int stall_support:1;
unsigned int pad:1;
u16 output_flags;
-} __attribute__((packed));
+} __packed;
/* Note: SDVO detailed timing flags match EDID misc flags. */
#define DTD_FLAG_HSYNC_POSITIVE (1 << 1)
@@ -94,12 +94,12 @@ struct intel_sdvo_dtd {
u8 v_sync_off_high;
u8 reserved;
} part2;
-} __attribute__((packed));
+} __packed;
struct intel_sdvo_pixel_clock_range {
u16 min; /**< pixel clock, in 10kHz units */
u16 max; /**< pixel clock, in 10kHz units */
-} __attribute__((packed));
+} __packed;
struct intel_sdvo_preferred_input_timing_args {
u16 clock;
@@ -108,7 +108,7 @@ struct intel_sdvo_preferred_input_timing_args {
u8 interlace:1;
u8 scaled:1;
u8 pad:6;
-} __attribute__((packed));
+} __packed;
/* I2C registers for SDVO */
#define SDVO_I2C_ARG_0 0x07
@@ -162,7 +162,7 @@ struct intel_sdvo_get_trained_inputs_response {
unsigned int input0_trained:1;
unsigned int input1_trained:1;
unsigned int pad:6;
-} __attribute__((packed));
+} __packed;
/** Returns a struct intel_sdvo_output_flags of active outputs. */
#define SDVO_CMD_GET_ACTIVE_OUTPUTS 0x04
@@ -219,7 +219,7 @@ struct intel_sdvo_get_interrupt_event_source_response {
unsigned int ambient_light_interrupt:1;
unsigned int hdmi_audio_encrypt_change:1;
unsigned int pad:6;
-} __attribute__((packed));
+} __packed;
/**
* Selects which input is affected by future input commands.
@@ -232,7 +232,7 @@ struct intel_sdvo_get_interrupt_event_source_response {
struct intel_sdvo_set_target_input_args {
unsigned int target_1:1;
unsigned int pad:7;
-} __attribute__((packed));
+} __packed;
/**
* Takes a struct intel_sdvo_output_flags of which outputs are targeted by
@@ -370,7 +370,7 @@ struct intel_sdvo_tv_format {
unsigned int hdtv_std_eia_7702a_480i_60:1;
unsigned int hdtv_std_eia_7702a_480p_60:1;
unsigned int pad:3;
-} __attribute__((packed));
+} __packed;
#define SDVO_CMD_GET_TV_FORMAT 0x28
@@ -401,7 +401,7 @@ struct intel_sdvo_sdtv_resolution_request {
unsigned int secam_l:1;
unsigned int secam_60:1;
unsigned int pad:5;
-} __attribute__((packed));
+} __packed;
struct intel_sdvo_sdtv_resolution_reply {
unsigned int res_320x200:1;
@@ -426,7 +426,7 @@ struct intel_sdvo_sdtv_resolution_reply {
unsigned int res_1024x768:1;
unsigned int res_1280x1024:1;
unsigned int pad:5;
-} __attribute__((packed));
+} __packed;
/* Get supported resolution with squire pixel aspect ratio that can be
scaled for the requested HDTV format */
@@ -463,7 +463,7 @@ struct intel_sdvo_hdtv_resolution_request {
unsigned int hdtv_std_eia_7702a_480i_60:1;
unsigned int hdtv_std_eia_7702a_480p_60:1;
unsigned int pad:6;
-} __attribute__((packed));
+} __packed;
struct intel_sdvo_hdtv_resolution_reply {
unsigned int res_640x480:1;
@@ -517,7 +517,7 @@ struct intel_sdvo_hdtv_resolution_reply {
unsigned int res_1280x768:1;
unsigned int pad5:7;
-} __attribute__((packed));
+} __packed;
/* Get supported power state returns info for encoder and monitor, rely on
last SetTargetInput and SetTargetOutput calls */
@@ -557,13 +557,13 @@ struct sdvo_panel_power_sequencing {
unsigned int t4_high:2;
unsigned int pad:6;
-} __attribute__((packed));
+} __packed;
#define SDVO_CMD_GET_MAX_BACKLIGHT_LEVEL 0x30
struct sdvo_max_backlight_reply {
u8 max_value;
u8 default_value;
-} __attribute__((packed));
+} __packed;
#define SDVO_CMD_GET_BACKLIGHT_LEVEL 0x31
#define SDVO_CMD_SET_BACKLIGHT_LEVEL 0x32
@@ -573,14 +573,14 @@ struct sdvo_get_ambient_light_reply {
u16 trip_low;
u16 trip_high;
u16 value;
-} __attribute__((packed));
+} __packed;
#define SDVO_CMD_SET_AMBIENT_LIGHT 0x34
struct sdvo_set_ambient_light_reply {
u16 trip_low;
u16 trip_high;
unsigned int enable:1;
unsigned int pad:7;
-} __attribute__((packed));
+} __packed;
/* Set display power state */
#define SDVO_CMD_SET_DISPLAY_POWER_STATE 0x7d
@@ -608,7 +608,7 @@ struct intel_sdvo_enhancements_reply {
unsigned int dither:1;
unsigned int tv_chroma_filter:1;
unsigned int tv_luma_filter:1;
-} __attribute__((packed));
+} __packed;
/* Picture enhancement limits below are dependent on the current TV format,
* and thus need to be queried and set after it.
@@ -630,7 +630,7 @@ struct intel_sdvo_enhancements_reply {
struct intel_sdvo_enhancement_limits_reply {
u16 max_value;
u16 default_value;
-} __attribute__((packed));
+} __packed;
#define SDVO_CMD_GET_LVDS_PANEL_INFORMATION 0x7f
#define SDVO_CMD_SET_LVDS_PANEL_INFORMATION 0x80
@@ -671,7 +671,7 @@ struct intel_sdvo_enhancement_limits_reply {
#define SDVO_CMD_SET_TV_LUMA_FILTER 0x79
struct intel_sdvo_enhancements_arg {
u16 value;
-} __attribute__((packed));
+} __packed;
#define SDVO_CMD_GET_DOT_CRAWL 0x70
#define SDVO_CMD_SET_DOT_CRAWL 0x71
@@ -727,4 +727,4 @@ struct intel_sdvo_enhancements_arg {
struct intel_sdvo_encode {
u8 dvi_rev;
u8 hdmi_rev;
-} __attribute__ ((packed));
+} __packed;
--
1.8.3.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH 4/6] drm/i915: use __packed instead of __attribute__((packed))
2013-12-02 13:26 ` [PATCH 4/6] drm/i915: use __packed instead of __attribute__((packed)) Rodrigo Vivi
@ 2013-12-03 11:34 ` Damien Lespiau
0 siblings, 0 replies; 12+ messages in thread
From: Damien Lespiau @ 2013-12-03 11:34 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: Jani Nikula, intel-gfx
On Mon, Dec 02, 2013 at 11:26:09AM -0200, Rodrigo Vivi wrote:
> From: Jani Nikula <jani.nikula@intel.com>
>
> Checkpatch tells me
>
> WARNING: __packed is preferred over __attribute__((packed))
>
> so switch over to __packed across the driver before adding new packed
> structs.
>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
--
Damien
> ---
> drivers/gpu/drm/i915/intel_bios.h | 48 +++++++++++++++++-----------------
> drivers/gpu/drm/i915/intel_opregion.c | 8 +++---
> drivers/gpu/drm/i915/intel_sdvo_regs.h | 40 ++++++++++++++--------------
> 3 files changed, 48 insertions(+), 48 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h
> index f580a2b..81ed58c 100644
> --- a/drivers/gpu/drm/i915/intel_bios.h
> +++ b/drivers/gpu/drm/i915/intel_bios.h
> @@ -39,7 +39,7 @@ struct vbt_header {
> u8 reserved0;
> u32 bdb_offset; /**< from beginning of VBT */
> u32 aim_offset[4]; /**< from beginning of VBT */
> -} __attribute__((packed));
> +} __packed;
>
> struct bdb_header {
> u8 signature[16]; /**< Always 'BIOS_DATA_BLOCK' */
> @@ -65,7 +65,7 @@ struct vbios_data {
> u8 rsvd4; /* popup memory size */
> u8 resize_pci_bios;
> u8 rsvd5; /* is crt already on ddc2 */
> -} __attribute__((packed));
> +} __packed;
>
> /*
> * There are several types of BIOS data blocks (BDBs), each block has
> @@ -142,7 +142,7 @@ struct bdb_general_features {
> u8 dp_ssc_enb:1; /* PCH attached eDP supports SSC */
> u8 dp_ssc_freq:1; /* SSC freq for PCH attached eDP */
> u8 rsvd11:3; /* finish byte */
> -} __attribute__((packed));
> +} __packed;
>
> /* pre-915 */
> #define GPIO_PIN_DVI_LVDS 0x03 /* "DVI/LVDS DDC GPIO pins" */
> @@ -225,7 +225,7 @@ struct old_child_dev_config {
> u8 dvo2_wiring;
> u16 extended_type;
> u8 dvo_function;
> -} __attribute__((packed));
> +} __packed;
>
> /* This one contains field offsets that are known to be common for all BDB
> * versions. Notice that the meaning of the contents contents may still change,
> @@ -238,7 +238,7 @@ struct common_child_dev_config {
> u8 not_common2[2];
> u8 ddc_pin;
> u16 edid_ptr;
> -} __attribute__((packed));
> +} __packed;
>
> /* This field changes depending on the BDB version, so the most reliable way to
> * read it is by checking the BDB version and reading the raw pointer. */
> @@ -279,7 +279,7 @@ struct bdb_general_definitions {
> * sizeof(child_device_config);
> */
> union child_device_config devices[0];
> -} __attribute__((packed));
> +} __packed;
>
> struct bdb_lvds_options {
> u8 panel_type;
> @@ -293,7 +293,7 @@ struct bdb_lvds_options {
> u8 lvds_edid:1;
> u8 rsvd2:1;
> u8 rsvd4;
> -} __attribute__((packed));
> +} __packed;
>
> /* LFP pointer table contains entries to the struct below */
> struct bdb_lvds_lfp_data_ptr {
> @@ -303,12 +303,12 @@ struct bdb_lvds_lfp_data_ptr {
> u8 dvo_table_size;
> u16 panel_pnp_id_offset;
> u8 pnp_table_size;
> -} __attribute__((packed));
> +} __packed;
>
> struct bdb_lvds_lfp_data_ptrs {
> u8 lvds_entries; /* followed by one or more lvds_data_ptr structs */
> struct bdb_lvds_lfp_data_ptr ptr[16];
> -} __attribute__((packed));
> +} __packed;
>
> /* LFP data has 3 blocks per entry */
> struct lvds_fp_timing {
> @@ -325,7 +325,7 @@ struct lvds_fp_timing {
> u32 pfit_reg;
> u32 pfit_reg_val;
> u16 terminator;
> -} __attribute__((packed));
> +} __packed;
>
> struct lvds_dvo_timing {
> u16 clock; /**< In 10khz */
> @@ -353,7 +353,7 @@ struct lvds_dvo_timing {
> u8 vsync_positive:1;
> u8 hsync_positive:1;
> u8 rsvd2:1;
> -} __attribute__((packed));
> +} __packed;
>
> struct lvds_pnp_id {
> u16 mfg_name;
> @@ -361,17 +361,17 @@ struct lvds_pnp_id {
> u32 serial;
> u8 mfg_week;
> u8 mfg_year;
> -} __attribute__((packed));
> +} __packed;
>
> struct bdb_lvds_lfp_data_entry {
> struct lvds_fp_timing fp_timing;
> struct lvds_dvo_timing dvo_timing;
> struct lvds_pnp_id pnp_id;
> -} __attribute__((packed));
> +} __packed;
>
> struct bdb_lvds_lfp_data {
> struct bdb_lvds_lfp_data_entry data[16];
> -} __attribute__((packed));
> +} __packed;
>
> struct aimdb_header {
> char signature[16];
> @@ -379,12 +379,12 @@ struct aimdb_header {
> u16 aimdb_version;
> u16 aimdb_header_size;
> u16 aimdb_size;
> -} __attribute__((packed));
> +} __packed;
>
> struct aimdb_block {
> u8 aimdb_id;
> u16 aimdb_size;
> -} __attribute__((packed));
> +} __packed;
>
> struct vch_panel_data {
> u16 fp_timing_offset;
> @@ -395,12 +395,12 @@ struct vch_panel_data {
> u8 text_fitting_size;
> u16 graphics_fitting_offset;
> u8 graphics_fitting_size;
> -} __attribute__((packed));
> +} __packed;
>
> struct vch_bdb_22 {
> struct aimdb_block aimdb_block;
> struct vch_panel_data panels[16];
> -} __attribute__((packed));
> +} __packed;
>
> struct bdb_sdvo_lvds_options {
> u8 panel_backlight;
> @@ -416,7 +416,7 @@ struct bdb_sdvo_lvds_options {
> u8 panel_misc_bits_2;
> u8 panel_misc_bits_3;
> u8 panel_misc_bits_4;
> -} __attribute__((packed));
> +} __packed;
>
>
> #define BDB_DRIVER_FEATURE_NO_LVDS 0
> @@ -462,7 +462,7 @@ struct bdb_driver_features {
>
> u8 hdmi_termination;
> u8 custom_vbt_version;
> -} __attribute__((packed));
> +} __packed;
>
> #define EDP_18BPP 0
> #define EDP_24BPP 1
> @@ -487,14 +487,14 @@ struct edp_power_seq {
> u16 t9;
> u16 t10;
> u16 t11_t12;
> -} __attribute__ ((packed));
> +} __packed;
>
> struct edp_link_params {
> u8 rate:4;
> u8 lanes:4;
> u8 preemphasis:4;
> u8 vswing:4;
> -} __attribute__ ((packed));
> +} __packed;
>
> struct bdb_edp {
> struct edp_power_seq power_seqs[16];
> @@ -505,7 +505,7 @@ struct bdb_edp {
> /* ith bit indicates enabled/disabled for (i+1)th panel */
> u16 edp_s3d_feature;
> u16 edp_t3_optimization;
> -} __attribute__ ((packed));
> +} __packed;
>
> void intel_setup_bios(struct drm_device *dev);
> int intel_parse_bios(struct drm_device *dev);
> @@ -733,6 +733,6 @@ struct bdb_mipi {
> u32 hl_switch_cnt;
> u32 lp_byte_clk;
> u32 clk_lane_switch_cnt;
> -} __attribute__((packed));
> +} __packed;
>
> #endif /* _I830_BIOS_H_ */
> diff --git a/drivers/gpu/drm/i915/intel_opregion.c b/drivers/gpu/drm/i915/intel_opregion.c
> index 6506df2..853d13e 100644
> --- a/drivers/gpu/drm/i915/intel_opregion.c
> +++ b/drivers/gpu/drm/i915/intel_opregion.c
> @@ -64,7 +64,7 @@ struct opregion_header {
> u8 driver_ver[16];
> u32 mboxes;
> u8 reserved[164];
> -} __attribute__((packed));
> +} __packed;
>
> /* OpRegion mailbox #1: public ACPI methods */
> struct opregion_acpi {
> @@ -86,7 +86,7 @@ struct opregion_acpi {
> u32 cnot; /* current OS notification */
> u32 nrdy; /* driver status */
> u8 rsvd2[60];
> -} __attribute__((packed));
> +} __packed;
>
> /* OpRegion mailbox #2: SWSCI */
> struct opregion_swsci {
> @@ -94,7 +94,7 @@ struct opregion_swsci {
> u32 parm; /* command parameters */
> u32 dslp; /* driver sleep time-out */
> u8 rsvd[244];
> -} __attribute__((packed));
> +} __packed;
>
> /* OpRegion mailbox #3: ASLE */
> struct opregion_asle {
> @@ -115,7 +115,7 @@ struct opregion_asle {
> u32 srot; /* supported rotation angles */
> u32 iuer; /* IUER events */
> u8 rsvd[86];
> -} __attribute__((packed));
> +} __packed;
>
> /* Driver readiness indicator */
> #define ASLE_ARDY_READY (1 << 0)
> diff --git a/drivers/gpu/drm/i915/intel_sdvo_regs.h b/drivers/gpu/drm/i915/intel_sdvo_regs.h
> index 770bdd6..2e2d4eb 100644
> --- a/drivers/gpu/drm/i915/intel_sdvo_regs.h
> +++ b/drivers/gpu/drm/i915/intel_sdvo_regs.h
> @@ -59,7 +59,7 @@ struct intel_sdvo_caps {
> unsigned int stall_support:1;
> unsigned int pad:1;
> u16 output_flags;
> -} __attribute__((packed));
> +} __packed;
>
> /* Note: SDVO detailed timing flags match EDID misc flags. */
> #define DTD_FLAG_HSYNC_POSITIVE (1 << 1)
> @@ -94,12 +94,12 @@ struct intel_sdvo_dtd {
> u8 v_sync_off_high;
> u8 reserved;
> } part2;
> -} __attribute__((packed));
> +} __packed;
>
> struct intel_sdvo_pixel_clock_range {
> u16 min; /**< pixel clock, in 10kHz units */
> u16 max; /**< pixel clock, in 10kHz units */
> -} __attribute__((packed));
> +} __packed;
>
> struct intel_sdvo_preferred_input_timing_args {
> u16 clock;
> @@ -108,7 +108,7 @@ struct intel_sdvo_preferred_input_timing_args {
> u8 interlace:1;
> u8 scaled:1;
> u8 pad:6;
> -} __attribute__((packed));
> +} __packed;
>
> /* I2C registers for SDVO */
> #define SDVO_I2C_ARG_0 0x07
> @@ -162,7 +162,7 @@ struct intel_sdvo_get_trained_inputs_response {
> unsigned int input0_trained:1;
> unsigned int input1_trained:1;
> unsigned int pad:6;
> -} __attribute__((packed));
> +} __packed;
>
> /** Returns a struct intel_sdvo_output_flags of active outputs. */
> #define SDVO_CMD_GET_ACTIVE_OUTPUTS 0x04
> @@ -219,7 +219,7 @@ struct intel_sdvo_get_interrupt_event_source_response {
> unsigned int ambient_light_interrupt:1;
> unsigned int hdmi_audio_encrypt_change:1;
> unsigned int pad:6;
> -} __attribute__((packed));
> +} __packed;
>
> /**
> * Selects which input is affected by future input commands.
> @@ -232,7 +232,7 @@ struct intel_sdvo_get_interrupt_event_source_response {
> struct intel_sdvo_set_target_input_args {
> unsigned int target_1:1;
> unsigned int pad:7;
> -} __attribute__((packed));
> +} __packed;
>
> /**
> * Takes a struct intel_sdvo_output_flags of which outputs are targeted by
> @@ -370,7 +370,7 @@ struct intel_sdvo_tv_format {
> unsigned int hdtv_std_eia_7702a_480i_60:1;
> unsigned int hdtv_std_eia_7702a_480p_60:1;
> unsigned int pad:3;
> -} __attribute__((packed));
> +} __packed;
>
> #define SDVO_CMD_GET_TV_FORMAT 0x28
>
> @@ -401,7 +401,7 @@ struct intel_sdvo_sdtv_resolution_request {
> unsigned int secam_l:1;
> unsigned int secam_60:1;
> unsigned int pad:5;
> -} __attribute__((packed));
> +} __packed;
>
> struct intel_sdvo_sdtv_resolution_reply {
> unsigned int res_320x200:1;
> @@ -426,7 +426,7 @@ struct intel_sdvo_sdtv_resolution_reply {
> unsigned int res_1024x768:1;
> unsigned int res_1280x1024:1;
> unsigned int pad:5;
> -} __attribute__((packed));
> +} __packed;
>
> /* Get supported resolution with squire pixel aspect ratio that can be
> scaled for the requested HDTV format */
> @@ -463,7 +463,7 @@ struct intel_sdvo_hdtv_resolution_request {
> unsigned int hdtv_std_eia_7702a_480i_60:1;
> unsigned int hdtv_std_eia_7702a_480p_60:1;
> unsigned int pad:6;
> -} __attribute__((packed));
> +} __packed;
>
> struct intel_sdvo_hdtv_resolution_reply {
> unsigned int res_640x480:1;
> @@ -517,7 +517,7 @@ struct intel_sdvo_hdtv_resolution_reply {
>
> unsigned int res_1280x768:1;
> unsigned int pad5:7;
> -} __attribute__((packed));
> +} __packed;
>
> /* Get supported power state returns info for encoder and monitor, rely on
> last SetTargetInput and SetTargetOutput calls */
> @@ -557,13 +557,13 @@ struct sdvo_panel_power_sequencing {
>
> unsigned int t4_high:2;
> unsigned int pad:6;
> -} __attribute__((packed));
> +} __packed;
>
> #define SDVO_CMD_GET_MAX_BACKLIGHT_LEVEL 0x30
> struct sdvo_max_backlight_reply {
> u8 max_value;
> u8 default_value;
> -} __attribute__((packed));
> +} __packed;
>
> #define SDVO_CMD_GET_BACKLIGHT_LEVEL 0x31
> #define SDVO_CMD_SET_BACKLIGHT_LEVEL 0x32
> @@ -573,14 +573,14 @@ struct sdvo_get_ambient_light_reply {
> u16 trip_low;
> u16 trip_high;
> u16 value;
> -} __attribute__((packed));
> +} __packed;
> #define SDVO_CMD_SET_AMBIENT_LIGHT 0x34
> struct sdvo_set_ambient_light_reply {
> u16 trip_low;
> u16 trip_high;
> unsigned int enable:1;
> unsigned int pad:7;
> -} __attribute__((packed));
> +} __packed;
>
> /* Set display power state */
> #define SDVO_CMD_SET_DISPLAY_POWER_STATE 0x7d
> @@ -608,7 +608,7 @@ struct intel_sdvo_enhancements_reply {
> unsigned int dither:1;
> unsigned int tv_chroma_filter:1;
> unsigned int tv_luma_filter:1;
> -} __attribute__((packed));
> +} __packed;
>
> /* Picture enhancement limits below are dependent on the current TV format,
> * and thus need to be queried and set after it.
> @@ -630,7 +630,7 @@ struct intel_sdvo_enhancements_reply {
> struct intel_sdvo_enhancement_limits_reply {
> u16 max_value;
> u16 default_value;
> -} __attribute__((packed));
> +} __packed;
>
> #define SDVO_CMD_GET_LVDS_PANEL_INFORMATION 0x7f
> #define SDVO_CMD_SET_LVDS_PANEL_INFORMATION 0x80
> @@ -671,7 +671,7 @@ struct intel_sdvo_enhancement_limits_reply {
> #define SDVO_CMD_SET_TV_LUMA_FILTER 0x79
> struct intel_sdvo_enhancements_arg {
> u16 value;
> -} __attribute__((packed));
> +} __packed;
>
> #define SDVO_CMD_GET_DOT_CRAWL 0x70
> #define SDVO_CMD_SET_DOT_CRAWL 0x71
> @@ -727,4 +727,4 @@ struct intel_sdvo_enhancements_arg {
> struct intel_sdvo_encode {
> u8 dvi_rev;
> u8 hdmi_rev;
> -} __attribute__ ((packed));
> +} __packed;
> --
> 1.8.3.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 5/6] drm/i915: parse backlight modulation frequency from the BIOS VBT
2013-12-02 13:26 [PATCH 0/6] drm-intel-collector - update Rodrigo Vivi
` (3 preceding siblings ...)
2013-12-02 13:26 ` [PATCH 4/6] drm/i915: use __packed instead of __attribute__((packed)) Rodrigo Vivi
@ 2013-12-02 13:26 ` Rodrigo Vivi
2013-12-06 12:45 ` Rodrigo Vivi
2013-12-02 13:26 ` [PATCH 6/6] drm/i915: i830M has watermarks like i855 Rodrigo Vivi
5 siblings, 1 reply; 12+ messages in thread
From: Rodrigo Vivi @ 2013-12-02 13:26 UTC (permalink / raw)
To: intel-gfx; +Cc: Jani Nikula
From: Jani Nikula <jani.nikula@intel.com>
We don't actually do anything with the information yet, but parse and
log what's in the VBT.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
---
drivers/gpu/drm/i915/i915_drv.h | 5 +++++
drivers/gpu/drm/i915/intel_bios.c | 29 +++++++++++++++++++++++++++++
drivers/gpu/drm/i915/intel_bios.h | 16 ++++++++++++++++
3 files changed, 50 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 780f815..687eee2 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1185,6 +1185,11 @@ struct intel_vbt_data {
int edp_bpp;
struct edp_power_seq edp_pps;
+ struct {
+ u16 pwm_freq_hz;
+ bool active_low_pwm;
+ } backlight;
+
/* MIPI DSI */
struct {
u16 panel_id;
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index e4fba39..720ce55 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -281,6 +281,34 @@ parse_lfp_panel_data(struct drm_i915_private *dev_priv,
}
}
+static void
+parse_lfp_backlight(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
+{
+ const struct bdb_lfp_backlight_data *backlight_data;
+ const struct bdb_lfp_backlight_data_entry *entry;
+
+ backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
+ if (!backlight_data)
+ return;
+
+ if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
+ DRM_DEBUG_KMS("Unsupported backlight data entry size %u\n",
+ backlight_data->entry_size);
+ return;
+ }
+
+ entry = &backlight_data->data[panel_type];
+
+ dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
+ dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm;
+ DRM_DEBUG_KMS("VBT backlight PWM modulation frequency %u Hz, "
+ "active %s, min brightness %u, level %u\n",
+ dev_priv->vbt.backlight.pwm_freq_hz,
+ dev_priv->vbt.backlight.active_low_pwm ? "low" : "high",
+ entry->min_brightness,
+ backlight_data->level[panel_type]);
+}
+
/* Try to find sdvo panel data */
static void
parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
@@ -894,6 +922,7 @@ intel_parse_bios(struct drm_device *dev)
parse_general_features(dev_priv, bdb);
parse_general_definitions(dev_priv, bdb);
parse_lfp_panel_data(dev_priv, bdb);
+ parse_lfp_backlight(dev_priv, bdb);
parse_sdvo_panel_data(dev_priv, bdb);
parse_sdvo_device_mapping(dev_priv, bdb);
parse_device_mapping(dev_priv, bdb);
diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h
index 81ed58c..282de5e 100644
--- a/drivers/gpu/drm/i915/intel_bios.h
+++ b/drivers/gpu/drm/i915/intel_bios.h
@@ -373,6 +373,22 @@ struct bdb_lvds_lfp_data {
struct bdb_lvds_lfp_data_entry data[16];
} __packed;
+struct bdb_lfp_backlight_data_entry {
+ u8 type:2;
+ u8 active_low_pwm:1;
+ u8 obsolete1:5;
+ u16 pwm_freq_hz;
+ u8 min_brightness;
+ u8 obsolete2;
+ u8 obsolete3;
+} __packed;
+
+struct bdb_lfp_backlight_data {
+ u8 entry_size;
+ struct bdb_lfp_backlight_data_entry data[16];
+ u8 level[16];
+} __packed;
+
struct aimdb_header {
char signature[16];
char oem_device[20];
--
1.8.3.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH 5/6] drm/i915: parse backlight modulation frequency from the BIOS VBT
2013-12-02 13:26 ` [PATCH 5/6] drm/i915: parse backlight modulation frequency from the BIOS VBT Rodrigo Vivi
@ 2013-12-06 12:45 ` Rodrigo Vivi
0 siblings, 0 replies; 12+ messages in thread
From: Rodrigo Vivi @ 2013-12-06 12:45 UTC (permalink / raw)
To: intel-gfx; +Cc: Jani Nikula
Hi Jani,
On Mon, Dec 2, 2013 at 11:26 AM, Rodrigo Vivi <rodrigo.vivi@gmail.com> wrote:
> From: Jani Nikula <jani.nikula@intel.com>
>
> We don't actually do anything with the information yet, but parse and
> log what's in the VBT.
>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 5 +++++
> drivers/gpu/drm/i915/intel_bios.c | 29 +++++++++++++++++++++++++++++
> drivers/gpu/drm/i915/intel_bios.h | 16 ++++++++++++++++
> 3 files changed, 50 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 780f815..687eee2 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1185,6 +1185,11 @@ struct intel_vbt_data {
> int edp_bpp;
> struct edp_power_seq edp_pps;
>
> + struct {
> + u16 pwm_freq_hz;
> + bool active_low_pwm;
> + } backlight;
> +
> /* MIPI DSI */
> struct {
> u16 panel_id;
> diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
> index e4fba39..720ce55 100644
> --- a/drivers/gpu/drm/i915/intel_bios.c
> +++ b/drivers/gpu/drm/i915/intel_bios.c
> @@ -281,6 +281,34 @@ parse_lfp_panel_data(struct drm_i915_private *dev_priv,
> }
> }
>
> +static void
> +parse_lfp_backlight(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
> +{
> + const struct bdb_lfp_backlight_data *backlight_data;
> + const struct bdb_lfp_backlight_data_entry *entry;
> +
> + backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
> + if (!backlight_data)
> + return;
> +
> + if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
> + DRM_DEBUG_KMS("Unsupported backlight data entry size %u\n",
> + backlight_data->entry_size);
> + return;
> + }
> +
> + entry = &backlight_data->data[panel_type];
> +
> + dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
> + dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm;
> + DRM_DEBUG_KMS("VBT backlight PWM modulation frequency %u Hz, "
> + "active %s, min brightness %u, level %u\n",
> + dev_priv->vbt.backlight.pwm_freq_hz,
> + dev_priv->vbt.backlight.active_low_pwm ? "low" : "high",
> + entry->min_brightness,
> + backlight_data->level[panel_type]);
> +}
> +
> /* Try to find sdvo panel data */
> static void
> parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
> @@ -894,6 +922,7 @@ intel_parse_bios(struct drm_device *dev)
> parse_general_features(dev_priv, bdb);
> parse_general_definitions(dev_priv, bdb);
> parse_lfp_panel_data(dev_priv, bdb);
> + parse_lfp_backlight(dev_priv, bdb);
> parse_sdvo_panel_data(dev_priv, bdb);
> parse_sdvo_device_mapping(dev_priv, bdb);
> parse_device_mapping(dev_priv, bdb);
> diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h
> index 81ed58c..282de5e 100644
> --- a/drivers/gpu/drm/i915/intel_bios.h
> +++ b/drivers/gpu/drm/i915/intel_bios.h
> @@ -373,6 +373,22 @@ struct bdb_lvds_lfp_data {
> struct bdb_lvds_lfp_data_entry data[16];
> } __packed;
>
> +struct bdb_lfp_backlight_data_entry {
> + u8 type:2;
> + u8 active_low_pwm:1;
I'd prefer inverted_polarity for this bit.
> + u8 obsolete1:5;
> + u16 pwm_freq_hz;
> + u8 min_brightness;
> + u8 obsolete2;
> + u8 obsolete3;
> +} __packed;
> +
> +struct bdb_lfp_backlight_data {
> + u8 entry_size;
> + struct bdb_lfp_backlight_data_entry data[16];
> + u8 level[16];
> +} __packed;
> +
> struct aimdb_header {
> char signature[16];
> char oem_device[20];
> --
> 1.8.3.1
>
with or without my bikeshed,
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
--
Rodrigo Vivi
Blog: http://blog.vivi.eng.br
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 6/6] drm/i915: i830M has watermarks like i855
2013-12-02 13:26 [PATCH 0/6] drm-intel-collector - update Rodrigo Vivi
` (4 preceding siblings ...)
2013-12-02 13:26 ` [PATCH 5/6] drm/i915: parse backlight modulation frequency from the BIOS VBT Rodrigo Vivi
@ 2013-12-02 13:26 ` Rodrigo Vivi
2013-12-02 14:27 ` Thomas Richter
5 siblings, 1 reply; 12+ messages in thread
From: Rodrigo Vivi @ 2013-12-02 13:26 UTC (permalink / raw)
To: intel-gfx; +Cc: Daniel Vetter, Thomas Richter
From: Daniel Vetter <daniel.vetter@ffwll.ch>
So shuffle the checks around a bit. Also give all the structs and
functions proper prefixes: i830_ for the dual-pipe mobile platforms
and i845_ for the two single-pipe desktop platforms.
Note that the max fifo value isn't actually correct for the i830M, but
since we don't frob the fifo split we don't actually need it. This is
different for some gen3 devices where we need the full fifo for self
refresh mode.
Cc: Thomas Richter <richter@rus.uni-stuttgart.de>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
---
drivers/gpu/drm/i915/intel_pm.c | 53 +++++++++++++++--------------------------
1 file changed, 19 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index e6d98fe..d5bfc63 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -824,7 +824,7 @@ static int i9xx_get_fifo_size(struct drm_device *dev, int plane)
return size;
}
-static int i85x_get_fifo_size(struct drm_device *dev, int plane)
+static int i830_get_fifo_size(struct drm_device *dev, int plane)
{
struct drm_i915_private *dev_priv = dev->dev_private;
uint32_t dsparb = I915_READ(DSPARB);
@@ -857,21 +857,6 @@ static int i845_get_fifo_size(struct drm_device *dev, int plane)
return size;
}
-static int i830_get_fifo_size(struct drm_device *dev, int plane)
-{
- struct drm_i915_private *dev_priv = dev->dev_private;
- uint32_t dsparb = I915_READ(DSPARB);
- int size;
-
- size = dsparb & 0x7f;
- size >>= 1; /* Convert to cachelines */
-
- DRM_DEBUG_KMS("FIFO size - (0x%08x) %s: %d\n", dsparb,
- plane ? "B" : "A", size);
-
- return size;
-}
-
/* Pineview has different values for various configs */
static const struct intel_watermark_params pineview_display_wm = {
PINEVIEW_DISPLAY_FIFO,
@@ -950,14 +935,14 @@ static const struct intel_watermark_params i915_wm_info = {
2,
I915_FIFO_LINE_SIZE
};
-static const struct intel_watermark_params i855_wm_info = {
+static const struct intel_watermark_params i830_wm_info = {
I855GM_FIFO_SIZE,
I915_MAX_WM,
1,
2,
I830_FIFO_LINE_SIZE
};
-static const struct intel_watermark_params i830_wm_info = {
+static const struct intel_watermark_params i845_wm_info = {
I830_FIFO_SIZE,
I915_MAX_WM,
1,
@@ -1574,7 +1559,7 @@ static void i9xx_update_wm(struct drm_crtc *unused_crtc)
else if (!IS_GEN2(dev))
wm_info = &i915_wm_info;
else
- wm_info = &i855_wm_info;
+ wm_info = &i830_wm_info;
fifo_size = dev_priv->display.get_fifo_size(dev, 0);
crtc = intel_get_crtc_for_plane(dev, 0);
@@ -1681,7 +1666,7 @@ static void i9xx_update_wm(struct drm_crtc *unused_crtc)
}
}
-static void i830_update_wm(struct drm_crtc *unused_crtc)
+static void i845_update_wm(struct drm_crtc *unused_crtc)
{
struct drm_device *dev = unused_crtc->dev;
struct drm_i915_private *dev_priv = dev->dev_private;
@@ -1696,7 +1681,7 @@ static void i830_update_wm(struct drm_crtc *unused_crtc)
adjusted_mode = &to_intel_crtc(crtc)->config.adjusted_mode;
planea_wm = intel_calculate_wm(adjusted_mode->crtc_clock,
- &i830_wm_info,
+ &i845_wm_info,
dev_priv->display.get_fifo_size(dev, 0),
4, latency_ns);
fwater_lo = I915_READ(FW_BLC) & ~0xfff;
@@ -6073,21 +6058,21 @@ void intel_init_pm(struct drm_device *dev)
dev_priv->display.update_wm = i9xx_update_wm;
dev_priv->display.get_fifo_size = i9xx_get_fifo_size;
dev_priv->display.init_clock_gating = gen3_init_clock_gating;
- } else if (IS_I865G(dev)) {
- dev_priv->display.update_wm = i830_update_wm;
- dev_priv->display.init_clock_gating = i85x_init_clock_gating;
- dev_priv->display.get_fifo_size = i830_get_fifo_size;
- } else if (IS_I85X(dev)) {
- dev_priv->display.update_wm = i9xx_update_wm;
- dev_priv->display.get_fifo_size = i85x_get_fifo_size;
- dev_priv->display.init_clock_gating = i85x_init_clock_gating;
- } else {
- dev_priv->display.update_wm = i830_update_wm;
- dev_priv->display.init_clock_gating = i830_init_clock_gating;
- if (IS_845G(dev))
+ } else if (IS_GEN2(dev)) {
+ if (INTEL_INFO(dev)->num_pipes == 1) {
+ dev_priv->display.update_wm = i845_update_wm;
dev_priv->display.get_fifo_size = i845_get_fifo_size;
- else
+ } else {
+ dev_priv->display.update_wm = i9xx_update_wm;
dev_priv->display.get_fifo_size = i830_get_fifo_size;
+ }
+
+ if (IS_I85X(dev) || IS_I865G(dev))
+ dev_priv->display.init_clock_gating = i85x_init_clock_gating;
+ else
+ dev_priv->display.init_clock_gating = i830_init_clock_gating;
+ } else {
+ DRM_ERROR("unexpected fall-through in intel_init_pm\n");
}
}
--
1.8.3.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH 6/6] drm/i915: i830M has watermarks like i855
2013-12-02 13:26 ` [PATCH 6/6] drm/i915: i830M has watermarks like i855 Rodrigo Vivi
@ 2013-12-02 14:27 ` Thomas Richter
0 siblings, 0 replies; 12+ messages in thread
From: Thomas Richter @ 2013-12-02 14:27 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: Daniel Vetter, intel-gfx
On 12/02/2013 02:26 PM, Rodrigo Vivi wrote:
> From: Daniel Vetter<daniel.vetter@ffwll.ch>
>
> So shuffle the checks around a bit. Also give all the structs and
> functions proper prefixes: i830_ for the dual-pipe mobile platforms
> and i845_ for the two single-pipe desktop platforms.
>
> Note that the max fifo value isn't actually correct for the i830M, but
> since we don't frob the fifo split we don't actually need it. This is
> different for some gen3 devices where we need the full fifo for self
> refresh mode.
>
Thanks, will try, possibly next Friday. I'm unfortunately booked until then.
Greetings,
Thomas
^ permalink raw reply [flat|nested] 12+ messages in thread