From: "Souza, Jose" <jose.souza@intel.com>
To: "Pandiyan, Dhinakaran" <dhinakaran.pandiyan@intel.com>
Cc: "intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>,
"Vivi, Rodrigo" <rodrigo.vivi@intel.com>
Subject: Re: [PATCH 5/6] drm/i915/psr: Rename intel_crtc_state has_psr to can_psr
Date: Fri, 16 Mar 2018 22:22:04 +0000 [thread overview]
Message-ID: <1521238743.10625.3.camel@intel.com> (raw)
In-Reply-To: <1521167641.28442.47.camel@dk-H97M-D3H>
On Thu, 2018-03-15 at 19:09 -0700, Pandiyan, Dhinakaran wrote:
>
>
> On Wed, 2018-03-14 at 15:36 -0700, José Roberto de Souza wrote:
> > This value is a match of hardware and sink has PSR + if it can be
> > enabled by the requested state, see intel_psr_compute_config().
> >
> > Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> > ---
> > drivers/gpu/drm/i915/intel_drv.h | 4 ++--
> > drivers/gpu/drm/i915/intel_psr.c | 12 ++++++------
> > 2 files changed, 8 insertions(+), 8 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_drv.h
> > b/drivers/gpu/drm/i915/intel_drv.h
> > index a215aa78b0be..cccaf84415ab 100644
> > --- a/drivers/gpu/drm/i915/intel_drv.h
> > +++ b/drivers/gpu/drm/i915/intel_drv.h
> > @@ -807,8 +807,8 @@ struct intel_crtc_state {
> > struct intel_link_m_n dp_m2_n2;
> > bool has_drrs;
> >
> > - bool has_psr;
> > - bool has_psr2;
> > + bool can_psr;
> > + bool can_psr2;
>
>
> I am not convinced by this change, the computed state either has PSR1
> or
> PSR2, "can" connotes ambiguity in my opinion.
Computed state can have PSR1 and PSR2 set.
>
>
> I was thinking of converting this to an u8 psr = [0,1,2] to mean no
> PSR,
> PSR1 and PSR2 respectively. We can do away with the has/can confusion
> :)
>
> Using bool does save us 6 bits though depending on how the structure
> is
> packed.
I almost did this but I just renamed to do less changes. But cool I
will rename it to psr and have 0, 1 or 2 values.
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next prev parent reply other threads:[~2018-03-16 22:22 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-14 22:36 [PATCH 1/6] drm/i915/psr: Nuke aux_frame_sync José Roberto de Souza
2018-03-14 22:36 ` [PATCH 2/6] drm/i915/psr: Tie PSR2 support to Y coordinate requirement in intel_psr_init_dpcd() José Roberto de Souza
2018-03-16 0:35 ` Rodrigo Vivi
2018-03-16 1:04 ` Souza, Jose
2018-03-16 1:16 ` Rodrigo Vivi
2018-03-14 22:36 ` [PATCH 3/6] drm/i915/psr: Enable Y-coordinate support in source José Roberto de Souza
2018-03-16 0:28 ` Rodrigo Vivi
2018-03-16 1:29 ` Pandiyan, Dhinakaran
2018-03-14 22:36 ` [PATCH 4/6] drm/i915/psr: Do not override PSR2 sink support José Roberto de Souza
2018-03-14 22:36 ` [PATCH 5/6] drm/i915/psr: Rename intel_crtc_state has_psr to can_psr José Roberto de Souza
2018-03-16 2:09 ` Pandiyan, Dhinakaran
2018-03-16 22:22 ` Souza, Jose [this message]
2018-03-14 22:36 ` [PATCH 6/6] drm/i915/psr: Enable aux frame sync in source José Roberto de Souza
2018-03-16 0:31 ` Rodrigo Vivi
2018-03-16 1:34 ` Pandiyan, Dhinakaran
2018-03-14 23:10 ` ✗ Fi.CI.BAT: failure for series starting with [1/6] drm/i915/psr: Nuke aux_frame_sync Patchwork
2018-03-16 0:29 ` [PATCH 1/6] " Rodrigo Vivi
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