public inbox for intel-gfx@lists.freedesktop.org
 help / color / mirror / Atom feed
From: "José Roberto de Souza" <jose.souza@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>,
	Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: [PATCH 5/6] drm/i915/psr: Rename intel_crtc_state has_psr to can_psr
Date: Wed, 14 Mar 2018 15:36:16 -0700	[thread overview]
Message-ID: <20180314223617.20122-5-jose.souza@intel.com> (raw)
In-Reply-To: <20180314223617.20122-1-jose.souza@intel.com>

This value is a match of hardware and sink has PSR + if it can be
enabled by the requested state, see intel_psr_compute_config().

Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/intel_drv.h |  4 ++--
 drivers/gpu/drm/i915/intel_psr.c | 12 ++++++------
 2 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index a215aa78b0be..cccaf84415ab 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -807,8 +807,8 @@ struct intel_crtc_state {
 	struct intel_link_m_n dp_m2_n2;
 	bool has_drrs;
 
-	bool has_psr;
-	bool has_psr2;
+	bool can_psr;
+	bool can_psr2;
 
 	/*
 	 * Frequence the dpll for the port should run at. Differs from the
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 4cb613855c20..d622e37894d4 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -560,9 +560,9 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
 		return;
 	}
 
-	crtc_state->has_psr = true;
-	crtc_state->has_psr2 = intel_psr2_config_valid(intel_dp, crtc_state);
-	DRM_DEBUG_KMS("Enabling PSR%s\n", crtc_state->has_psr2 ? "2" : "");
+	crtc_state->can_psr = true;
+	crtc_state->can_psr2 = intel_psr2_config_valid(intel_dp, crtc_state);
+	DRM_DEBUG_KMS("Enabling PSR%s\n", crtc_state->can_psr2 ? "2" : "");
 }
 
 static void intel_psr_activate(struct intel_dp *intel_dp)
@@ -632,7 +632,7 @@ void intel_psr_enable(struct intel_dp *intel_dp,
 	struct drm_device *dev = intel_dig_port->base.base.dev;
 	struct drm_i915_private *dev_priv = to_i915(dev);
 
-	if (!crtc_state->has_psr)
+	if (!crtc_state->can_psr)
 		return;
 
 	if (WARN_ON(!CAN_PSR(dev_priv)))
@@ -645,7 +645,7 @@ void intel_psr_enable(struct intel_dp *intel_dp,
 		goto unlock;
 	}
 
-	dev_priv->psr.psr2_enabled = crtc_state->has_psr2;
+	dev_priv->psr.psr2_enabled = crtc_state->can_psr2;
 	dev_priv->psr.busy_frontbuffer_bits = 0;
 
 	dev_priv->psr.setup_vsc(intel_dp, crtc_state);
@@ -767,7 +767,7 @@ void intel_psr_disable(struct intel_dp *intel_dp,
 	struct drm_device *dev = intel_dig_port->base.base.dev;
 	struct drm_i915_private *dev_priv = to_i915(dev);
 
-	if (!old_crtc_state->has_psr)
+	if (!old_crtc_state->can_psr)
 		return;
 
 	if (WARN_ON(!CAN_PSR(dev_priv)))
-- 
2.16.2

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2018-03-14 22:39 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-14 22:36 [PATCH 1/6] drm/i915/psr: Nuke aux_frame_sync José Roberto de Souza
2018-03-14 22:36 ` [PATCH 2/6] drm/i915/psr: Tie PSR2 support to Y coordinate requirement in intel_psr_init_dpcd() José Roberto de Souza
2018-03-16  0:35   ` Rodrigo Vivi
2018-03-16  1:04     ` Souza, Jose
2018-03-16  1:16       ` Rodrigo Vivi
2018-03-14 22:36 ` [PATCH 3/6] drm/i915/psr: Enable Y-coordinate support in source José Roberto de Souza
2018-03-16  0:28   ` Rodrigo Vivi
2018-03-16  1:29     ` Pandiyan, Dhinakaran
2018-03-14 22:36 ` [PATCH 4/6] drm/i915/psr: Do not override PSR2 sink support José Roberto de Souza
2018-03-14 22:36 ` José Roberto de Souza [this message]
2018-03-16  2:09   ` [PATCH 5/6] drm/i915/psr: Rename intel_crtc_state has_psr to can_psr Pandiyan, Dhinakaran
2018-03-16 22:22     ` Souza, Jose
2018-03-14 22:36 ` [PATCH 6/6] drm/i915/psr: Enable aux frame sync in source José Roberto de Souza
2018-03-16  0:31   ` Rodrigo Vivi
2018-03-16  1:34   ` Pandiyan, Dhinakaran
2018-03-14 23:10 ` ✗ Fi.CI.BAT: failure for series starting with [1/6] drm/i915/psr: Nuke aux_frame_sync Patchwork
2018-03-16  0:29 ` [PATCH 1/6] " Rodrigo Vivi

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20180314223617.20122-5-jose.souza@intel.com \
    --to=jose.souza@intel.com \
    --cc=dhinakaran.pandiyan@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=rodrigo.vivi@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox