From: Ben Widawsky <ben@bwidawsk.net>
To: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 01/26] drm/i915: move NEEDS_FORCE_WAKE to i915_drv.c
Date: Thu, 22 Mar 2012 15:20:51 -0700 [thread overview]
Message-ID: <20120322222051.GA13950@bolo_yeung.jf.intel.com> (raw)
In-Reply-To: <1332452348-8814-2-git-send-email-jbarnes@virtuousgeek.org>
On Thu, Mar 22, 2012 at 02:38:43PM -0700, Jesse Barnes wrote:
> It's only used by the main read/write functions, so we can keep it with
> them.
>
> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> ---
> drivers/gpu/drm/i915/i915_drv.c | 6 ++++++
> drivers/gpu/drm/i915/i915_drv.h | 6 ------
> 2 files changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 0694e17..06533cb 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -979,6 +979,12 @@ MODULE_AUTHOR(DRIVER_AUTHOR);
> MODULE_DESCRIPTION(DRIVER_DESC);
> MODULE_LICENSE("GPL and additional rights");
>
> +/* We give fast paths for the really cool registers */
> +#define NEEDS_FORCE_WAKE(dev_priv, reg) \
> + (((dev_priv)->info->gen >= 6) && \
> + ((reg) < 0x40000) && \
> + ((reg) != FORCEWAKE))
> +
> #define __i915_read(x, y) \
> u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg) { \
> u##x val = 0; \
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index c0f19f5..83ace70 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1429,12 +1429,6 @@ void gen6_gt_force_wake_get(struct drm_i915_private *dev_priv);
> void gen6_gt_force_wake_put(struct drm_i915_private *dev_priv);
> int __gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv);
>
> -/* We give fast paths for the really cool registers */
> -#define NEEDS_FORCE_WAKE(dev_priv, reg) \
> - (((dev_priv)->info->gen >= 6) && \
> - ((reg) < 0x40000) && \
> - ((reg) != FORCEWAKE))
> -
> #define __i915_read(x, y) \
> u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg);
>
> --
Any reason why you changed tabs to spaces on the macro? Also, you may as
well line the macro up a bit better if you end up redoing the patch. The
earlier macro had more stuff which could fit within 80 characters, but
now it should fit.
either way,
Acked-by: Ben Widawsky <ben@bwidawsk.net>
next prev parent reply other threads:[~2012-03-22 22:21 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-03-22 21:38 [RFCv2] ValleyView support Jesse Barnes
2012-03-22 21:38 ` [PATCH 01/26] drm/i915: move NEEDS_FORCE_WAKE to i915_drv.c Jesse Barnes
2012-03-22 22:20 ` Ben Widawsky [this message]
2012-03-23 22:46 ` Daniel Vetter
2012-03-22 21:38 ` [PATCH 02/26] drm/i915: re-order GT IIR bit definitions Jesse Barnes
2012-03-22 22:25 ` Ben Widawsky
2012-03-23 22:46 ` Daniel Vetter
2012-03-22 21:38 ` [PATCH 03/26] drm/i915: add ValleyView driver structs and IS_VALLEYVIEW macro Jesse Barnes
2012-03-22 22:31 ` Ben Widawsky
2012-03-22 21:38 ` [PATCH 04/26] drm/i915: ValleyView watermark support Jesse Barnes
2012-03-23 3:29 ` Ben Widawsky
2012-03-23 9:51 ` Daniel Vetter
2012-03-24 2:46 ` Ben Widawsky
2012-03-22 21:38 ` [PATCH 05/26] drm/i915: PLL defines for VLV Jesse Barnes
2012-03-23 3:35 ` Ben Widawsky
2012-03-22 21:38 ` [PATCH 06/26] drm/i915: interrupt bit definitions " Jesse Barnes
2012-03-22 21:38 ` [PATCH 07/26] drm/i915: add ValleyView clock gating init Jesse Barnes
2012-03-22 23:25 ` Ben Widawsky
2012-03-22 21:38 ` [PATCH 08/26] drm/i915: add DPIO read/write functions for ValleyView Jesse Barnes
2012-03-23 4:03 ` Ben Widawsky
2012-03-23 17:29 ` Eugeni Dodonov
2012-03-22 21:38 ` [PATCH 09/26] drm/i915: split PLL update code out of i9xx_crtc_mode_set Jesse Barnes
2012-03-23 4:16 ` Ben Widawsky
2012-03-23 23:00 ` Daniel Vetter
2012-03-22 21:38 ` [PATCH 10/26] drm/i915: split LVDS " Jesse Barnes
2012-03-23 23:04 ` Daniel Vetter
2012-03-22 21:38 ` [PATCH 11/26] drm/i915: ValleyView mode setting limits and PLL functions Jesse Barnes
2012-03-22 21:38 ` [PATCH 12/26] drm/i915: program drain latency regs on ValleyView Jesse Barnes
2012-03-26 1:50 ` Ben Widawsky
2012-03-22 21:38 ` [PATCH 13/26] drm/i915: Enable DP panel power sequencing for ValleyView Jesse Barnes
2012-03-22 21:38 ` [PATCH 14/26] drm/i915: Enable HDMI on ValleyView Jesse Barnes
2012-03-22 21:38 ` [PATCH 15/26] agp/intel: map more registers for use by the GTT code Jesse Barnes
2012-03-26 2:05 ` Ben Widawsky
2012-03-26 7:06 ` Daniel Vetter
2012-03-22 21:38 ` [PATCH 16/26] agp/intel: add ValleyView AGP driver Jesse Barnes
2012-03-26 2:16 ` Ben Widawsky
2012-03-26 7:08 ` Daniel Vetter
2012-03-26 18:17 ` Ben Widawsky
2012-03-22 21:38 ` [PATCH 17/26] agp/intel: bind " Jesse Barnes
2012-03-22 21:39 ` [PATCH 18/26] drm/i915: add ValleyView specific CRT detect function Jesse Barnes
2012-03-23 17:11 ` Eugeni Dodonov
2012-03-22 21:39 ` [PATCH 19/26] drm/i915: add ValleyView specific force wake get/put functions Jesse Barnes
2012-03-23 17:20 ` Eugeni Dodonov
2012-03-26 18:20 ` Ben Widawsky
2012-03-22 21:39 ` [PATCH 20/26] drm/i915: ValleyView has limited cacheability Jesse Barnes
2012-03-22 23:31 ` Jesse Barnes
2012-03-26 18:34 ` Ben Widawsky
2012-03-26 18:49 ` Daniel Vetter
2012-03-28 17:43 ` Jesse Barnes
2012-03-22 21:39 ` [PATCH 21/26] drm/i915: ValleyView IRQ support Jesse Barnes
2012-03-22 21:39 ` [PATCH 22/26] drm/i915: display regs are at 0x180000 on ValleyView Jesse Barnes
2012-03-22 21:39 ` [PATCH 23/26] drm/i915: check for disabled interrupts " Jesse Barnes
2012-03-22 21:39 ` [PATCH 24/26] drm/i915: add HDMI and DP port enumeration " Jesse Barnes
2012-03-22 21:39 ` [PATCH 25/26] drm/i915: disable turbo on ValleyView for now Jesse Barnes
2012-03-23 17:04 ` Eugeni Dodonov
2012-03-22 21:39 ` [PATCH 26/26] drm/i915: bind driver to ValleyView chipsets Jesse Barnes
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