* [PATCH 1/3] intel: sanitize i915_drm.h
@ 2012-06-05 18:58 Ben Widawsky
2012-06-05 18:58 ` [PATCH 2/3] intel: wait render header updates Ben Widawsky
` (2 more replies)
0 siblings, 3 replies; 10+ messages in thread
From: Ben Widawsky @ 2012-06-05 18:58 UTC (permalink / raw)
To: intel-gfx, dri-devel; +Cc: mesa-dev, Ben Widawsky
run make headers_isntall on d-i-n, copy to here
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
include/drm/i915_drm.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
index af3ce17..725a8de 100644
--- a/include/drm/i915_drm.h
+++ b/include/drm/i915_drm.h
@@ -33,6 +33,7 @@
* subject to backwards-compatibility constraints.
*/
+
/* Each region is a minimum of 16k, and there are at most 255 of them.
*/
#define I915_NR_TEX_REGIONS 255 /* table size 2k - maximum due to use
@@ -287,7 +288,8 @@ typedef struct drm_i915_irq_wait {
#define I915_PARAM_HAS_EXEC_CONSTANTS 14
#define I915_PARAM_HAS_RELAXED_DELTA 15
#define I915_PARAM_HAS_GEN7_SOL_RESET 16
-#define I915_PARAM_HAS_LLC 17
+#define I915_PARAM_HAS_LLC 17
+#define I915_PARAM_HAS_ALIASING_PPGTT 18
typedef struct drm_i915_getparam {
int param;
--
1.7.10.3
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH 2/3] intel: wait render header updates 2012-06-05 18:58 [PATCH 1/3] intel: sanitize i915_drm.h Ben Widawsky @ 2012-06-05 18:58 ` Ben Widawsky 2012-06-05 22:42 ` Ben Widawsky 2012-06-05 18:58 ` [PATCH 3/3] intel: wait render timeout implementation Ben Widawsky 2012-06-06 21:16 ` [PATCH 1/3] intel: sanitize i915_drm.h Ben Widawsky 2 siblings, 1 reply; 10+ messages in thread From: Ben Widawsky @ 2012-06-05 18:58 UTC (permalink / raw) To: intel-gfx, dri-devel; +Cc: mesa-dev, Ben Widawsky make headers_install in kernel. Copy to here. Signed-off-by: Ben Widawsky <ben@bwidawsk.net> --- include/drm/i915_drm.h | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h index 725a8de..1881f8a 100644 --- a/include/drm/i915_drm.h +++ b/include/drm/i915_drm.h @@ -192,6 +192,7 @@ typedef struct _drm_i915_sarea { #define DRM_I915_GEM_EXECBUFFER2 0x29 #define DRM_I915_GET_SPRITE_COLORKEY 0x2a #define DRM_I915_SET_SPRITE_COLORKEY 0x2b +#define DRM_I915_GEM_WAIT 0x2c #define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t) #define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH) @@ -235,6 +236,7 @@ typedef struct _drm_i915_sarea { #define DRM_IOCTL_I915_OVERLAY_ATTRS DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_OVERLAY_ATTRS, struct drm_intel_overlay_attrs) #define DRM_IOCTL_I915_SET_SPRITE_COLORKEY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_SET_SPRITE_COLORKEY, struct drm_intel_sprite_colorkey) #define DRM_IOCTL_I915_GET_SPRITE_COLORKEY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_SET_SPRITE_COLORKEY, struct drm_intel_sprite_colorkey) +#define DRM_IOCTL_I915_GEM_WAIT DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_WAIT, struct drm_i915_gem_wait) /* Allow drivers to submit batchbuffers directly to hardware, relying * on the security mechanisms provided by hardware. @@ -290,6 +292,7 @@ typedef struct drm_i915_irq_wait { #define I915_PARAM_HAS_GEN7_SOL_RESET 16 #define I915_PARAM_HAS_LLC 17 #define I915_PARAM_HAS_ALIASING_PPGTT 18 +#define I915_PARAM_HAS_WAIT_TIMEOUT 19 typedef struct drm_i915_getparam { int param; @@ -878,4 +881,12 @@ struct drm_intel_sprite_colorkey { __u32 flags; }; +struct drm_i915_gem_wait { + /** Handle of BO we shall wait on */ + __u32 bo_handle; + __u32 flags; + /** Number of nanoseconds to wait, Returns time remaining. */ + __u64 timeout_ns; +}; + #endif /* _I915_DRM_H_ */ -- 1.7.10.3 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 2/3] intel: wait render header updates 2012-06-05 18:58 ` [PATCH 2/3] intel: wait render header updates Ben Widawsky @ 2012-06-05 22:42 ` Ben Widawsky 2012-06-06 21:13 ` Ben Widawsky 0 siblings, 1 reply; 10+ messages in thread From: Ben Widawsky @ 2012-06-05 22:42 UTC (permalink / raw) To: intel-gfx, dri-devel; +Cc: mesa-dev, Ben Widawsky make headers_install in kernel. Copy to here. v2: signed ns_timeout Cc: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Ben Widawsky <ben@bwidawsk.net> --- include/drm/i915_drm.h | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h index 725a8de..4931107 100644 --- a/include/drm/i915_drm.h +++ b/include/drm/i915_drm.h @@ -192,6 +192,7 @@ typedef struct _drm_i915_sarea { #define DRM_I915_GEM_EXECBUFFER2 0x29 #define DRM_I915_GET_SPRITE_COLORKEY 0x2a #define DRM_I915_SET_SPRITE_COLORKEY 0x2b +#define DRM_I915_GEM_WAIT 0x2c #define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t) #define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH) @@ -235,6 +236,7 @@ typedef struct _drm_i915_sarea { #define DRM_IOCTL_I915_OVERLAY_ATTRS DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_OVERLAY_ATTRS, struct drm_intel_overlay_attrs) #define DRM_IOCTL_I915_SET_SPRITE_COLORKEY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_SET_SPRITE_COLORKEY, struct drm_intel_sprite_colorkey) #define DRM_IOCTL_I915_GET_SPRITE_COLORKEY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_SET_SPRITE_COLORKEY, struct drm_intel_sprite_colorkey) +#define DRM_IOCTL_I915_GEM_WAIT DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_WAIT, struct drm_i915_gem_wait) /* Allow drivers to submit batchbuffers directly to hardware, relying * on the security mechanisms provided by hardware. @@ -290,6 +292,7 @@ typedef struct drm_i915_irq_wait { #define I915_PARAM_HAS_GEN7_SOL_RESET 16 #define I915_PARAM_HAS_LLC 17 #define I915_PARAM_HAS_ALIASING_PPGTT 18 +#define I915_PARAM_HAS_WAIT_TIMEOUT 19 typedef struct drm_i915_getparam { int param; @@ -878,4 +881,12 @@ struct drm_intel_sprite_colorkey { __u32 flags; }; +struct drm_i915_gem_wait { + /** Handle of BO we shall wait on */ + __u32 bo_handle; + __u32 flags; + /** Number of nanoseconds to wait, Returns time remaining. */ + __s64 timeout_ns; +}; + #endif /* _I915_DRM_H_ */ -- 1.7.10.3 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH 2/3] intel: wait render header updates 2012-06-05 22:42 ` Ben Widawsky @ 2012-06-06 21:13 ` Ben Widawsky 0 siblings, 0 replies; 10+ messages in thread From: Ben Widawsky @ 2012-06-06 21:13 UTC (permalink / raw) To: Ben Widawsky; +Cc: mesa-dev, intel-gfx, dri-devel On Tue, 5 Jun 2012 15:42:39 -0700 Ben Widawsky <ben@bwidawsk.net> wrote: > make headers_install in kernel. Copy to here. > > v2: signed ns_timeout > > Cc: Chris Wilson <chris@chris-wilson.co.uk> > Signed-off-by: Ben Widawsky <ben@bwidawsk.net> This has been pushed with IRC Acked-by Kenneth Graunke <kenneth@whitecape.org> > --- > include/drm/i915_drm.h | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h > index 725a8de..4931107 100644 > --- a/include/drm/i915_drm.h > +++ b/include/drm/i915_drm.h > @@ -192,6 +192,7 @@ typedef struct _drm_i915_sarea { > #define DRM_I915_GEM_EXECBUFFER2 0x29 > #define DRM_I915_GET_SPRITE_COLORKEY 0x2a > #define DRM_I915_SET_SPRITE_COLORKEY 0x2b > +#define DRM_I915_GEM_WAIT 0x2c > > #define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t) > #define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH) > @@ -235,6 +236,7 @@ typedef struct _drm_i915_sarea { > #define DRM_IOCTL_I915_OVERLAY_ATTRS DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_OVERLAY_ATTRS, struct drm_intel_overlay_attrs) > #define DRM_IOCTL_I915_SET_SPRITE_COLORKEY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_SET_SPRITE_COLORKEY, struct drm_intel_sprite_colorkey) > #define DRM_IOCTL_I915_GET_SPRITE_COLORKEY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_SET_SPRITE_COLORKEY, struct drm_intel_sprite_colorkey) > +#define DRM_IOCTL_I915_GEM_WAIT DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_WAIT, struct drm_i915_gem_wait) > > /* Allow drivers to submit batchbuffers directly to hardware, relying > * on the security mechanisms provided by hardware. > @@ -290,6 +292,7 @@ typedef struct drm_i915_irq_wait { > #define I915_PARAM_HAS_GEN7_SOL_RESET 16 > #define I915_PARAM_HAS_LLC 17 > #define I915_PARAM_HAS_ALIASING_PPGTT 18 > +#define I915_PARAM_HAS_WAIT_TIMEOUT 19 > > typedef struct drm_i915_getparam { > int param; > @@ -878,4 +881,12 @@ struct drm_intel_sprite_colorkey { > __u32 flags; > }; > > +struct drm_i915_gem_wait { > + /** Handle of BO we shall wait on */ > + __u32 bo_handle; > + __u32 flags; > + /** Number of nanoseconds to wait, Returns time remaining. */ > + __s64 timeout_ns; > +}; > + > #endif /* _I915_DRM_H_ */ -- Ben Widawsky, Intel Open Source Technology Center ^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH 3/3] intel: wait render timeout implementation 2012-06-05 18:58 [PATCH 1/3] intel: sanitize i915_drm.h Ben Widawsky 2012-06-05 18:58 ` [PATCH 2/3] intel: wait render header updates Ben Widawsky @ 2012-06-05 18:58 ` Ben Widawsky 2012-06-05 22:35 ` Ben Widawsky 2012-06-05 22:43 ` Ben Widawsky 2012-06-06 21:16 ` [PATCH 1/3] intel: sanitize i915_drm.h Ben Widawsky 2 siblings, 2 replies; 10+ messages in thread From: Ben Widawsky @ 2012-06-05 18:58 UTC (permalink / raw) To: intel-gfx, dri-devel; +Cc: mesa-dev, Ben Widawsky int drm_intel_gem_bo_wait(drm_intel_bo *bo, uint64_t timeout_ns) This should bump the libdrm version. We're waiting for context support so we can do both features in one bump. v2: don't return remaining timeout amount use get param and fallback for older kernels Signed-off-by: Ben Widawsky <ben@bwidawsk.net> --- intel/intel_bufmgr.h | 1 + intel/intel_bufmgr_gem.c | 29 +++++++++++++++++++++++++++++ 2 files changed, 30 insertions(+) diff --git a/intel/intel_bufmgr.h b/intel/intel_bufmgr.h index c197abc..10ccc25 100644 --- a/intel/intel_bufmgr.h +++ b/intel/intel_bufmgr.h @@ -184,6 +184,7 @@ int drm_intel_get_pipe_from_crtc_id(drm_intel_bufmgr *bufmgr, int crtc_id); int drm_intel_get_aperture_sizes(int fd, size_t *mappable, size_t *total); int drm_intel_bufmgr_gem_get_devid(drm_intel_bufmgr *bufmgr); +int drm_intel_gem_bo_wait(drm_intel_bo *bo, uint64_t timeout_ns); /* drm_intel_bufmgr_fake.c */ drm_intel_bufmgr *drm_intel_bufmgr_fake_init(int fd, diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c index b776d2f..78aec08 100644 --- a/intel/intel_bufmgr_gem.c +++ b/intel/intel_bufmgr_gem.c @@ -1479,6 +1479,35 @@ drm_intel_gem_bo_wait_rendering(drm_intel_bo *bo) } /** + * Same as drm_intel_gem_bo_wait_rendering except a timeout parameter allows the + * operation to give up after a certain amount of time. + * + * A 0 return value implies that the wait was successful. Otherwise some + * negative return value describes the error. + */ +int drm_intel_gem_bo_wait(drm_intel_bo *bo, uint64_t timeout_ns) +{ + drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; + drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; + struct drm_i915_gem_wait wait; + int ret, val = 0; + struct drm_i915_getparam gp = {I915_PARAM_HAS_WAIT_TIMEOUT, &val}; + + ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GETPARAM, &gp); + if (!ret || !val) { + DBG("Wait timeout not supported by kernel. " + "Falling back to unconstrained wait\n"); + drm_intel_gem_bo_wait_rendering(bo); + return 0; + } + + wait.bo_handle = bo_gem->gem_handle; + wait.timeout_ns = timeout_ns; + wait.flags = 0; + return drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_WAIT, &wait); +} + +/** * Sets the object to the GTT read and possibly write domain, used by the X * 2D driver in the absence of kernel support to do drm_intel_gem_bo_map_gtt(). * -- 1.7.10.3 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 3/3] intel: wait render timeout implementation 2012-06-05 18:58 ` [PATCH 3/3] intel: wait render timeout implementation Ben Widawsky @ 2012-06-05 22:35 ` Ben Widawsky 2012-06-05 22:43 ` Ben Widawsky 1 sibling, 0 replies; 10+ messages in thread From: Ben Widawsky @ 2012-06-05 22:35 UTC (permalink / raw) To: intel-gfx, dri-devel; +Cc: mesa-dev, Ben Widawsky int drm_intel_gem_bo_wait(drm_intel_bo *bo, uint64_t timeout_ns) This should bump the libdrm version. We're waiting for context support so we can do both features in one bump. v2: don't return remaining timeout amount use get param and fallback for older kernels v3: only doing getparam at init Signed-off-by: Ben Widawsky <ben@bwidawsk.net> --- intel/intel_bufmgr.h | 1 + intel/intel_bufmgr_gem.c | 30 ++++++++++++++++++++++++++++++ 2 files changed, 31 insertions(+) diff --git a/intel/intel_bufmgr.h b/intel/intel_bufmgr.h index c197abc..10ccc25 100644 --- a/intel/intel_bufmgr.h +++ b/intel/intel_bufmgr.h @@ -184,6 +184,7 @@ int drm_intel_get_pipe_from_crtc_id(drm_intel_bufmgr *bufmgr, int crtc_id); int drm_intel_get_aperture_sizes(int fd, size_t *mappable, size_t *total); int drm_intel_bufmgr_gem_get_devid(drm_intel_bufmgr *bufmgr); +int drm_intel_gem_bo_wait(drm_intel_bo *bo, uint64_t timeout_ns); /* drm_intel_bufmgr_fake.c */ drm_intel_bufmgr *drm_intel_bufmgr_fake_init(int fd, diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c index b776d2f..b780ab9 100644 --- a/intel/intel_bufmgr_gem.c +++ b/intel/intel_bufmgr_gem.c @@ -119,6 +119,7 @@ typedef struct _drm_intel_bufmgr_gem { unsigned int has_blt : 1; unsigned int has_relaxed_fencing : 1; unsigned int has_llc : 1; + unsigned int has_wait_timeout : 1; unsigned int bo_reuse : 1; unsigned int no_exec : 1; bool fenced_relocs; @@ -1479,6 +1480,31 @@ drm_intel_gem_bo_wait_rendering(drm_intel_bo *bo) } /** + * Same as drm_intel_gem_bo_wait_rendering except a timeout parameter allows the + * operation to give up after a certain amount of time. + * + * A 0 return value implies that the wait was successful. Otherwise some + * negative return value describes the error. + */ +int drm_intel_gem_bo_wait(drm_intel_bo *bo, uint64_t timeout_ns) +{ + drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; + drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; + struct drm_i915_gem_wait wait; + int ret; + + if (!bufmgr_gem->has_wait_timeout) { + drm_intel_gem_bo_wait_rendering(bo); + return 0; + } + + wait.bo_handle = bo_gem->gem_handle; + wait.timeout_ns = timeout_ns; + wait.flags = 0; + return drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_WAIT, &wait); +} + +/** * Sets the object to the GTT read and possibly write domain, used by the X * 2D driver in the absence of kernel support to do drm_intel_gem_bo_map_gtt(). * @@ -2898,6 +2924,10 @@ drm_intel_bufmgr_gem_init(int fd, int batch_size) ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GETPARAM, &gp); bufmgr_gem->has_relaxed_fencing = ret == 0; + gp.param = I915_PARAM_HAS_WAIT_TIMEOUT; + ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GETPARAM, &gp); + bufmgr_gem->has_wait_timeout = ret == 0; + gp.param = I915_PARAM_HAS_LLC; ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GETPARAM, &gp); if (ret != 0) { -- 1.7.10.3 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 3/3] intel: wait render timeout implementation 2012-06-05 18:58 ` [PATCH 3/3] intel: wait render timeout implementation Ben Widawsky 2012-06-05 22:35 ` Ben Widawsky @ 2012-06-05 22:43 ` Ben Widawsky 2012-06-06 9:33 ` Daniel Vetter 1 sibling, 1 reply; 10+ messages in thread From: Ben Widawsky @ 2012-06-05 22:43 UTC (permalink / raw) To: intel-gfx, dri-devel; +Cc: mesa-dev, Ben Widawsky int drm_intel_gem_bo_wait(drm_intel_bo *bo, uint64_t timeout_ns) This should bump the libdrm version. We're waiting for context support so we can do both features in one bump. v2: don't return remaining timeout amount use get param and fallback for older kernels v3: only doing getparam at init prototypes now have a signed input value Cc: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Ben Widawsky <ben@bwidawsk.net> --- intel/intel_bufmgr.h | 1 + intel/intel_bufmgr_gem.c | 30 ++++++++++++++++++++++++++++++ 2 files changed, 31 insertions(+) diff --git a/intel/intel_bufmgr.h b/intel/intel_bufmgr.h index c197abc..fa6c4dd 100644 --- a/intel/intel_bufmgr.h +++ b/intel/intel_bufmgr.h @@ -184,6 +184,7 @@ int drm_intel_get_pipe_from_crtc_id(drm_intel_bufmgr *bufmgr, int crtc_id); int drm_intel_get_aperture_sizes(int fd, size_t *mappable, size_t *total); int drm_intel_bufmgr_gem_get_devid(drm_intel_bufmgr *bufmgr); +int drm_intel_gem_bo_wait(drm_intel_bo *bo, int64_t timeout_ns); /* drm_intel_bufmgr_fake.c */ drm_intel_bufmgr *drm_intel_bufmgr_fake_init(int fd, diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c index b776d2f..048fca7 100644 --- a/intel/intel_bufmgr_gem.c +++ b/intel/intel_bufmgr_gem.c @@ -119,6 +119,7 @@ typedef struct _drm_intel_bufmgr_gem { unsigned int has_blt : 1; unsigned int has_relaxed_fencing : 1; unsigned int has_llc : 1; + unsigned int has_wait_timeout : 1; unsigned int bo_reuse : 1; unsigned int no_exec : 1; bool fenced_relocs; @@ -1479,6 +1480,31 @@ drm_intel_gem_bo_wait_rendering(drm_intel_bo *bo) } /** + * Same as drm_intel_gem_bo_wait_rendering except a timeout parameter allows the + * operation to give up after a certain amount of time. + * + * A 0 return value implies that the wait was successful. Otherwise some + * negative return value describes the error. + */ +int drm_intel_gem_bo_wait(drm_intel_bo *bo, int64_t timeout_ns) +{ + drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; + drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; + struct drm_i915_gem_wait wait; + int ret; + + if (!bufmgr_gem->has_wait_timeout) { + drm_intel_gem_bo_wait_rendering(bo); + return 0; + } + + wait.bo_handle = bo_gem->gem_handle; + wait.timeout_ns = timeout_ns; + wait.flags = 0; + return drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_WAIT, &wait); +} + +/** * Sets the object to the GTT read and possibly write domain, used by the X * 2D driver in the absence of kernel support to do drm_intel_gem_bo_map_gtt(). * @@ -2898,6 +2924,10 @@ drm_intel_bufmgr_gem_init(int fd, int batch_size) ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GETPARAM, &gp); bufmgr_gem->has_relaxed_fencing = ret == 0; + gp.param = I915_PARAM_HAS_WAIT_TIMEOUT; + ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GETPARAM, &gp); + bufmgr_gem->has_wait_timeout = ret == 0; + gp.param = I915_PARAM_HAS_LLC; ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GETPARAM, &gp); if (ret != 0) { -- 1.7.10.3 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH 3/3] intel: wait render timeout implementation 2012-06-05 22:43 ` Ben Widawsky @ 2012-06-06 9:33 ` Daniel Vetter 2012-06-06 21:26 ` Ben Widawsky 0 siblings, 1 reply; 10+ messages in thread From: Daniel Vetter @ 2012-06-06 9:33 UTC (permalink / raw) To: Ben Widawsky; +Cc: mesa-dev, intel-gfx, dri-devel On Tue, Jun 05, 2012 at 03:43:07PM -0700, Ben Widawsky wrote: > int drm_intel_gem_bo_wait(drm_intel_bo *bo, uint64_t timeout_ns) > > This should bump the libdrm version. We're waiting for context support > so we can do both features in one bump. > > v2: don't return remaining timeout amount > use get param and fallback for older kernels > > v3: only doing getparam at init > prototypes now have a signed input value > > Cc: Chris Wilson <chris@chris-wilson.co.uk> > Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Let's bikeshed this some more ;-) - I think a quick comment to say that negative timeouts result in a infinite wait would be nice. - If we want to keep timeout=0 means polling, you need to add a special case in the fallback to check for that and call the busy ioctl instead (and remap the business value to the correct return value). - iirc drmIoctl doesn't return the kernels -ERRNO value in it's retval (and shovels it into errno instead). I think undoing that suckiness would be good, so that we return -ETIME if the timer expired. Yours, Daniel > --- > intel/intel_bufmgr.h | 1 + > intel/intel_bufmgr_gem.c | 30 ++++++++++++++++++++++++++++++ > 2 files changed, 31 insertions(+) > > diff --git a/intel/intel_bufmgr.h b/intel/intel_bufmgr.h > index c197abc..fa6c4dd 100644 > --- a/intel/intel_bufmgr.h > +++ b/intel/intel_bufmgr.h > @@ -184,6 +184,7 @@ int drm_intel_get_pipe_from_crtc_id(drm_intel_bufmgr *bufmgr, int crtc_id); > > int drm_intel_get_aperture_sizes(int fd, size_t *mappable, size_t *total); > int drm_intel_bufmgr_gem_get_devid(drm_intel_bufmgr *bufmgr); > +int drm_intel_gem_bo_wait(drm_intel_bo *bo, int64_t timeout_ns); > > /* drm_intel_bufmgr_fake.c */ > drm_intel_bufmgr *drm_intel_bufmgr_fake_init(int fd, > diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c > index b776d2f..048fca7 100644 > --- a/intel/intel_bufmgr_gem.c > +++ b/intel/intel_bufmgr_gem.c > @@ -119,6 +119,7 @@ typedef struct _drm_intel_bufmgr_gem { > unsigned int has_blt : 1; > unsigned int has_relaxed_fencing : 1; > unsigned int has_llc : 1; > + unsigned int has_wait_timeout : 1; > unsigned int bo_reuse : 1; > unsigned int no_exec : 1; > bool fenced_relocs; > @@ -1479,6 +1480,31 @@ drm_intel_gem_bo_wait_rendering(drm_intel_bo *bo) > } > > /** > + * Same as drm_intel_gem_bo_wait_rendering except a timeout parameter allows the > + * operation to give up after a certain amount of time. > + * > + * A 0 return value implies that the wait was successful. Otherwise some > + * negative return value describes the error. > + */ > +int drm_intel_gem_bo_wait(drm_intel_bo *bo, int64_t timeout_ns) > +{ > + drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; > + drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; > + struct drm_i915_gem_wait wait; > + int ret; > + > + if (!bufmgr_gem->has_wait_timeout) { > + drm_intel_gem_bo_wait_rendering(bo); > + return 0; > + } > + > + wait.bo_handle = bo_gem->gem_handle; > + wait.timeout_ns = timeout_ns; > + wait.flags = 0; > + return drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_WAIT, &wait); > +} > + > +/** > * Sets the object to the GTT read and possibly write domain, used by the X > * 2D driver in the absence of kernel support to do drm_intel_gem_bo_map_gtt(). > * > @@ -2898,6 +2924,10 @@ drm_intel_bufmgr_gem_init(int fd, int batch_size) > ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GETPARAM, &gp); > bufmgr_gem->has_relaxed_fencing = ret == 0; > > + gp.param = I915_PARAM_HAS_WAIT_TIMEOUT; > + ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GETPARAM, &gp); > + bufmgr_gem->has_wait_timeout = ret == 0; > + > gp.param = I915_PARAM_HAS_LLC; > ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GETPARAM, &gp); > if (ret != 0) { > -- > 1.7.10.3 > > _______________________________________________ > dri-devel mailing list > dri-devel@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/dri-devel -- Daniel Vetter Mail: daniel@ffwll.ch Mobile: +41 (0)79 365 57 48 ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 3/3] intel: wait render timeout implementation 2012-06-06 9:33 ` Daniel Vetter @ 2012-06-06 21:26 ` Ben Widawsky 0 siblings, 0 replies; 10+ messages in thread From: Ben Widawsky @ 2012-06-06 21:26 UTC (permalink / raw) To: Daniel Vetter; +Cc: mesa-dev, intel-gfx, dri-devel On Wed, 6 Jun 2012 11:33:21 +0200 Daniel Vetter <daniel@ffwll.ch> wrote: > On Tue, Jun 05, 2012 at 03:43:07PM -0700, Ben Widawsky wrote: > > int drm_intel_gem_bo_wait(drm_intel_bo *bo, uint64_t timeout_ns) > > > > This should bump the libdrm version. We're waiting for context support > > so we can do both features in one bump. > > > > v2: don't return remaining timeout amount > > use get param and fallback for older kernels > > > > v3: only doing getparam at init > > prototypes now have a signed input value > > > > Cc: Chris Wilson <chris@chris-wilson.co.uk> > > Signed-off-by: Ben Widawsky <ben@bwidawsk.net> > > Let's bikeshed this some more ;-) > - I think a quick comment to say that negative timeouts result in a > infinite wait would be nice. > - If we want to keep timeout=0 means polling, you need to add a special > case in the fallback to check for that and call the busy ioctl instead > (and remap the business value to the correct return value). > - iirc drmIoctl doesn't return the kernels -ERRNO value in it's retval > (and shovels it into errno instead). I think undoing that suckiness > would be good, so that we return -ETIME if the timer expired. All these are very good points which were lost when dropping the return time in the v2 patch. I consider none of these bikesheds at all. Thanks. Ben > > Yours, Daniel > > --- > > intel/intel_bufmgr.h | 1 + > > intel/intel_bufmgr_gem.c | 30 ++++++++++++++++++++++++++++++ > > 2 files changed, 31 insertions(+) > > > > diff --git a/intel/intel_bufmgr.h b/intel/intel_bufmgr.h > > index c197abc..fa6c4dd 100644 > > --- a/intel/intel_bufmgr.h > > +++ b/intel/intel_bufmgr.h > > @@ -184,6 +184,7 @@ int drm_intel_get_pipe_from_crtc_id(drm_intel_bufmgr *bufmgr, int crtc_id); > > > > int drm_intel_get_aperture_sizes(int fd, size_t *mappable, size_t *total); > > int drm_intel_bufmgr_gem_get_devid(drm_intel_bufmgr *bufmgr); > > +int drm_intel_gem_bo_wait(drm_intel_bo *bo, int64_t timeout_ns); > > > > /* drm_intel_bufmgr_fake.c */ > > drm_intel_bufmgr *drm_intel_bufmgr_fake_init(int fd, > > diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c > > index b776d2f..048fca7 100644 > > --- a/intel/intel_bufmgr_gem.c > > +++ b/intel/intel_bufmgr_gem.c > > @@ -119,6 +119,7 @@ typedef struct _drm_intel_bufmgr_gem { > > unsigned int has_blt : 1; > > unsigned int has_relaxed_fencing : 1; > > unsigned int has_llc : 1; > > + unsigned int has_wait_timeout : 1; > > unsigned int bo_reuse : 1; > > unsigned int no_exec : 1; > > bool fenced_relocs; > > @@ -1479,6 +1480,31 @@ drm_intel_gem_bo_wait_rendering(drm_intel_bo *bo) > > } > > > > /** > > + * Same as drm_intel_gem_bo_wait_rendering except a timeout parameter allows the > > + * operation to give up after a certain amount of time. > > + * > > + * A 0 return value implies that the wait was successful. Otherwise some > > + * negative return value describes the error. > > + */ > > +int drm_intel_gem_bo_wait(drm_intel_bo *bo, int64_t timeout_ns) > > +{ > > + drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; > > + drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; > > + struct drm_i915_gem_wait wait; > > + int ret; > > + > > + if (!bufmgr_gem->has_wait_timeout) { > > + drm_intel_gem_bo_wait_rendering(bo); > > + return 0; > > + } > > + > > + wait.bo_handle = bo_gem->gem_handle; > > + wait.timeout_ns = timeout_ns; > > + wait.flags = 0; > > + return drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_WAIT, &wait); > > +} > > + > > +/** > > * Sets the object to the GTT read and possibly write domain, used by the X > > * 2D driver in the absence of kernel support to do drm_intel_gem_bo_map_gtt(). > > * > > @@ -2898,6 +2924,10 @@ drm_intel_bufmgr_gem_init(int fd, int batch_size) > > ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GETPARAM, &gp); > > bufmgr_gem->has_relaxed_fencing = ret == 0; > > > > + gp.param = I915_PARAM_HAS_WAIT_TIMEOUT; > > + ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GETPARAM, &gp); > > + bufmgr_gem->has_wait_timeout = ret == 0; > > + > > gp.param = I915_PARAM_HAS_LLC; > > ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GETPARAM, &gp); > > if (ret != 0) { > > -- > > 1.7.10.3 > > > > _______________________________________________ > > dri-devel mailing list > > dri-devel@lists.freedesktop.org > > http://lists.freedesktop.org/mailman/listinfo/dri-devel > -- Ben Widawsky, Intel Open Source Technology Center ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 1/3] intel: sanitize i915_drm.h 2012-06-05 18:58 [PATCH 1/3] intel: sanitize i915_drm.h Ben Widawsky 2012-06-05 18:58 ` [PATCH 2/3] intel: wait render header updates Ben Widawsky 2012-06-05 18:58 ` [PATCH 3/3] intel: wait render timeout implementation Ben Widawsky @ 2012-06-06 21:16 ` Ben Widawsky 2 siblings, 0 replies; 10+ messages in thread From: Ben Widawsky @ 2012-06-06 21:16 UTC (permalink / raw) To: Ben Widawsky; +Cc: mesa-dev, intel-gfx, dri-devel On Tue, 5 Jun 2012 11:58:11 -0700 Ben Widawsky <ben@bwidawsk.net> wrote: > run make headers_isntall on d-i-n, copy to here > > Signed-off-by: Ben Widawsky <ben@bwidawsk.net> This has been pushed with IRC Acked-by Kenneth Graunke <kenneth@whitecape.org> > --- > include/drm/i915_drm.h | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h > index af3ce17..725a8de 100644 > --- a/include/drm/i915_drm.h > +++ b/include/drm/i915_drm.h > @@ -33,6 +33,7 @@ > * subject to backwards-compatibility constraints. > */ > > + > /* Each region is a minimum of 16k, and there are at most 255 of them. > */ > #define I915_NR_TEX_REGIONS 255 /* table size 2k - maximum due to use > @@ -287,7 +288,8 @@ typedef struct drm_i915_irq_wait { > #define I915_PARAM_HAS_EXEC_CONSTANTS 14 > #define I915_PARAM_HAS_RELAXED_DELTA 15 > #define I915_PARAM_HAS_GEN7_SOL_RESET 16 > -#define I915_PARAM_HAS_LLC 17 > +#define I915_PARAM_HAS_LLC 17 > +#define I915_PARAM_HAS_ALIASING_PPGTT 18 > > typedef struct drm_i915_getparam { > int param; -- Ben Widawsky, Intel Open Source Technology Center -- Ben Widawsky, Intel Open Source Technology Center ^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2012-06-06 21:26 UTC | newest] Thread overview: 10+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2012-06-05 18:58 [PATCH 1/3] intel: sanitize i915_drm.h Ben Widawsky 2012-06-05 18:58 ` [PATCH 2/3] intel: wait render header updates Ben Widawsky 2012-06-05 22:42 ` Ben Widawsky 2012-06-06 21:13 ` Ben Widawsky 2012-06-05 18:58 ` [PATCH 3/3] intel: wait render timeout implementation Ben Widawsky 2012-06-05 22:35 ` Ben Widawsky 2012-06-05 22:43 ` Ben Widawsky 2012-06-06 9:33 ` Daniel Vetter 2012-06-06 21:26 ` Ben Widawsky 2012-06-06 21:16 ` [PATCH 1/3] intel: sanitize i915_drm.h Ben Widawsky
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