From: Jesse Barnes <jbarnes@virtuousgeek.org>
To: akash.goel@intel.com
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v3] drm/i915: Added write-enable pte bit support
Date: Tue, 13 May 2014 15:05:24 -0700 [thread overview]
Message-ID: <20140513150524.4050090c@jbarnes-desktop> (raw)
In-Reply-To: <1392108543-31552-1-git-send-email-akash.goel@intel.com>
On Tue, 11 Feb 2014 14:19:03 +0530
akash.goel@intel.com wrote:
> @@ -810,6 +815,7 @@ static void gen6_ppgtt_insert_entries(struct i915_address_space *vm,
> pt_vaddr[act_pte] =
> vm->pte_encode(sg_page_iter_dma_address(&sg_iter),
> cache_level, true);
> +
> if (++act_pte == I915_PPGTT_PT_ENTRIES) {
> kunmap_atomic(pt_vaddr);
> pt_vaddr = NULL;
Some extra whitespace here.
Otherwise:
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Might be good to expose this as a param too, so userspace could use it
for stuff that shouldn't be written...
--
Jesse Barnes, Intel Open Source Technology Center
next prev parent reply other threads:[~2014-05-13 22:05 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-02-11 8:49 [PATCH v3] drm/i915: Added write-enable pte bit support akash.goel
2014-04-24 9:44 ` Goel, Akash
2014-05-13 22:05 ` Jesse Barnes [this message]
2014-05-13 22:30 ` Daniel Vetter
2014-05-13 22:43 ` Jesse Barnes
2014-05-14 8:14 ` Daniel Vetter
2014-05-18 5:57 ` Akash Goel
2014-05-19 6:56 ` Daniel Vetter
2014-05-19 7:33 ` Akash Goel
2014-06-01 6:42 ` Akash Goel
2014-06-02 8:19 ` Daniel Vetter
2014-06-04 4:46 ` Akash Goel
2014-06-09 3:06 ` [PATCH v4] " akash.goel
2014-06-16 19:50 ` Imre Deak
2014-06-17 5:29 ` [PATCH v5] " akash.goel
2014-06-17 7:22 ` Daniel Vetter
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