DevSNB PCI Config Space Registers Reference

DevSNB PCI Config Space Registers Reference

[Nicolae Badiu]

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Hi,
 
Does anyone have access to the Sandy Bridge 2011 Intel HD Graphics PCI Config space register reference? I cannot seem to find it anywhere in the PRM docs. There is only a reference to a register called MMAPA at office 14h in all DevSNB manuals.
 
I do see PCI config space documentation for Ivy Bridge and Haswell Intel HD Graphics.
 
Otherwise, pointing me in the right direction w/ regard to the drm-intel source code would also help.
 
Thanks,
Nick
            
 		 	   		  

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Re: DevSNB PCI Config Space Registers Reference

[Daniel Vetter]

On Tue, Jun 10, 2014 at 03:51:03PM +0000, Nicolae Badiu wrote:
> Hi,
>  
> Does anyone have access to the Sandy Bridge 2011 Intel HD Graphics PCI
> Config space register reference? I cannot seem to find it anywhere in
> the PRM docs. There is only a reference to a register called MMAPA at
> office 14h in all DevSNB manuals.
>  
> I do see PCI config space documentation for Ivy Bridge and Haswell Intel HD Graphics.

Yeah, this was missed in the snb release.

> Otherwise, pointing me in the right direction w/ regard to the drm-intel source code would also help.

They are sprinkled all over a bit, and we definitely don't have an
exhaustive set of #defines. If you need something specific and
interpolation with ivb/hsw docs doesn't work, please just ping us. Usually
best on irc.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch