Re: [PATCH v2 4/6] drm/i915/dp: Restore PPS HW state from the encoder resume hook

["Ville Syrjälä" <ville.syrjala@linux.intel.com>]

On Tue, Aug 09, 2016 at 08:21:33PM +0300, Imre Deak wrote:
> Similarly to the previous patch, initialize the PPS from the DP
> encoder's resume hook. Note that as opposed to LVDS we can't do this
> during encoder enabling, since we need the PPS for DP detection as well.
> The PPS init code is now the same for init and resume, so factor out a
> new intel_dp_pps_init() helper for this.
> 
> v2:
> - Factor out intel_dp_pps_init() (Ville).
> 
> Signed-off-by: Imre Deak <imre.deak@intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/intel_dp.c | 31 ++++++++++++++++---------------
>  1 file changed, 16 insertions(+), 15 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index a20faa0..2ef7b14 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -256,6 +256,8 @@ intel_dp_init_panel_power_sequencer(struct drm_device *dev,
>  static void
>  intel_dp_init_panel_power_sequencer_registers(struct drm_device *dev,
>  					      struct intel_dp *intel_dp);
> +static void
> +intel_dp_pps_init(struct drm_device *dev, struct intel_dp *intel_dp);
>  
>  static void pps_lock(struct intel_dp *intel_dp)
>  {
> @@ -4657,13 +4659,8 @@ void intel_dp_encoder_reset(struct drm_encoder *encoder)
>  
>  	pps_lock(intel_dp);
>  
> -	/*
> -	 * Read out the current power sequencer assignment,
> -	 * in case the BIOS did something with it.
> -	 */
> -	if (IS_VALLEYVIEW(encoder->dev) || IS_CHERRYVIEW(encoder->dev))
> -		vlv_initial_power_sequencer_setup(intel_dp);
> -
> +	/* Reinit the power sequencer, in case BIOS did something with it. */
> +	intel_dp_pps_init(encoder->dev, intel_dp);
>  	intel_edp_panel_vdd_sanitize(intel_dp);
>  
>  	pps_unlock(intel_dp);
> @@ -5011,6 +5008,17 @@ intel_dp_init_panel_power_sequencer_registers(struct drm_device *dev,
>  		      I915_READ(regs.pp_div));
>  }
>  
> +static void intel_dp_pps_init(struct drm_device *dev,
> +			      struct intel_dp *intel_dp)
> +{
> +	if (IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev)) {
> +		vlv_initial_power_sequencer_setup(intel_dp);
> +	} else {
> +		intel_dp_init_panel_power_sequencer(dev, intel_dp);
> +		intel_dp_init_panel_power_sequencer_registers(dev, intel_dp);
> +	}
> +}
> +
>  /**
>   * intel_dp_set_drrs_state - program registers for RR switch to take effect
>   * @dev: DRM device
> @@ -5425,14 +5433,7 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp,
>  	pps_lock(intel_dp);
>  
>  	intel_dp_init_panel_power_timestamps(intel_dp);
> -
> -	if (IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev)) {
> -		vlv_initial_power_sequencer_setup(intel_dp);
> -	} else {
> -		intel_dp_init_panel_power_sequencer(dev, intel_dp);
> -		intel_dp_init_panel_power_sequencer_registers(dev, intel_dp);
> -	}
> -
> +	intel_dp_pps_init(dev, intel_dp);
>  	intel_edp_panel_vdd_sanitize(intel_dp);
>  
>  	pps_unlock(intel_dp);
> -- 
> 2.5.0

-- 
Ville Syrjälä
Intel OTC
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