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* [PATCH v3 1/6] drm/i915/psr: Share PSR and PSR2 exit mask
@ 2018-10-01 23:20 José Roberto de Souza
  2018-10-01 23:20 ` [PATCH v3 2/6] drm/i915/psr: Make MASK_DISP_REG_WRITE reserved in PSR_MASK for ICL José Roberto de Souza
                   ` (8 more replies)
  0 siblings, 9 replies; 10+ messages in thread
From: José Roberto de Souza @ 2018-10-01 23:20 UTC (permalink / raw)
  To: intel-gfx

Now both PSR and PSR2 have the same exit mask, so let's share then
instead of have the same code 2 times.

Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/intel_psr.c | 34 ++++++++++++--------------------
 1 file changed, 13 insertions(+), 21 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 11fdefaf7728..3b5b8798c3ba 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -576,28 +576,20 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp,
 		else
 			chicken &= ~VSC_DATA_SEL_SOFTWARE_CONTROL;
 		I915_WRITE(CHICKEN_TRANS(cpu_transcoder), chicken);
-
-		I915_WRITE(EDP_PSR_DEBUG,
-			   EDP_PSR_DEBUG_MASK_MEMUP |
-			   EDP_PSR_DEBUG_MASK_HPD |
-			   EDP_PSR_DEBUG_MASK_LPSP |
-			   EDP_PSR_DEBUG_MASK_MAX_SLEEP |
-			   EDP_PSR_DEBUG_MASK_DISP_REG_WRITE);
-	} else {
-		/*
-		 * Per Spec: Avoid continuous PSR exit by masking MEMUP
-		 * and HPD. also mask LPSP to avoid dependency on other
-		 * drivers that might block runtime_pm besides
-		 * preventing  other hw tracking issues now we can rely
-		 * on frontbuffer tracking.
-		 */
-		I915_WRITE(EDP_PSR_DEBUG,
-			   EDP_PSR_DEBUG_MASK_MEMUP |
-			   EDP_PSR_DEBUG_MASK_HPD |
-			   EDP_PSR_DEBUG_MASK_LPSP |
-			   EDP_PSR_DEBUG_MASK_DISP_REG_WRITE |
-			   EDP_PSR_DEBUG_MASK_MAX_SLEEP);
 	}
+
+	/*
+	 * Per Spec: Avoid continuous PSR exit by masking MEMUP and HPD also
+	 * mask LPSP to avoid dependency on other drivers that might block
+	 * runtime_pm besides preventing  other hw tracking issues now we
+	 * can rely on frontbuffer tracking.
+	 */
+	I915_WRITE(EDP_PSR_DEBUG,
+		   EDP_PSR_DEBUG_MASK_MEMUP |
+		   EDP_PSR_DEBUG_MASK_HPD |
+		   EDP_PSR_DEBUG_MASK_LPSP |
+		   EDP_PSR_DEBUG_MASK_DISP_REG_WRITE |
+		   EDP_PSR_DEBUG_MASK_MAX_SLEEP);
 }
 
 static void intel_psr_enable_locked(struct drm_i915_private *dev_priv,
-- 
2.19.0

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^ permalink raw reply related	[flat|nested] 10+ messages in thread
* [PATCH v3 2/6] drm/i915/psr: Make MASK_DISP_REG_WRITE reserved in PSR_MASK for ICL
  2018-10-01 23:20 [PATCH v3 1/6] drm/i915/psr: Share PSR and PSR2 exit mask José Roberto de Souza
@ 2018-10-01 23:20 ` José Roberto de Souza
  2018-10-01 23:20 ` [PATCH v3 3/6] drm/i915/psr: Remove PSR2 TODO error handling José Roberto de Souza
                   ` (7 subsequent siblings)
  8 siblings, 0 replies; 10+ messages in thread
From: José Roberto de Souza @ 2018-10-01 23:20 UTC (permalink / raw)
  To: intel-gfx

ICL spec states that this bit is now reserved.

Bspec: 7722

v2(Dhinakaran and Jani):
- instead of remove bit in gen11 now only setting if if gen < 11
- changed commit title

Cc: Jani Nikula <jani.nikula@linux.intel.com>
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h  |  4 ++--
 drivers/gpu/drm/i915/intel_psr.c | 16 ++++++++++------
 2 files changed, 12 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 27e650fe591b..8f436c73f184 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4195,7 +4195,7 @@ enum {
 #define   EDP_PSR_DEBUG_MASK_LPSP              (1 << 27)
 #define   EDP_PSR_DEBUG_MASK_MEMUP             (1 << 26)
 #define   EDP_PSR_DEBUG_MASK_HPD               (1 << 25)
-#define   EDP_PSR_DEBUG_MASK_DISP_REG_WRITE    (1 << 16)
+#define   EDP_PSR_DEBUG_MASK_DISP_REG_WRITE    (1 << 16) /* Reserved in ICL+ */
 #define   EDP_PSR_DEBUG_EXIT_ON_PIXEL_UNDERRUN (1 << 15) /* SKL+ */
 
 #define EDP_PSR2_CTL			_MMIO(0x6f900)
@@ -4232,7 +4232,7 @@ enum {
 #define  PSR_EVENT_FRONT_BUFFER_MODIFY		(1 << 9)
 #define  PSR_EVENT_WD_TIMER_EXPIRE		(1 << 8)
 #define  PSR_EVENT_PIPE_REGISTERS_UPDATE	(1 << 6)
-#define  PSR_EVENT_REGISTER_UPDATE		(1 << 5)
+#define  PSR_EVENT_REGISTER_UPDATE		(1 << 5) /* Reserved in ICL+ */
 #define  PSR_EVENT_HDCP_ENABLE			(1 << 4)
 #define  PSR_EVENT_KVMR_SESSION_ENABLE		(1 << 3)
 #define  PSR_EVENT_VBI_ENABLE			(1 << 2)
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 3b5b8798c3ba..570ae1a2938a 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -559,6 +559,7 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp,
 {
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
 	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
+	u32 mask;
 
 	/* Only HSW and BDW have PSR AUX registers that need to be setup. SKL+
 	 * use hardcoded values PSR AUX transactions
@@ -584,12 +585,15 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp,
 	 * runtime_pm besides preventing  other hw tracking issues now we
 	 * can rely on frontbuffer tracking.
 	 */
-	I915_WRITE(EDP_PSR_DEBUG,
-		   EDP_PSR_DEBUG_MASK_MEMUP |
-		   EDP_PSR_DEBUG_MASK_HPD |
-		   EDP_PSR_DEBUG_MASK_LPSP |
-		   EDP_PSR_DEBUG_MASK_DISP_REG_WRITE |
-		   EDP_PSR_DEBUG_MASK_MAX_SLEEP);
+	mask = EDP_PSR_DEBUG_MASK_MEMUP |
+	       EDP_PSR_DEBUG_MASK_HPD |
+	       EDP_PSR_DEBUG_MASK_LPSP |
+	       EDP_PSR_DEBUG_MASK_MAX_SLEEP;
+
+	if (INTEL_GEN(dev_priv) < 11)
+		mask |= EDP_PSR_DEBUG_MASK_DISP_REG_WRITE;
+
+	I915_WRITE(EDP_PSR_DEBUG, mask);
 }
 
 static void intel_psr_enable_locked(struct drm_i915_private *dev_priv,
-- 
2.19.0

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^ permalink raw reply related	[flat|nested] 10+ messages in thread
* [PATCH v3 3/6] drm/i915/psr: Remove PSR2 TODO error handling
  2018-10-01 23:20 [PATCH v3 1/6] drm/i915/psr: Share PSR and PSR2 exit mask José Roberto de Souza
  2018-10-01 23:20 ` [PATCH v3 2/6] drm/i915/psr: Make MASK_DISP_REG_WRITE reserved in PSR_MASK for ICL José Roberto de Souza
@ 2018-10-01 23:20 ` José Roberto de Souza
  2018-10-01 23:20 ` [PATCH v3 4/6] drm/i915/psr: Use WA to force HW tracking to exit PSR2 José Roberto de Souza
                   ` (6 subsequent siblings)
  8 siblings, 0 replies; 10+ messages in thread
From: José Roberto de Souza @ 2018-10-01 23:20 UTC (permalink / raw)
  To: intel-gfx

We are already handling all PSR2 errors, so we can drop this TODO.

Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/intel_psr.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 570ae1a2938a..fbceb814d6be 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -1127,8 +1127,6 @@ void intel_psr_short_pulse(struct intel_dp *intel_dp)
 		intel_psr_disable_locked(intel_dp);
 	/* clear status register */
 	drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_ERROR_STATUS, val);
-
-	/* TODO: handle PSR2 errors */
 exit:
 	mutex_unlock(&psr->lock);
 }
-- 
2.19.0

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^ permalink raw reply related	[flat|nested] 10+ messages in thread
* [PATCH v3 4/6] drm/i915/psr: Use WA to force HW tracking to exit PSR2
  2018-10-01 23:20 [PATCH v3 1/6] drm/i915/psr: Share PSR and PSR2 exit mask José Roberto de Souza
  2018-10-01 23:20 ` [PATCH v3 2/6] drm/i915/psr: Make MASK_DISP_REG_WRITE reserved in PSR_MASK for ICL José Roberto de Souza
  2018-10-01 23:20 ` [PATCH v3 3/6] drm/i915/psr: Remove PSR2 TODO error handling José Roberto de Souza
@ 2018-10-01 23:20 ` José Roberto de Souza
  2018-10-01 23:20 ` [PATCH v3 5/6] drm/i915/psr: Don't tell sink that main link will be active while is active PSR2 José Roberto de Souza
                   ` (5 subsequent siblings)
  8 siblings, 0 replies; 10+ messages in thread
From: José Roberto de Souza @ 2018-10-01 23:20 UTC (permalink / raw)
  To: intel-gfx

This WA also works fine for PSR2, triggering a selective update when
possible.

Acked-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/intel_psr.c | 24 ++++++++++--------------
 1 file changed, 10 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index fbceb814d6be..341af802b251 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -1023,20 +1023,16 @@ void intel_psr_flush(struct drm_i915_private *dev_priv,
 
 	/* By definition flush = invalidate + flush */
 	if (frontbuffer_bits) {
-		if (dev_priv->psr.psr2_enabled) {
-			intel_psr_exit(dev_priv);
-		} else {
-			/*
-			 * Display WA #0884: all
-			 * This documented WA for bxt can be safely applied
-			 * broadly so we can force HW tracking to exit PSR
-			 * instead of disabling and re-enabling.
-			 * Workaround tells us to write 0 to CUR_SURFLIVE_A,
-			 * but it makes more sense write to the current active
-			 * pipe.
-			 */
-			I915_WRITE(CURSURFLIVE(pipe), 0);
-		}
+		/*
+		 * Display WA #0884: all
+		 * This documented WA for bxt can be safely applied
+		 * broadly so we can force HW tracking to exit PSR
+		 * instead of disabling and re-enabling.
+		 * Workaround tells us to write 0 to CUR_SURFLIVE_A,
+		 * but it makes more sense write to the current active
+		 * pipe.
+		 */
+		I915_WRITE(CURSURFLIVE(pipe), 0);
 	}
 
 	if (!dev_priv->psr.active && !dev_priv->psr.busy_frontbuffer_bits)
-- 
2.19.0

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^ permalink raw reply related	[flat|nested] 10+ messages in thread
* [PATCH v3 5/6] drm/i915/psr: Don't tell sink that main link will be active while is active PSR2
  2018-10-01 23:20 [PATCH v3 1/6] drm/i915/psr: Share PSR and PSR2 exit mask José Roberto de Souza
                   ` (2 preceding siblings ...)
  2018-10-01 23:20 ` [PATCH v3 4/6] drm/i915/psr: Use WA to force HW tracking to exit PSR2 José Roberto de Souza
@ 2018-10-01 23:20 ` José Roberto de Souza
  2018-10-01 23:20 ` [PATCH v3 6/6] drm/i915/psr: Remove alpm from i915_psr José Roberto de Souza
                   ` (4 subsequent siblings)
  8 siblings, 0 replies; 10+ messages in thread
From: José Roberto de Souza @ 2018-10-01 23:20 UTC (permalink / raw)
  To: intel-gfx; +Cc: Dhinakaran Pandiyan

For PSR2 there is no register to tell HW to keep main link enabled
while PSR2 is active, so don't configure sink DPCD with a
wrong value.

v3: Also update the value printed in debugfs

Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/i915_debugfs.c |  3 ++-
 drivers/gpu/drm/i915/intel_psr.c    | 10 ++++++----
 2 files changed, 8 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index b4744a68cd88..14d58d121f2a 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2723,7 +2723,8 @@ static int i915_edp_psr_status(struct seq_file *m, void *data)
 		enabled = I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE;
 
 	seq_printf(m, "Main link in standby mode: %s\n",
-		   yesno(dev_priv->psr.link_standby));
+		   yesno(dev_priv->psr.link_standby &&
+		   !dev_priv->psr.psr2_enabled));
 
 	seq_printf(m, "HW Enabled & Active bit: %s\n", yesno(enabled));
 
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 341af802b251..02dcc33750a8 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -342,12 +342,14 @@ static void intel_psr_enable_sink(struct intel_dp *intel_dp)
 		drm_dp_dpcd_writeb(&intel_dp->aux, DP_RECEIVER_ALPM_CONFIG,
 				   DP_ALPM_ENABLE);
 		dpcd_val |= DP_PSR_ENABLE_PSR2;
+	} else {
+		if (dev_priv->psr.link_standby)
+			dpcd_val |= DP_PSR_MAIN_LINK_ACTIVE;
+
+		if (INTEL_GEN(dev_priv) >= 8)
+			dpcd_val |= DP_PSR_CRC_VERIFICATION;
 	}
 
-	if (dev_priv->psr.link_standby)
-		dpcd_val |= DP_PSR_MAIN_LINK_ACTIVE;
-	if (!dev_priv->psr.psr2_enabled && INTEL_GEN(dev_priv) >= 8)
-		dpcd_val |= DP_PSR_CRC_VERIFICATION;
 	drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, dpcd_val);
 
 	drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER, DP_SET_POWER_D0);
-- 
2.19.0

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^ permalink raw reply related	[flat|nested] 10+ messages in thread
* [PATCH v3 6/6] drm/i915/psr: Remove alpm from i915_psr
  2018-10-01 23:20 [PATCH v3 1/6] drm/i915/psr: Share PSR and PSR2 exit mask José Roberto de Souza
                   ` (3 preceding siblings ...)
  2018-10-01 23:20 ` [PATCH v3 5/6] drm/i915/psr: Don't tell sink that main link will be active while is active PSR2 José Roberto de Souza
@ 2018-10-01 23:20 ` José Roberto de Souza
  2018-10-01 23:47 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [v3,1/6] drm/i915/psr: Share PSR and PSR2 exit mask Patchwork
                   ` (3 subsequent siblings)
  8 siblings, 0 replies; 10+ messages in thread
From: José Roberto de Souza @ 2018-10-01 23:20 UTC (permalink / raw)
  To: intel-gfx

ALPM is a requirement and we don't need to keep it's cached, what
were done in commit 97c9de66ca80
("drm/i915/psr: Fix ALPM cap check for PSR2") but the alpm was not
removed from i915_psr.

Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index b672ed0cac24..149d1f88f5e4 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -632,7 +632,6 @@ struct i915_psr {
 	bool sink_psr2_support;
 	bool link_standby;
 	bool colorimetry_support;
-	bool alpm;
 	bool psr2_enabled;
 	u8 sink_sync_latency;
 	ktime_t last_entry_attempt;
-- 
2.19.0

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^ permalink raw reply related	[flat|nested] 10+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for series starting with [v3,1/6] drm/i915/psr: Share PSR and PSR2 exit mask
  2018-10-01 23:20 [PATCH v3 1/6] drm/i915/psr: Share PSR and PSR2 exit mask José Roberto de Souza
                   ` (4 preceding siblings ...)
  2018-10-01 23:20 ` [PATCH v3 6/6] drm/i915/psr: Remove alpm from i915_psr José Roberto de Souza
@ 2018-10-01 23:47 ` Patchwork
  2018-10-01 23:49 ` ✗ Fi.CI.SPARSE: " Patchwork
                   ` (2 subsequent siblings)
  8 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2018-10-01 23:47 UTC (permalink / raw)
  To: José Roberto de Souza; +Cc: intel-gfx

== Series Details ==

Series: series starting with [v3,1/6] drm/i915/psr: Share PSR and PSR2 exit mask
URL   : https://patchwork.freedesktop.org/series/50417/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
f82ea23a1cf4 drm/i915/psr: Share PSR and PSR2 exit mask
86c86b719ae1 drm/i915/psr: Make MASK_DISP_REG_WRITE reserved in PSR_MASK for ICL
9034607b220e drm/i915/psr: Remove PSR2 TODO error handling
3f238e1d2c3b drm/i915/psr: Use WA to force HW tracking to exit PSR2
00e220b8b69f drm/i915/psr: Don't tell sink that main link will be active while is active PSR2
-:29: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#29: FILE: drivers/gpu/drm/i915/i915_debugfs.c:2727:
+		   yesno(dev_priv->psr.link_standby &&
+		   !dev_priv->psr.psr2_enabled));

total: 0 errors, 0 warnings, 1 checks, 27 lines checked
eb96d2d16902 drm/i915/psr: Remove alpm from i915_psr

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^ permalink raw reply	[flat|nested] 10+ messages in thread
* ✗ Fi.CI.SPARSE: warning for series starting with [v3,1/6] drm/i915/psr: Share PSR and PSR2 exit mask
  2018-10-01 23:20 [PATCH v3 1/6] drm/i915/psr: Share PSR and PSR2 exit mask José Roberto de Souza
                   ` (5 preceding siblings ...)
  2018-10-01 23:47 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [v3,1/6] drm/i915/psr: Share PSR and PSR2 exit mask Patchwork
@ 2018-10-01 23:49 ` Patchwork
  2018-10-02  0:08 ` ✓ Fi.CI.BAT: success " Patchwork
  2018-10-02  5:05 ` ✓ Fi.CI.IGT: " Patchwork
  8 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2018-10-01 23:49 UTC (permalink / raw)
  To: José Roberto de Souza; +Cc: intel-gfx

== Series Details ==

Series: series starting with [v3,1/6] drm/i915/psr: Share PSR and PSR2 exit mask
URL   : https://patchwork.freedesktop.org/series/50417/
State : warning

== Summary ==

$ dim sparse origin/drm-tip
Commit: drm/i915/psr: Share PSR and PSR2 exit mask
Okay!

Commit: drm/i915/psr: Make MASK_DISP_REG_WRITE reserved in PSR_MASK for ICL
Okay!

Commit: drm/i915/psr: Remove PSR2 TODO error handling
Okay!

Commit: drm/i915/psr: Use WA to force HW tracking to exit PSR2
Okay!

Commit: drm/i915/psr: Don't tell sink that main link will be active while is active PSR2
Okay!

Commit: drm/i915/psr: Remove alpm from i915_psr
-drivers/gpu/drm/i915/selftests/../i915_drv.h:3724:16: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/selftests/../i915_drv.h:3723:16: warning: expression using sizeof(void)

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^ permalink raw reply	[flat|nested] 10+ messages in thread
* ✓ Fi.CI.BAT: success for series starting with [v3,1/6] drm/i915/psr: Share PSR and PSR2 exit mask
  2018-10-01 23:20 [PATCH v3 1/6] drm/i915/psr: Share PSR and PSR2 exit mask José Roberto de Souza
                   ` (6 preceding siblings ...)
  2018-10-01 23:49 ` ✗ Fi.CI.SPARSE: " Patchwork
@ 2018-10-02  0:08 ` Patchwork
  2018-10-02  5:05 ` ✓ Fi.CI.IGT: " Patchwork
  8 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2018-10-02  0:08 UTC (permalink / raw)
  To: José Roberto de Souza; +Cc: intel-gfx

== Series Details ==

Series: series starting with [v3,1/6] drm/i915/psr: Share PSR and PSR2 exit mask
URL   : https://patchwork.freedesktop.org/series/50417/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4911 -> Patchwork_10316 =

== Summary - SUCCESS ==

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/50417/revisions/1/mbox/

== Known issues ==

  Here are the changes found in Patchwork_10316 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence:
      fi-byt-clapper:     PASS -> FAIL (fdo#103191, fdo#107362)

    igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
      fi-bdw-samus:       NOTRUN -> INCOMPLETE (fdo#107773)

    
    ==== Possible fixes ====

    igt@gem_exec_suspend@basic-s3:
      fi-bdw-samus:       INCOMPLETE (fdo#107773) -> PASS

    igt@kms_pipe_crc_basic@hang-read-crc-pipe-b:
      fi-byt-clapper:     FAIL (fdo#103191, fdo#107362) -> PASS

    igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
      fi-blb-e6850:       INCOMPLETE (fdo#107718) -> PASS

    
  fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
  fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
  fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718
  fdo#107773 https://bugs.freedesktop.org/show_bug.cgi?id=107773


== Participating hosts (49 -> 46) ==

  Additional (3): fi-gdg-551 fi-snb-2520m fi-pnv-d510 
  Missing    (6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-u2 fi-ctg-p8600 


== Build changes ==

    * Linux: CI_DRM_4911 -> Patchwork_10316

  CI_DRM_4911: e46b4809753a2e3d3d73c5a9e028cd030bea60e5 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4659: 7f41adfbfd17027b71c332d6ae997f1364f73731 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_10316: eb96d2d16902fa0585527586405210e7591aa796 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

eb96d2d16902 drm/i915/psr: Remove alpm from i915_psr
00e220b8b69f drm/i915/psr: Don't tell sink that main link will be active while is active PSR2
3f238e1d2c3b drm/i915/psr: Use WA to force HW tracking to exit PSR2
9034607b220e drm/i915/psr: Remove PSR2 TODO error handling
86c86b719ae1 drm/i915/psr: Make MASK_DISP_REG_WRITE reserved in PSR_MASK for ICL
f82ea23a1cf4 drm/i915/psr: Share PSR and PSR2 exit mask

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10316/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 10+ messages in thread
* ✓ Fi.CI.IGT: success for series starting with [v3,1/6] drm/i915/psr: Share PSR and PSR2 exit mask
  2018-10-01 23:20 [PATCH v3 1/6] drm/i915/psr: Share PSR and PSR2 exit mask José Roberto de Souza
                   ` (7 preceding siblings ...)
  2018-10-02  0:08 ` ✓ Fi.CI.BAT: success " Patchwork
@ 2018-10-02  5:05 ` Patchwork
  8 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2018-10-02  5:05 UTC (permalink / raw)
  To: José Roberto de Souza; +Cc: intel-gfx

== Series Details ==

Series: series starting with [v3,1/6] drm/i915/psr: Share PSR and PSR2 exit mask
URL   : https://patchwork.freedesktop.org/series/50417/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4911_full -> Patchwork_10316_full =

== Summary - WARNING ==

  Minor unknown changes coming with Patchwork_10316_full need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_10316_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

== Possible new issues ==

  Here are the unknown changes that may have been introduced in Patchwork_10316_full:

  === IGT changes ===

    ==== Warnings ====

    igt@pm_rc6_residency@rc6-accuracy:
      shard-kbl:          PASS -> SKIP +1

    
== Known issues ==

  Here are the changes found in Patchwork_10316_full that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@drv_suspend@shrink:
      shard-kbl:          PASS -> INCOMPLETE (fdo#106886, fdo#103665)

    igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-a:
      shard-hsw:          PASS -> DMESG-WARN (fdo#107956)

    igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-b:
      shard-kbl:          PASS -> DMESG-WARN (fdo#107956) +1

    
    ==== Possible fixes ====

    igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-b:
      shard-hsw:          DMESG-WARN (fdo#107956) -> PASS +1

    igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
      shard-glk:          FAIL (fdo#105363) -> PASS +1

    igt@kms_vblank@pipe-c-ts-continuation-dpms-suspend:
      shard-apl:          DMESG-WARN (fdo#105602, fdo#103558) -> PASS +4

    
  fdo#103558 https://bugs.freedesktop.org/show_bug.cgi?id=103558
  fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665
  fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363
  fdo#105602 https://bugs.freedesktop.org/show_bug.cgi?id=105602
  fdo#106886 https://bugs.freedesktop.org/show_bug.cgi?id=106886
  fdo#107956 https://bugs.freedesktop.org/show_bug.cgi?id=107956


== Participating hosts (6 -> 5) ==

  Missing    (1): shard-skl 


== Build changes ==

    * Linux: CI_DRM_4911 -> Patchwork_10316

  CI_DRM_4911: e46b4809753a2e3d3d73c5a9e028cd030bea60e5 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4659: 7f41adfbfd17027b71c332d6ae997f1364f73731 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_10316: eb96d2d16902fa0585527586405210e7591aa796 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10316/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 10+ messages in thread
end of thread, other threads:[~2018-10-02  5:05 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-10-01 23:20 [PATCH v3 1/6] drm/i915/psr: Share PSR and PSR2 exit mask José Roberto de Souza
2018-10-01 23:20 ` [PATCH v3 2/6] drm/i915/psr: Make MASK_DISP_REG_WRITE reserved in PSR_MASK for ICL José Roberto de Souza
2018-10-01 23:20 ` [PATCH v3 3/6] drm/i915/psr: Remove PSR2 TODO error handling José Roberto de Souza
2018-10-01 23:20 ` [PATCH v3 4/6] drm/i915/psr: Use WA to force HW tracking to exit PSR2 José Roberto de Souza
2018-10-01 23:20 ` [PATCH v3 5/6] drm/i915/psr: Don't tell sink that main link will be active while is active PSR2 José Roberto de Souza
2018-10-01 23:20 ` [PATCH v3 6/6] drm/i915/psr: Remove alpm from i915_psr José Roberto de Souza
2018-10-01 23:47 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [v3,1/6] drm/i915/psr: Share PSR and PSR2 exit mask Patchwork
2018-10-01 23:49 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-10-02  0:08 ` ✓ Fi.CI.BAT: success " Patchwork
2018-10-02  5:05 ` ✓ Fi.CI.IGT: " Patchwork

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