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From: Manasi Navare <manasi.d.navare@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [CI 19/19] drm/i915/dsc: Add Per connector debugfs node for DSC support/enable
Date: Fri,  2 Nov 2018 20:49:32 -0700	[thread overview]
Message-ID: <20181103034932.26493-19-manasi.d.navare@intel.com> (raw)
In-Reply-To: <20181103034932.26493-1-manasi.d.navare@intel.com>

DSC can be supported per DP connector. This patch adds a per connector
debugfs node to expose DSC support capability by the kernel.
The same node can be used from userspace to force DSC enable.

force_dsc_en written through this debugfs node is used to force
DSC even for lower resolutions.

v4:
* Add missed connector_status check (Manasi)
* Create i915_dsc_support node only for Gen >=10 (manasi)
* Access intel_dp->dsc_dpcd only if its not NULL (Manasi)
v3:
* Combine Force_dsc_en with this patch (Ville)
v2:
* Use kstrtobool_from_user to avoid explicit error checking (Lyude)
* Rebase on drm-tip (Manasi)

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Lyude Paul <lyude@redhat.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
---
 drivers/gpu/drm/i915/i915_debugfs.c | 77 +++++++++++++++++++++++++++++
 drivers/gpu/drm/i915/intel_dp.c     |  3 +-
 drivers/gpu/drm/i915/intel_drv.h    |  3 ++
 3 files changed, 82 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 1a4d9d996fda..195591ff578a 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -5000,6 +5000,76 @@ static int i915_hdcp_sink_capability_show(struct seq_file *m, void *data)
 }
 DEFINE_SHOW_ATTRIBUTE(i915_hdcp_sink_capability);
 
+static int i915_dsc_support_show(struct seq_file *m, void *data)
+{
+	struct drm_connector *connector = m->private;
+	struct intel_encoder *encoder = intel_attached_encoder(connector);
+	struct intel_dp *intel_dp =
+		enc_to_intel_dp(&encoder->base);
+	struct intel_crtc *crtc;
+	struct intel_crtc_state *crtc_state;
+
+	if (connector->status != connector_status_connected)
+		return -ENODEV;
+
+	crtc = to_intel_crtc(encoder->base.crtc);
+	crtc_state = to_intel_crtc_state(crtc->base.state);
+	drm_modeset_lock(&crtc->base.mutex, NULL);
+	seq_printf(m, "Enabled: %s\n",
+		   yesno(crtc_state->dsc_params.compression_enable));
+	if (intel_dp->dsc_dpcd)
+		seq_printf(m, "Supported: %s\n",
+			   yesno(drm_dp_sink_supports_dsc(intel_dp->dsc_dpcd)));
+	drm_modeset_unlock(&crtc->base.mutex);
+
+	return 0;
+}
+
+static ssize_t i915_dsc_support_write(struct file *file,
+				      const char __user *ubuf,
+				      size_t len, loff_t *offp)
+{
+	bool dsc_enable = false;
+	int ret;
+	struct drm_connector *connector =
+		((struct seq_file *)file->private_data)->private;
+	struct intel_encoder *encoder = intel_attached_encoder(connector);
+	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
+
+	if (len == 0)
+		return 0;
+
+	DRM_DEBUG_DRIVER("Copied %d bytes from user to force DSC\n",
+			 (unsigned int)len);
+
+	ret = kstrtobool_from_user(ubuf, len, &dsc_enable);
+	if (ret < 0)
+		return ret;
+
+	DRM_DEBUG_DRIVER("Got %s for DSC Enable\n",
+			 (dsc_enable) ? "true" : "false");
+	intel_dp->force_dsc_en = dsc_enable;
+
+	*offp += len;
+	return len;
+}
+
+static int i915_dsc_support_open(struct inode *inode,
+				 struct file *file)
+{
+	return single_open(file, i915_dsc_support_show,
+			   inode->i_private);
+}
+
+static const struct file_operations i915_dsc_support_fops = {
+	.owner = THIS_MODULE,
+	.open = i915_dsc_support_open,
+	.read = seq_read,
+	.llseek = seq_lseek,
+	.release = single_release,
+	.write = i915_dsc_support_write
+};
+
 /**
  * i915_debugfs_connector_add - add i915 specific connector debugfs files
  * @connector: pointer to a registered drm_connector
@@ -5012,6 +5082,7 @@ DEFINE_SHOW_ATTRIBUTE(i915_hdcp_sink_capability);
 int i915_debugfs_connector_add(struct drm_connector *connector)
 {
 	struct dentry *root = connector->debugfs_entry;
+	struct drm_i915_private *dev_priv = to_i915(connector->dev);
 
 	/* The connector must have been registered beforehands. */
 	if (!root)
@@ -5036,5 +5107,11 @@ int i915_debugfs_connector_add(struct drm_connector *connector)
 				    connector, &i915_hdcp_sink_capability_fops);
 	}
 
+	if (INTEL_GEN(dev_priv) >= 10 &&
+	    (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
+	     connector->connector_type == DRM_MODE_CONNECTOR_eDP))
+		debugfs_create_file("i915_dsc_support", S_IRUGO, root,
+				    connector, &i915_dsc_support_fops);
+
 	return 0;
 }
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 4464f18d99c1..ebe679de3f41 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -2161,7 +2161,7 @@ intel_dp_compute_link_config(struct intel_encoder *encoder,
 							&limits);
 
 	/* enable compression if the mode doesn't fit available BW */
-	if (!ret) {
+	if (!ret || intel_dp->force_dsc_en) {
 		if (!intel_dp_dsc_compute_config(intel_dp, pipe_config,
 						 &limits))
 			return false;
@@ -2254,6 +2254,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
 	if (adjusted_mode->flags & DRM_MODE_FLAG_DBLCLK)
 		return false;
 
+	DRM_DEBUG_KMS("Force DSC en = %d\n", intel_dp->force_dsc_en);
 	if (!intel_dp_compute_link_config(encoder, pipe_config))
 		return false;
 
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 4d7339305dd1..c041789d7039 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1200,6 +1200,9 @@ struct intel_dp {
 
 	/* Displayport compliance testing */
 	struct intel_dp_compliance compliance;
+
+	/* Display stream compression testing */
+	bool force_dsc_en;
 };
 
 enum lspcon_vendor {
-- 
2.18.0

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  parent reply	other threads:[~2018-11-03  3:47 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-03  3:49 [CI 01/19] drm/dsc: Define Display Stream Compression PPS infoframe Manasi Navare
2018-11-03  3:49 ` [CI 02/19] drm/dsc: Define VESA Display Stream Compression Capabilities Manasi Navare
2018-11-03  3:49 ` [CI 03/19] drm/dsc: Define Rate Control values that do not change over configurations Manasi Navare
2018-11-03  3:49 ` [CI 04/19] drm/dsc: Add helpers for DSC picture parameter set infoframes Manasi Navare
2018-11-03  3:49 ` [CI 05/19] drm/dsc: Define the DSC 1.1 and 1.2 Line Buffer depth constants Manasi Navare
2018-11-03  3:49 ` [CI 06/19] drm/i915/dp: Add DSC params and DSC config to intel_crtc_state Manasi Navare
2018-11-03  3:49 ` [CI 07/19] drm/i915/dp: Compute DSC pipe config in atomic check Manasi Navare
2018-11-03  3:49 ` [CI 08/19] drm/i915/dp: Do not enable PSR2 if DSC is enabled Manasi Navare
2018-11-03  3:49 ` [CI 09/19] drm/i915/dsc: Define & Compute VESA DSC params Manasi Navare
2018-11-03  3:49 ` [CI 10/19] drm/i915/dsc: Compute Rate Control parameters for DSC Manasi Navare
2018-11-03  3:49 ` [CI 11/19] drm/i915/dp: Enable/Disable DSC in DP Sink Manasi Navare
2018-11-03  3:49 ` [CI 12/19] drm/i915/dsc: Add a power domain for VDSC on eDP/MIPI DSI Manasi Navare
2018-11-03  3:49 ` [CI 13/19] drm/i915/dp: Configure i915 Picture parameter Set registers during DSC enabling Manasi Navare
2018-11-03  3:49 ` [CI 14/19] drm/i915/dp: Use the existing write_infoframe() for DSC PPS SDPs Manasi Navare
2018-11-03  3:49 ` [CI 15/19] drm/i915/dp: Populate DSC PPS SDP and send PPS infoframes Manasi Navare
2018-11-03  3:49 ` [CI 16/19] drm/i915/dp: Configure Display stream splitter registers during DSC enable Manasi Navare
2018-11-03  3:49 ` [CI 17/19] drm/i915/dp: Disable DSC in source by disabling DSS CTL bits Manasi Navare
2018-11-03  3:49 ` [CI 18/19] drm/i915/dsc: Enable and disable appropriate power wells for VDSC Manasi Navare
2018-11-03  3:49 ` Manasi Navare [this message]
2018-11-03  3:59 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,01/19] drm/dsc: Define Display Stream Compression PPS infoframe Patchwork
2018-11-03  4:06 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-11-03  4:22 ` ✓ Fi.CI.BAT: success " Patchwork
2018-11-03  5:45 ` ✓ Fi.CI.IGT: " Patchwork

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