* [Intel-gfx] [PATCH v5 1/2] drm/edid: Name the detailed monitor range flags
@ 2020-03-09 21:39 Manasi Navare
2020-03-09 21:39 ` [Intel-gfx] [PATCH v5 2/2] drm/edid: Add function to parse EDID descriptors for adaptive sync limits Manasi Navare
` (3 more replies)
0 siblings, 4 replies; 10+ messages in thread
From: Manasi Navare @ 2020-03-09 21:39 UTC (permalink / raw)
To: intel-gfx, dri-devel; +Cc: Harry Wentland, Kazlauskas Nicholas
This patch adds defines for the detailed monitor
range flags as per the EDID specification.
v2:
* Rename the flags with DRM_EDID_ (Jani N)
Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Clinton A Taylor <clinton.a.taylor@intel.com>
Cc: Kazlauskas Nicholas <Nicholas.Kazlauskas@amd.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
---
include/drm/drm_edid.h | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
index f0b03d401c27..34b15e3d070c 100644
--- a/include/drm/drm_edid.h
+++ b/include/drm/drm_edid.h
@@ -91,6 +91,11 @@ struct detailed_data_string {
u8 str[13];
} __attribute__((packed));
+#define DRM_EDID_DEFAULT_GTF_SUPPORT_FLAG 0x00
+#define DRM_EDID_RANGE_LIMITS_ONLY_FLAG 0x01
+#define DRM_EDID_SECONDARY_GTF_SUPPORT_FLAG 0x02
+#define DRM_EDID_CVT_SUPPORT_FLAG 0x04
+
struct detailed_data_monitor_range {
u8 min_vfreq;
u8 max_vfreq;
--
2.19.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 10+ messages in thread* [Intel-gfx] [PATCH v5 2/2] drm/edid: Add function to parse EDID descriptors for adaptive sync limits 2020-03-09 21:39 [Intel-gfx] [PATCH v5 1/2] drm/edid: Name the detailed monitor range flags Manasi Navare @ 2020-03-09 21:39 ` Manasi Navare 2020-03-10 16:23 ` Ville Syrjälä 2020-03-10 19:08 ` Manasi Navare 2020-03-10 16:15 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v5,1/2] drm/edid: Name the detailed monitor range flags Patchwork ` (2 subsequent siblings) 3 siblings, 2 replies; 10+ messages in thread From: Manasi Navare @ 2020-03-09 21:39 UTC (permalink / raw) To: intel-gfx, dri-devel; +Cc: Harry Wentland, Kazlauskas Nicholas Adaptive Sync is a VESA feature so add a DRM core helper to parse the EDID's detailed descritors to obtain the adaptive sync monitor range. Store this info as part fo drm_display_info so it can be used across all drivers. This part of the code is stripped out of amdgpu's function amdgpu_dm_update_freesync_caps() to make it generic and be used across all DRM drivers v5: * Use the renamed flags v4: * Use is_display_descriptor() (Ville) * Name the monitor range flags (Ville) v3: * Remove the edid parsing restriction for just DP (Nicholas) * Use drm_for_each_detailed_block (Ville) * Make the drm_get_adaptive_sync_range function static (Harry, Jani) v2: * Change vmin and vmax to use u8 (Ville) * Dont store pixel clock since that is just a max dotclock and not related to VRR mode (Manasi) Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Harry Wentland <harry.wentland@amd.com> Cc: Clinton A Taylor <clinton.a.taylor@intel.com> Cc: Kazlauskas Nicholas <Nicholas.Kazlauskas@amd.com> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> --- drivers/gpu/drm/drm_edid.c | 44 +++++++++++++++++++++++++++++++++++++ include/drm/drm_connector.h | 22 +++++++++++++++++++ 2 files changed, 66 insertions(+) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index ad41764a4ebe..24b76ae58fdd 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -4938,6 +4938,47 @@ static void drm_parse_cea_ext(struct drm_connector *connector, } } +static +void get_adaptive_sync_range(struct detailed_timing *timing, + void *info_adaptive_sync) +{ + struct drm_adaptive_sync_info *adaptive_sync = info_adaptive_sync; + const struct detailed_non_pixel *data = &timing->data.other_data; + const struct detailed_data_monitor_range *range = &data->data.range; + + if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_MONITOR_RANGE)) + return; + + /* + * Check for flag range limits only. If flag == 1 then + * no additional timing information provided. + * Default GTF, GTF Secondary curve and CVT are not + * supported + */ + if (range->flags != DRM_EDID_RANGE_LIMITS_ONLY_FLAG) + return; + + adaptive_sync->min_vfreq = range->min_vfreq; + adaptive_sync->max_vfreq = range->max_vfreq; +} + +static +void drm_get_adaptive_sync_range(struct drm_connector *connector, + const struct edid *edid) +{ + struct drm_display_info *info = &connector->display_info; + + if (!version_greater(edid, 1, 1)) + return; + + drm_for_each_detailed_block((u8 *)edid, get_adaptive_sync_range, + &info->adaptive_sync); + + DRM_DEBUG_KMS("Adaptive Sync refresh rate range is %d Hz - %d Hz\n", + info->adaptive_sync.min_vfreq, + info->adaptive_sync.max_vfreq); +} + /* A connector has no EDID information, so we've got no EDID to compute quirks from. Reset * all of the values which would have been set from EDID */ @@ -4960,6 +5001,7 @@ drm_reset_display_info(struct drm_connector *connector) memset(&info->hdmi, 0, sizeof(info->hdmi)); info->non_desktop = 0; + memset(&info->adaptive_sync, 0, sizeof(info->adaptive_sync)); } u32 drm_add_display_info(struct drm_connector *connector, const struct edid *edid) @@ -4975,6 +5017,8 @@ u32 drm_add_display_info(struct drm_connector *connector, const struct edid *edi info->non_desktop = !!(quirks & EDID_QUIRK_NON_DESKTOP); + drm_get_adaptive_sync_range(connector, edid); + DRM_DEBUG_KMS("non_desktop set to %d\n", info->non_desktop); if (edid->revision < 3) diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h index 0df7a95ca5d9..2b22c0fa42c4 100644 --- a/include/drm/drm_connector.h +++ b/include/drm/drm_connector.h @@ -254,6 +254,23 @@ enum drm_panel_orientation { DRM_MODE_PANEL_ORIENTATION_RIGHT_UP, }; +/** + * struct drm_adaptive_sync_info - Panel's Adaptive Sync capabilities for + * &drm_display_info + * + * This struct is used to store a Panel's Adaptive Sync capabilities + * as parsed from EDID's detailed monitor range descriptor block. + * + * @min_vfreq: This is the min supported refresh rate in Hz from + * EDID's detailed monitor range. + * @max_vfreq: This is the max supported refresh rate in Hz from + * EDID's detailed monitor range + */ +struct drm_adaptive_sync_info { + u8 min_vfreq; + u8 max_vfreq; +}; + /* * This is a consolidated colorimetry list supported by HDMI and * DP protocol standard. The respective connectors will register @@ -473,6 +490,11 @@ struct drm_display_info { * @non_desktop: Non desktop display (HMD). */ bool non_desktop; + + /** + * @adaptive_sync: Adaptive Sync capabilities of the DP/eDP sink + */ + struct drm_adaptive_sync_info adaptive_sync; }; int drm_display_info_set_bus_formats(struct drm_display_info *info, -- 2.19.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [Intel-gfx] [PATCH v5 2/2] drm/edid: Add function to parse EDID descriptors for adaptive sync limits 2020-03-09 21:39 ` [Intel-gfx] [PATCH v5 2/2] drm/edid: Add function to parse EDID descriptors for adaptive sync limits Manasi Navare @ 2020-03-10 16:23 ` Ville Syrjälä 2020-03-10 19:08 ` Manasi Navare 1 sibling, 0 replies; 10+ messages in thread From: Ville Syrjälä @ 2020-03-10 16:23 UTC (permalink / raw) To: Manasi Navare; +Cc: intel-gfx, Harry Wentland, Kazlauskas Nicholas, dri-devel On Mon, Mar 09, 2020 at 02:39:40PM -0700, Manasi Navare wrote: > Adaptive Sync is a VESA feature so add a DRM core helper to parse > the EDID's detailed descritors to obtain the adaptive sync monitor range. > Store this info as part fo drm_display_info so it can be used > across all drivers. > This part of the code is stripped out of amdgpu's function > amdgpu_dm_update_freesync_caps() to make it generic and be used > across all DRM drivers > > v5: > * Use the renamed flags > v4: > * Use is_display_descriptor() (Ville) > * Name the monitor range flags (Ville) > v3: > * Remove the edid parsing restriction for just DP (Nicholas) > * Use drm_for_each_detailed_block (Ville) > * Make the drm_get_adaptive_sync_range function static (Harry, Jani) > v2: > * Change vmin and vmax to use u8 (Ville) > * Dont store pixel clock since that is just a max dotclock > and not related to VRR mode (Manasi) > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > Cc: Harry Wentland <harry.wentland@amd.com> > Cc: Clinton A Taylor <clinton.a.taylor@intel.com> > Cc: Kazlauskas Nicholas <Nicholas.Kazlauskas@amd.com> > Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> > Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> > --- > drivers/gpu/drm/drm_edid.c | 44 +++++++++++++++++++++++++++++++++++++ > include/drm/drm_connector.h | 22 +++++++++++++++++++ > 2 files changed, 66 insertions(+) > > diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c > index ad41764a4ebe..24b76ae58fdd 100644 > --- a/drivers/gpu/drm/drm_edid.c > +++ b/drivers/gpu/drm/drm_edid.c > @@ -4938,6 +4938,47 @@ static void drm_parse_cea_ext(struct drm_connector *connector, > } > } > > +static > +void get_adaptive_sync_range(struct detailed_timing *timing, > + void *info_adaptive_sync) closure/data/c is what everyone else calls this. Why are we being different? > +{ > + struct drm_adaptive_sync_info *adaptive_sync = info_adaptive_sync; > + const struct detailed_non_pixel *data = &timing->data.other_data; > + const struct detailed_data_monitor_range *range = &data->data.range; > + > + if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_MONITOR_RANGE)) > + return; > + > + /* > + * Check for flag range limits only. If flag == 1 then > + * no additional timing information provided. > + * Default GTF, GTF Secondary curve and CVT are not > + * supported > + */ > + if (range->flags != DRM_EDID_RANGE_LIMITS_ONLY_FLAG) > + return; > + > + adaptive_sync->min_vfreq = range->min_vfreq; > + adaptive_sync->max_vfreq = range->max_vfreq; > +} > + > +static > +void drm_get_adaptive_sync_range(struct drm_connector *connector, > + const struct edid *edid) > +{ > + struct drm_display_info *info = &connector->display_info; > + > + if (!version_greater(edid, 1, 1)) > + return; > + > + drm_for_each_detailed_block((u8 *)edid, get_adaptive_sync_range, > + &info->adaptive_sync); > + > + DRM_DEBUG_KMS("Adaptive Sync refresh rate range is %d Hz - %d Hz\n", > + info->adaptive_sync.min_vfreq, > + info->adaptive_sync.max_vfreq); This seems a bit misleading since these are just the limits from the range descriptor. We don't know whether adaptive is supported or not. > +} > + > /* A connector has no EDID information, so we've got no EDID to compute quirks from. Reset > * all of the values which would have been set from EDID > */ > @@ -4960,6 +5001,7 @@ drm_reset_display_info(struct drm_connector *connector) > memset(&info->hdmi, 0, sizeof(info->hdmi)); > > info->non_desktop = 0; > + memset(&info->adaptive_sync, 0, sizeof(info->adaptive_sync)); > } > > u32 drm_add_display_info(struct drm_connector *connector, const struct edid *edid) > @@ -4975,6 +5017,8 @@ u32 drm_add_display_info(struct drm_connector *connector, const struct edid *edi > > info->non_desktop = !!(quirks & EDID_QUIRK_NON_DESKTOP); > > + drm_get_adaptive_sync_range(connector, edid); > + > DRM_DEBUG_KMS("non_desktop set to %d\n", info->non_desktop); > > if (edid->revision < 3) > diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h > index 0df7a95ca5d9..2b22c0fa42c4 100644 > --- a/include/drm/drm_connector.h > +++ b/include/drm/drm_connector.h > @@ -254,6 +254,23 @@ enum drm_panel_orientation { > DRM_MODE_PANEL_ORIENTATION_RIGHT_UP, > }; > > +/** > + * struct drm_adaptive_sync_info - Panel's Adaptive Sync capabilities for > + * &drm_display_info > + * > + * This struct is used to store a Panel's Adaptive Sync capabilities > + * as parsed from EDID's detailed monitor range descriptor block. > + * > + * @min_vfreq: This is the min supported refresh rate in Hz from > + * EDID's detailed monitor range. > + * @max_vfreq: This is the max supported refresh rate in Hz from > + * EDID's detailed monitor range > + */ > +struct drm_adaptive_sync_info { > + u8 min_vfreq; > + u8 max_vfreq; > +}; > + > /* > * This is a consolidated colorimetry list supported by HDMI and > * DP protocol standard. The respective connectors will register > @@ -473,6 +490,11 @@ struct drm_display_info { > * @non_desktop: Non desktop display (HMD). > */ > bool non_desktop; > + > + /** > + * @adaptive_sync: Adaptive Sync capabilities of the DP/eDP sink > + */ > + struct drm_adaptive_sync_info adaptive_sync; > }; > > int drm_display_info_set_bus_formats(struct drm_display_info *info, > -- > 2.19.1 -- Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [Intel-gfx] [PATCH v5 2/2] drm/edid: Add function to parse EDID descriptors for adaptive sync limits 2020-03-09 21:39 ` [Intel-gfx] [PATCH v5 2/2] drm/edid: Add function to parse EDID descriptors for adaptive sync limits Manasi Navare 2020-03-10 16:23 ` Ville Syrjälä @ 2020-03-10 19:08 ` Manasi Navare 2020-03-10 19:13 ` Ville Syrjälä 1 sibling, 1 reply; 10+ messages in thread From: Manasi Navare @ 2020-03-10 19:08 UTC (permalink / raw) To: intel-gfx, dri-devel; +Cc: Harry Wentland, Kazlauskas Nicholas Hi Ville, Please find answers to your concerns below: On Mon, Mar 09, 2020 at 02:39:40PM -0700, Manasi Navare wrote: > Adaptive Sync is a VESA feature so add a DRM core helper to parse > the EDID's detailed descritors to obtain the adaptive sync monitor range. > Store this info as part fo drm_display_info so it can be used > across all drivers. > This part of the code is stripped out of amdgpu's function > amdgpu_dm_update_freesync_caps() to make it generic and be used > across all DRM drivers > > v5: > * Use the renamed flags > v4: > * Use is_display_descriptor() (Ville) > * Name the monitor range flags (Ville) > v3: > * Remove the edid parsing restriction for just DP (Nicholas) > * Use drm_for_each_detailed_block (Ville) > * Make the drm_get_adaptive_sync_range function static (Harry, Jani) > v2: > * Change vmin and vmax to use u8 (Ville) > * Dont store pixel clock since that is just a max dotclock > and not related to VRR mode (Manasi) > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > Cc: Harry Wentland <harry.wentland@amd.com> > Cc: Clinton A Taylor <clinton.a.taylor@intel.com> > Cc: Kazlauskas Nicholas <Nicholas.Kazlauskas@amd.com> > Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> > Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> > --- > drivers/gpu/drm/drm_edid.c | 44 +++++++++++++++++++++++++++++++++++++ > include/drm/drm_connector.h | 22 +++++++++++++++++++ > 2 files changed, 66 insertions(+) > > diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c > index ad41764a4ebe..24b76ae58fdd 100644 > --- a/drivers/gpu/drm/drm_edid.c > +++ b/drivers/gpu/drm/drm_edid.c > @@ -4938,6 +4938,47 @@ static void drm_parse_cea_ext(struct drm_connector *connector, > } > } > > +static > +void get_adaptive_sync_range(struct detailed_timing *timing, > + void *info_adaptive_sync) > +{ > + struct drm_adaptive_sync_info *adaptive_sync = info_adaptive_sync; > + const struct detailed_non_pixel *data = &timing->data.other_data; > + const struct detailed_data_monitor_range *range = &data->data.range; > + > + if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_MONITOR_RANGE)) > + return; > + > + /* > + * Check for flag range limits only. If flag == 1 then > + * no additional timing information provided. > + * Default GTF, GTF Secondary curve and CVT are not > + * supported > + */ > + if (range->flags != DRM_EDID_RANGE_LIMITS_ONLY_FLAG) > + return; > + > + adaptive_sync->min_vfreq = range->min_vfreq; > + adaptive_sync->max_vfreq = range->max_vfreq; > +} > + > +static > +void drm_get_adaptive_sync_range(struct drm_connector *connector, > + const struct edid *edid) > +{ > + struct drm_display_info *info = &connector->display_info; > + > + if (!version_greater(edid, 1, 1)) > + return; > + > + drm_for_each_detailed_block((u8 *)edid, get_adaptive_sync_range, > + &info->adaptive_sync); Some functions like get_monitor_name also pass something like &edid_name, I dont think there is any specific convention of the argument name to be passed. > + > + DRM_DEBUG_KMS("Adaptive Sync refresh rate range is %d Hz - %d Hz\n", > + info->adaptive_sync.min_vfreq, > + info->adaptive_sync.max_vfreq); Yes I agree that this is just a monitor range and unless the dpcd ignore msa bit is set and the range is atleast 10Hz apart , it might not be vrr range. Would you prefer renaming this info->adaptive_sync as info->monitor_range ? Or should i just print it out as Monitor range is in the dmesg but leave the info->adaptive_sync naming as is? Manasi > +} > + > /* A connector has no EDID information, so we've got no EDID to compute quirks from. Reset > * all of the values which would have been set from EDID > */ > @@ -4960,6 +5001,7 @@ drm_reset_display_info(struct drm_connector *connector) > memset(&info->hdmi, 0, sizeof(info->hdmi)); > > info->non_desktop = 0; > + memset(&info->adaptive_sync, 0, sizeof(info->adaptive_sync)); > } > > u32 drm_add_display_info(struct drm_connector *connector, const struct edid *edid) > @@ -4975,6 +5017,8 @@ u32 drm_add_display_info(struct drm_connector *connector, const struct edid *edi > > info->non_desktop = !!(quirks & EDID_QUIRK_NON_DESKTOP); > > + drm_get_adaptive_sync_range(connector, edid); > + > DRM_DEBUG_KMS("non_desktop set to %d\n", info->non_desktop); > > if (edid->revision < 3) > diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h > index 0df7a95ca5d9..2b22c0fa42c4 100644 > --- a/include/drm/drm_connector.h > +++ b/include/drm/drm_connector.h > @@ -254,6 +254,23 @@ enum drm_panel_orientation { > DRM_MODE_PANEL_ORIENTATION_RIGHT_UP, > }; > > +/** > + * struct drm_adaptive_sync_info - Panel's Adaptive Sync capabilities for > + * &drm_display_info > + * > + * This struct is used to store a Panel's Adaptive Sync capabilities > + * as parsed from EDID's detailed monitor range descriptor block. > + * > + * @min_vfreq: This is the min supported refresh rate in Hz from > + * EDID's detailed monitor range. > + * @max_vfreq: This is the max supported refresh rate in Hz from > + * EDID's detailed monitor range > + */ > +struct drm_adaptive_sync_info { > + u8 min_vfreq; > + u8 max_vfreq; > +}; > + > /* > * This is a consolidated colorimetry list supported by HDMI and > * DP protocol standard. The respective connectors will register > @@ -473,6 +490,11 @@ struct drm_display_info { > * @non_desktop: Non desktop display (HMD). > */ > bool non_desktop; > + > + /** > + * @adaptive_sync: Adaptive Sync capabilities of the DP/eDP sink > + */ > + struct drm_adaptive_sync_info adaptive_sync; > }; > > int drm_display_info_set_bus_formats(struct drm_display_info *info, > -- > 2.19.1 > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [Intel-gfx] [PATCH v5 2/2] drm/edid: Add function to parse EDID descriptors for adaptive sync limits 2020-03-10 19:08 ` Manasi Navare @ 2020-03-10 19:13 ` Ville Syrjälä 2020-03-10 19:21 ` Manasi Navare 0 siblings, 1 reply; 10+ messages in thread From: Ville Syrjälä @ 2020-03-10 19:13 UTC (permalink / raw) To: Manasi Navare; +Cc: intel-gfx, Harry Wentland, Kazlauskas Nicholas, dri-devel On Tue, Mar 10, 2020 at 12:08:33PM -0700, Manasi Navare wrote: > Hi Ville, > > Please find answers to your concerns below: > > On Mon, Mar 09, 2020 at 02:39:40PM -0700, Manasi Navare wrote: > > Adaptive Sync is a VESA feature so add a DRM core helper to parse > > the EDID's detailed descritors to obtain the adaptive sync monitor range. > > Store this info as part fo drm_display_info so it can be used > > across all drivers. > > This part of the code is stripped out of amdgpu's function > > amdgpu_dm_update_freesync_caps() to make it generic and be used > > across all DRM drivers > > > > v5: > > * Use the renamed flags > > v4: > > * Use is_display_descriptor() (Ville) > > * Name the monitor range flags (Ville) > > v3: > > * Remove the edid parsing restriction for just DP (Nicholas) > > * Use drm_for_each_detailed_block (Ville) > > * Make the drm_get_adaptive_sync_range function static (Harry, Jani) > > v2: > > * Change vmin and vmax to use u8 (Ville) > > * Dont store pixel clock since that is just a max dotclock > > and not related to VRR mode (Manasi) > > > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Cc: Harry Wentland <harry.wentland@amd.com> > > Cc: Clinton A Taylor <clinton.a.taylor@intel.com> > > Cc: Kazlauskas Nicholas <Nicholas.Kazlauskas@amd.com> > > Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> > > Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> > > --- > > drivers/gpu/drm/drm_edid.c | 44 +++++++++++++++++++++++++++++++++++++ > > include/drm/drm_connector.h | 22 +++++++++++++++++++ > > 2 files changed, 66 insertions(+) > > > > diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c > > index ad41764a4ebe..24b76ae58fdd 100644 > > --- a/drivers/gpu/drm/drm_edid.c > > +++ b/drivers/gpu/drm/drm_edid.c > > @@ -4938,6 +4938,47 @@ static void drm_parse_cea_ext(struct drm_connector *connector, > > } > > } > > > > +static > > +void get_adaptive_sync_range(struct detailed_timing *timing, > > + void *info_adaptive_sync) > > +{ > > + struct drm_adaptive_sync_info *adaptive_sync = info_adaptive_sync; > > + const struct detailed_non_pixel *data = &timing->data.other_data; > > + const struct detailed_data_monitor_range *range = &data->data.range; > > + > > + if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_MONITOR_RANGE)) > > + return; > > + > > + /* > > + * Check for flag range limits only. If flag == 1 then > > + * no additional timing information provided. > > + * Default GTF, GTF Secondary curve and CVT are not > > + * supported > > + */ > > + if (range->flags != DRM_EDID_RANGE_LIMITS_ONLY_FLAG) > > + return; > > + > > + adaptive_sync->min_vfreq = range->min_vfreq; > > + adaptive_sync->max_vfreq = range->max_vfreq; > > +} > > + > > +static > > +void drm_get_adaptive_sync_range(struct drm_connector *connector, > > + const struct edid *edid) > > +{ > > + struct drm_display_info *info = &connector->display_info; > > + > > + if (!version_greater(edid, 1, 1)) > > + return; > > + > > + drm_for_each_detailed_block((u8 *)edid, get_adaptive_sync_range, > > + &info->adaptive_sync); > > Some functions like get_monitor_name also pass something like &edid_name, I dont > think there is any specific convention of the argument name to be passed. Hmm. Yeah, it's a bit all over. Still I'd probably follow the majority vote. > > > + > > + DRM_DEBUG_KMS("Adaptive Sync refresh rate range is %d Hz - %d Hz\n", > > + info->adaptive_sync.min_vfreq, > > + info->adaptive_sync.max_vfreq); > > Yes I agree that this is just a monitor range and unless the dpcd ignore msa bit is set > and the range is atleast 10Hz apart , it might not be vrr range. > > Would you prefer renaming this info->adaptive_sync as info->monitor_range ? Or > should i just print it out as Monitor range is in the dmesg but leave the info->adaptive_sync > naming as is? If we want to parse it uncoditionally then I guess I'd go with the monitor_rage naming, and leave it up to the vrr code to know what to do with it. > > Manasi > > > +} > > + > > /* A connector has no EDID information, so we've got no EDID to compute quirks from. Reset > > * all of the values which would have been set from EDID > > */ > > @@ -4960,6 +5001,7 @@ drm_reset_display_info(struct drm_connector *connector) > > memset(&info->hdmi, 0, sizeof(info->hdmi)); > > > > info->non_desktop = 0; > > + memset(&info->adaptive_sync, 0, sizeof(info->adaptive_sync)); > > } > > > > u32 drm_add_display_info(struct drm_connector *connector, const struct edid *edid) > > @@ -4975,6 +5017,8 @@ u32 drm_add_display_info(struct drm_connector *connector, const struct edid *edi > > > > info->non_desktop = !!(quirks & EDID_QUIRK_NON_DESKTOP); > > > > + drm_get_adaptive_sync_range(connector, edid); > > + > > DRM_DEBUG_KMS("non_desktop set to %d\n", info->non_desktop); > > > > if (edid->revision < 3) > > diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h > > index 0df7a95ca5d9..2b22c0fa42c4 100644 > > --- a/include/drm/drm_connector.h > > +++ b/include/drm/drm_connector.h > > @@ -254,6 +254,23 @@ enum drm_panel_orientation { > > DRM_MODE_PANEL_ORIENTATION_RIGHT_UP, > > }; > > > > +/** > > + * struct drm_adaptive_sync_info - Panel's Adaptive Sync capabilities for > > + * &drm_display_info > > + * > > + * This struct is used to store a Panel's Adaptive Sync capabilities > > + * as parsed from EDID's detailed monitor range descriptor block. > > + * > > + * @min_vfreq: This is the min supported refresh rate in Hz from > > + * EDID's detailed monitor range. > > + * @max_vfreq: This is the max supported refresh rate in Hz from > > + * EDID's detailed monitor range > > + */ > > +struct drm_adaptive_sync_info { > > + u8 min_vfreq; > > + u8 max_vfreq; > > +}; > > + > > /* > > * This is a consolidated colorimetry list supported by HDMI and > > * DP protocol standard. The respective connectors will register > > @@ -473,6 +490,11 @@ struct drm_display_info { > > * @non_desktop: Non desktop display (HMD). > > */ > > bool non_desktop; > > + > > + /** > > + * @adaptive_sync: Adaptive Sync capabilities of the DP/eDP sink > > + */ > > + struct drm_adaptive_sync_info adaptive_sync; > > }; > > > > int drm_display_info_set_bus_formats(struct drm_display_info *info, > > -- > > 2.19.1 > > -- Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [Intel-gfx] [PATCH v5 2/2] drm/edid: Add function to parse EDID descriptors for adaptive sync limits 2020-03-10 19:13 ` Ville Syrjälä @ 2020-03-10 19:21 ` Manasi Navare 0 siblings, 0 replies; 10+ messages in thread From: Manasi Navare @ 2020-03-10 19:21 UTC (permalink / raw) To: Ville Syrjälä Cc: intel-gfx, Harry Wentland, Kazlauskas Nicholas, dri-devel On Tue, Mar 10, 2020 at 09:13:30PM +0200, Ville Syrjälä wrote: > On Tue, Mar 10, 2020 at 12:08:33PM -0700, Manasi Navare wrote: > > Hi Ville, > > > > Please find answers to your concerns below: > > > > On Mon, Mar 09, 2020 at 02:39:40PM -0700, Manasi Navare wrote: > > > Adaptive Sync is a VESA feature so add a DRM core helper to parse > > > the EDID's detailed descritors to obtain the adaptive sync monitor range. > > > Store this info as part fo drm_display_info so it can be used > > > across all drivers. > > > This part of the code is stripped out of amdgpu's function > > > amdgpu_dm_update_freesync_caps() to make it generic and be used > > > across all DRM drivers > > > > > > v5: > > > * Use the renamed flags > > > v4: > > > * Use is_display_descriptor() (Ville) > > > * Name the monitor range flags (Ville) > > > v3: > > > * Remove the edid parsing restriction for just DP (Nicholas) > > > * Use drm_for_each_detailed_block (Ville) > > > * Make the drm_get_adaptive_sync_range function static (Harry, Jani) > > > v2: > > > * Change vmin and vmax to use u8 (Ville) > > > * Dont store pixel clock since that is just a max dotclock > > > and not related to VRR mode (Manasi) > > > > > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > > > Cc: Harry Wentland <harry.wentland@amd.com> > > > Cc: Clinton A Taylor <clinton.a.taylor@intel.com> > > > Cc: Kazlauskas Nicholas <Nicholas.Kazlauskas@amd.com> > > > Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> > > > Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> > > > --- > > > drivers/gpu/drm/drm_edid.c | 44 +++++++++++++++++++++++++++++++++++++ > > > include/drm/drm_connector.h | 22 +++++++++++++++++++ > > > 2 files changed, 66 insertions(+) > > > > > > diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c > > > index ad41764a4ebe..24b76ae58fdd 100644 > > > --- a/drivers/gpu/drm/drm_edid.c > > > +++ b/drivers/gpu/drm/drm_edid.c > > > @@ -4938,6 +4938,47 @@ static void drm_parse_cea_ext(struct drm_connector *connector, > > > } > > > } > > > > > > +static > > > +void get_adaptive_sync_range(struct detailed_timing *timing, > > > + void *info_adaptive_sync) > > > +{ > > > + struct drm_adaptive_sync_info *adaptive_sync = info_adaptive_sync; > > > + const struct detailed_non_pixel *data = &timing->data.other_data; > > > + const struct detailed_data_monitor_range *range = &data->data.range; > > > + > > > + if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_MONITOR_RANGE)) > > > + return; > > > + > > > + /* > > > + * Check for flag range limits only. If flag == 1 then > > > + * no additional timing information provided. > > > + * Default GTF, GTF Secondary curve and CVT are not > > > + * supported > > > + */ > > > + if (range->flags != DRM_EDID_RANGE_LIMITS_ONLY_FLAG) > > > + return; > > > + > > > + adaptive_sync->min_vfreq = range->min_vfreq; > > > + adaptive_sync->max_vfreq = range->max_vfreq; > > > +} > > > + > > > +static > > > +void drm_get_adaptive_sync_range(struct drm_connector *connector, > > > + const struct edid *edid) > > > +{ > > > + struct drm_display_info *info = &connector->display_info; > > > + > > > + if (!version_greater(edid, 1, 1)) > > > + return; > > > + > > > + drm_for_each_detailed_block((u8 *)edid, get_adaptive_sync_range, > > > + &info->adaptive_sync); > > > > Some functions like get_monitor_name also pass something like &edid_name, I dont > > think there is any specific convention of the argument name to be passed. > > Hmm. Yeah, it's a bit all over. Still I'd probably follow > the majority vote. > I feel that this name makes it more intuitive rather than adding a generic name If you dont feel strongly about changing it, I would like to keep this as is > > > > > + > > > + DRM_DEBUG_KMS("Adaptive Sync refresh rate range is %d Hz - %d Hz\n", > > > + info->adaptive_sync.min_vfreq, > > > + info->adaptive_sync.max_vfreq); > > > > Yes I agree that this is just a monitor range and unless the dpcd ignore msa bit is set > > and the range is atleast 10Hz apart , it might not be vrr range. > > > > Would you prefer renaming this info->adaptive_sync as info->monitor_range ? Or > > should i just print it out as Monitor range is in the dmesg but leave the info->adaptive_sync > > naming as is? > > If we want to parse it uncoditionally then I guess I'd go with the > monitor_rage naming, and leave it up to the vrr code to know what to do > with it. > Yes I plan to add a function in the driver code that checks for the msa bit and this range to be greater than 10 to say that the sink is adaptive sync capable. So i will just rename this struct to monitor range then? Manasi > > > > Manasi > > > > > +} > > > + > > > /* A connector has no EDID information, so we've got no EDID to compute quirks from. Reset > > > * all of the values which would have been set from EDID > > > */ > > > @@ -4960,6 +5001,7 @@ drm_reset_display_info(struct drm_connector *connector) > > > memset(&info->hdmi, 0, sizeof(info->hdmi)); > > > > > > info->non_desktop = 0; > > > + memset(&info->adaptive_sync, 0, sizeof(info->adaptive_sync)); > > > } > > > > > > u32 drm_add_display_info(struct drm_connector *connector, const struct edid *edid) > > > @@ -4975,6 +5017,8 @@ u32 drm_add_display_info(struct drm_connector *connector, const struct edid *edi > > > > > > info->non_desktop = !!(quirks & EDID_QUIRK_NON_DESKTOP); > > > > > > + drm_get_adaptive_sync_range(connector, edid); > > > + > > > DRM_DEBUG_KMS("non_desktop set to %d\n", info->non_desktop); > > > > > > if (edid->revision < 3) > > > diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h > > > index 0df7a95ca5d9..2b22c0fa42c4 100644 > > > --- a/include/drm/drm_connector.h > > > +++ b/include/drm/drm_connector.h > > > @@ -254,6 +254,23 @@ enum drm_panel_orientation { > > > DRM_MODE_PANEL_ORIENTATION_RIGHT_UP, > > > }; > > > > > > +/** > > > + * struct drm_adaptive_sync_info - Panel's Adaptive Sync capabilities for > > > + * &drm_display_info > > > + * > > > + * This struct is used to store a Panel's Adaptive Sync capabilities > > > + * as parsed from EDID's detailed monitor range descriptor block. > > > + * > > > + * @min_vfreq: This is the min supported refresh rate in Hz from > > > + * EDID's detailed monitor range. > > > + * @max_vfreq: This is the max supported refresh rate in Hz from > > > + * EDID's detailed monitor range > > > + */ > > > +struct drm_adaptive_sync_info { > > > + u8 min_vfreq; > > > + u8 max_vfreq; > > > +}; > > > + > > > /* > > > * This is a consolidated colorimetry list supported by HDMI and > > > * DP protocol standard. The respective connectors will register > > > @@ -473,6 +490,11 @@ struct drm_display_info { > > > * @non_desktop: Non desktop display (HMD). > > > */ > > > bool non_desktop; > > > + > > > + /** > > > + * @adaptive_sync: Adaptive Sync capabilities of the DP/eDP sink > > > + */ > > > + struct drm_adaptive_sync_info adaptive_sync; > > > }; > > > > > > int drm_display_info_set_bus_formats(struct drm_display_info *info, > > > -- > > > 2.19.1 > > > > > -- > Ville Syrjälä > Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 10+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v5,1/2] drm/edid: Name the detailed monitor range flags 2020-03-09 21:39 [Intel-gfx] [PATCH v5 1/2] drm/edid: Name the detailed monitor range flags Manasi Navare 2020-03-09 21:39 ` [Intel-gfx] [PATCH v5 2/2] drm/edid: Add function to parse EDID descriptors for adaptive sync limits Manasi Navare @ 2020-03-10 16:15 ` Patchwork 2020-03-10 16:20 ` [Intel-gfx] [PATCH v5 1/2] " Ville Syrjälä 2020-03-10 20:58 ` [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v5,1/2] " Patchwork 3 siblings, 0 replies; 10+ messages in thread From: Patchwork @ 2020-03-10 16:15 UTC (permalink / raw) To: Manasi Navare; +Cc: intel-gfx == Series Details == Series: series starting with [v5,1/2] drm/edid: Name the detailed monitor range flags URL : https://patchwork.freedesktop.org/series/74471/ State : success == Summary == CI Bug Log - changes from CI_DRM_8106 -> Patchwork_16898 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/index.html Known issues ------------ Here are the changes found in Patchwork_16898 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_exec_suspend@basic-s4-devices: - fi-tgl-y: [PASS][1] -> [FAIL][2] ([CI#94]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/fi-tgl-y/igt@gem_exec_suspend@basic-s4-devices.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/fi-tgl-y/igt@gem_exec_suspend@basic-s4-devices.html * igt@i915_selftest@live@gem_contexts: - fi-cml-s: [PASS][3] -> [DMESG-FAIL][4] ([i915#877]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/fi-cml-s/igt@i915_selftest@live@gem_contexts.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/fi-cml-s/igt@i915_selftest@live@gem_contexts.html * igt@kms_chamelium@common-hpd-after-suspend: - fi-cml-u2: [PASS][5] -> [FAIL][6] ([i915#217]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/fi-cml-u2/igt@kms_chamelium@common-hpd-after-suspend.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/fi-cml-u2/igt@kms_chamelium@common-hpd-after-suspend.html * igt@prime_self_import@basic-with_two_bos: - fi-tgl-y: [PASS][7] -> [DMESG-WARN][8] ([CI#94] / [i915#402]) +1 similar issue [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/fi-tgl-y/igt@prime_self_import@basic-with_two_bos.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/fi-tgl-y/igt@prime_self_import@basic-with_two_bos.html #### Possible fixes #### * igt@gem_flink_basic@bad-open: - fi-tgl-y: [DMESG-WARN][9] ([CI#94] / [i915#402]) -> [PASS][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/fi-tgl-y/igt@gem_flink_basic@bad-open.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/fi-tgl-y/igt@gem_flink_basic@bad-open.html [CI#94]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/94 [i915#217]: https://gitlab.freedesktop.org/drm/intel/issues/217 [i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402 [i915#877]: https://gitlab.freedesktop.org/drm/intel/issues/877 Participating hosts (44 -> 39) ------------------------------ Additional (4): fi-bdw-5557u fi-cfl-8109u fi-skl-6600u fi-kbl-7500u Missing (9): fi-hsw-4200u fi-bsw-cyan fi-ctg-p8600 fi-elk-e7500 fi-bsw-kefka fi-blb-e6850 fi-byt-clapper fi-bdw-samus fi-kbl-r Build changes ------------- * CI: CI-20190529 -> None * Linux: CI_DRM_8106 -> Patchwork_16898 CI-20190529: 20190529 CI_DRM_8106: 5b0076e8066ea8218e7857ee1aa28b0670acde94 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5504: d6788bf0404f76b66170e18eb26c85004b5ccb25 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_16898: 37b27cd7ece9cd682017cebe77b194f7948b9caf @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 37b27cd7ece9 drm/edid: Add function to parse EDID descriptors for adaptive sync limits 8422a30aaa3f drm/edid: Name the detailed monitor range flags == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/index.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [Intel-gfx] [PATCH v5 1/2] drm/edid: Name the detailed monitor range flags 2020-03-09 21:39 [Intel-gfx] [PATCH v5 1/2] drm/edid: Name the detailed monitor range flags Manasi Navare 2020-03-09 21:39 ` [Intel-gfx] [PATCH v5 2/2] drm/edid: Add function to parse EDID descriptors for adaptive sync limits Manasi Navare 2020-03-10 16:15 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v5,1/2] drm/edid: Name the detailed monitor range flags Patchwork @ 2020-03-10 16:20 ` Ville Syrjälä 2020-03-10 19:11 ` Manasi Navare 2020-03-10 20:58 ` [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v5,1/2] " Patchwork 3 siblings, 1 reply; 10+ messages in thread From: Ville Syrjälä @ 2020-03-10 16:20 UTC (permalink / raw) To: Manasi Navare; +Cc: intel-gfx, dri-devel, Harry Wentland, Kazlauskas Nicholas On Mon, Mar 09, 2020 at 02:39:39PM -0700, Manasi Navare wrote: > This patch adds defines for the detailed monitor > range flags as per the EDID specification. > > v2: > * Rename the flags with DRM_EDID_ (Jani N) > > Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > Cc: Harry Wentland <harry.wentland@amd.com> > Cc: Clinton A Taylor <clinton.a.taylor@intel.com> > Cc: Kazlauskas Nicholas <Nicholas.Kazlauskas@amd.com> > Cc: Jani Nikula <jani.nikula@linux.intel.com> > Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> > Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> > --- > include/drm/drm_edid.h | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h > index f0b03d401c27..34b15e3d070c 100644 > --- a/include/drm/drm_edid.h > +++ b/include/drm/drm_edid.h > @@ -91,6 +91,11 @@ struct detailed_data_string { > u8 str[13]; > } __attribute__((packed)); > > +#define DRM_EDID_DEFAULT_GTF_SUPPORT_FLAG 0x00 > +#define DRM_EDID_RANGE_LIMITS_ONLY_FLAG 0x01 > +#define DRM_EDID_SECONDARY_GTF_SUPPORT_FLAG 0x02 > +#define DRM_EDID_CVT_SUPPORT_FLAG 0x04 No indication what flags thse are. Also missing the actual change to use them in drm_edid.c. > + > struct detailed_data_monitor_range { > u8 min_vfreq; > u8 max_vfreq; > -- > 2.19.1 -- Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [Intel-gfx] [PATCH v5 1/2] drm/edid: Name the detailed monitor range flags 2020-03-10 16:20 ` [Intel-gfx] [PATCH v5 1/2] " Ville Syrjälä @ 2020-03-10 19:11 ` Manasi Navare 0 siblings, 0 replies; 10+ messages in thread From: Manasi Navare @ 2020-03-10 19:11 UTC (permalink / raw) To: Ville Syrjälä Cc: intel-gfx, dri-devel, Harry Wentland, Kazlauskas Nicholas On Tue, Mar 10, 2020 at 06:20:27PM +0200, Ville Syrjälä wrote: > On Mon, Mar 09, 2020 at 02:39:39PM -0700, Manasi Navare wrote: > > This patch adds defines for the detailed monitor > > range flags as per the EDID specification. > > > > v2: > > * Rename the flags with DRM_EDID_ (Jani N) > > > > Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Cc: Harry Wentland <harry.wentland@amd.com> > > Cc: Clinton A Taylor <clinton.a.taylor@intel.com> > > Cc: Kazlauskas Nicholas <Nicholas.Kazlauskas@amd.com> > > Cc: Jani Nikula <jani.nikula@linux.intel.com> > > Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> > > Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> > > --- > > include/drm/drm_edid.h | 5 +++++ > > 1 file changed, 5 insertions(+) > > > > diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h > > index f0b03d401c27..34b15e3d070c 100644 > > --- a/include/drm/drm_edid.h > > +++ b/include/drm/drm_edid.h > > @@ -91,6 +91,11 @@ struct detailed_data_string { > > u8 str[13]; > > } __attribute__((packed)); > > > > +#define DRM_EDID_DEFAULT_GTF_SUPPORT_FLAG 0x00 > > +#define DRM_EDID_RANGE_LIMITS_ONLY_FLAG 0x01 > > +#define DRM_EDID_SECONDARY_GTF_SUPPORT_FLAG 0x02 > > +#define DRM_EDID_CVT_SUPPORT_FLAG 0x04 > > No indication what flags thse are. Also missing the > actual change to use them in drm_edid.c. > The name of the flag in #define indicates what flag it is, how else do you want me to add teh indication? I have done the change in my second patch to use this flag #define Use of these flags in other places in drm_edid.c will be follow up patches SOunds good? Manasi > > + > > struct detailed_data_monitor_range { > > u8 min_vfreq; > > u8 max_vfreq; > > -- > > 2.19.1 > > -- > Ville Syrjälä > Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 10+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v5,1/2] drm/edid: Name the detailed monitor range flags 2020-03-09 21:39 [Intel-gfx] [PATCH v5 1/2] drm/edid: Name the detailed monitor range flags Manasi Navare ` (2 preceding siblings ...) 2020-03-10 16:20 ` [Intel-gfx] [PATCH v5 1/2] " Ville Syrjälä @ 2020-03-10 20:58 ` Patchwork 3 siblings, 0 replies; 10+ messages in thread From: Patchwork @ 2020-03-10 20:58 UTC (permalink / raw) To: Manasi Navare; +Cc: intel-gfx == Series Details == Series: series starting with [v5,1/2] drm/edid: Name the detailed monitor range flags URL : https://patchwork.freedesktop.org/series/74471/ State : success == Summary == CI Bug Log - changes from CI_DRM_8106_full -> Patchwork_16898_full ==================================================== Summary ------- **SUCCESS** No regressions found. Known issues ------------ Here are the changes found in Patchwork_16898_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_ctx_isolation@rcs0-s3: - shard-skl: [PASS][1] -> [INCOMPLETE][2] ([i915#69]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/shard-skl1/igt@gem_ctx_isolation@rcs0-s3.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/shard-skl5/igt@gem_ctx_isolation@rcs0-s3.html * igt@gem_ctx_shared@exec-single-timeline-bsd: - shard-iclb: [PASS][3] -> [SKIP][4] ([fdo#110841]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/shard-iclb8/igt@gem_ctx_shared@exec-single-timeline-bsd.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/shard-iclb2/igt@gem_ctx_shared@exec-single-timeline-bsd.html * igt@gem_exec_async@concurrent-writes-bsd: - shard-iclb: [PASS][5] -> [SKIP][6] ([fdo#112146]) +2 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/shard-iclb8/igt@gem_exec_async@concurrent-writes-bsd.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/shard-iclb2/igt@gem_exec_async@concurrent-writes-bsd.html * igt@gem_exec_create@madvise: - shard-glk: [PASS][7] -> [DMESG-WARN][8] ([i915#118] / [i915#95]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/shard-glk6/igt@gem_exec_create@madvise.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/shard-glk2/igt@gem_exec_create@madvise.html * igt@gem_exec_schedule@pi-userfault-bsd: - shard-iclb: [PASS][9] -> [SKIP][10] ([i915#677]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/shard-iclb8/igt@gem_exec_schedule@pi-userfault-bsd.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/shard-iclb2/igt@gem_exec_schedule@pi-userfault-bsd.html * igt@gem_exec_schedule@preempt-queue-bsd1: - shard-iclb: [PASS][11] -> [SKIP][12] ([fdo#109276]) +13 similar issues [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/shard-iclb1/igt@gem_exec_schedule@preempt-queue-bsd1.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/shard-iclb8/igt@gem_exec_schedule@preempt-queue-bsd1.html * igt@gem_ppgtt@flink-and-close-vma-leak: - shard-kbl: [PASS][13] -> [FAIL][14] ([i915#644]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/shard-kbl2/igt@gem_ppgtt@flink-and-close-vma-leak.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/shard-kbl7/igt@gem_ppgtt@flink-and-close-vma-leak.html * igt@gem_workarounds@suspend-resume-context: - shard-apl: [PASS][15] -> [DMESG-WARN][16] ([i915#180]) +2 similar issues [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/shard-apl2/igt@gem_workarounds@suspend-resume-context.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/shard-apl1/igt@gem_workarounds@suspend-resume-context.html * igt@kms_flip@flip-vs-suspend: - shard-snb: [PASS][17] -> [DMESG-WARN][18] ([i915#42]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/shard-snb6/igt@kms_flip@flip-vs-suspend.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/shard-snb4/igt@kms_flip@flip-vs-suspend.html * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-pwrite: - shard-glk: [PASS][19] -> [FAIL][20] ([i915#49]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/shard-glk8/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-pwrite.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/shard-glk6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-pwrite.html * igt@kms_frontbuffer_tracking@fbc-suspend: - shard-kbl: [PASS][21] -> [DMESG-WARN][22] ([i915#180]) +8 similar issues [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-suspend.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/shard-kbl6/igt@kms_frontbuffer_tracking@fbc-suspend.html * igt@kms_plane_lowres@pipe-a-tiling-y: - shard-glk: [PASS][23] -> [FAIL][24] ([i915#899]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/shard-glk9/igt@kms_plane_lowres@pipe-a-tiling-y.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/shard-glk3/igt@kms_plane_lowres@pipe-a-tiling-y.html * igt@kms_psr2_su@frontbuffer: - shard-iclb: [PASS][25] -> [SKIP][26] ([fdo#109642] / [fdo#111068]) [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/shard-iclb2/igt@kms_psr2_su@frontbuffer.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/shard-iclb5/igt@kms_psr2_su@frontbuffer.html * igt@kms_psr@psr2_cursor_render: - shard-iclb: [PASS][27] -> [SKIP][28] ([fdo#109441]) +1 similar issue [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/shard-iclb2/igt@kms_psr@psr2_cursor_render.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/shard-iclb7/igt@kms_psr@psr2_cursor_render.html * igt@perf_pmu@busy-accuracy-98-vcs1: - shard-iclb: [PASS][29] -> [SKIP][30] ([fdo#112080]) +5 similar issues [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/shard-iclb2/igt@perf_pmu@busy-accuracy-98-vcs1.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/shard-iclb7/igt@perf_pmu@busy-accuracy-98-vcs1.html #### Possible fixes #### * igt@gem_ctx_isolation@rcs0-s3: - shard-kbl: [DMESG-WARN][31] ([i915#180]) -> [PASS][32] [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/shard-kbl1/igt@gem_ctx_isolation@rcs0-s3.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/shard-kbl1/igt@gem_ctx_isolation@rcs0-s3.html * igt@gem_ctx_persistence@close-replace-race: - shard-apl: [INCOMPLETE][33] ([fdo#103927] / [i915#1402]) -> [PASS][34] [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/shard-apl1/igt@gem_ctx_persistence@close-replace-race.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/shard-apl1/igt@gem_ctx_persistence@close-replace-race.html * igt@gem_ctx_persistence@processes: - shard-kbl: [FAIL][35] ([i915#570] / [i915#679]) -> [PASS][36] [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/shard-kbl2/igt@gem_ctx_persistence@processes.html [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/shard-kbl2/igt@gem_ctx_persistence@processes.html * igt@gem_exec_balancer@hang: - shard-tglb: [FAIL][37] ([i915#1277]) -> [PASS][38] [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/shard-tglb1/igt@gem_exec_balancer@hang.html [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/shard-tglb5/igt@gem_exec_balancer@hang.html * igt@gem_exec_schedule@implicit-both-bsd1: - shard-iclb: [SKIP][39] ([fdo#109276] / [i915#677]) -> [PASS][40] +1 similar issue [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/shard-iclb8/igt@gem_exec_schedule@implicit-both-bsd1.html [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/shard-iclb1/igt@gem_exec_schedule@implicit-both-bsd1.html * igt@gem_exec_schedule@pi-distinct-iova-bsd: - shard-iclb: [SKIP][41] ([i915#677]) -> [PASS][42] +1 similar issue [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/shard-iclb2/igt@gem_exec_schedule@pi-distinct-iova-bsd.html [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/shard-iclb7/igt@gem_exec_schedule@pi-distinct-iova-bsd.html * igt@gem_exec_schedule@preemptive-hang-bsd: - shard-iclb: [SKIP][43] ([fdo#112146]) -> [PASS][44] +5 similar issues [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/shard-iclb2/igt@gem_exec_schedule@preemptive-hang-bsd.html [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/shard-iclb7/igt@gem_exec_schedule@preemptive-hang-bsd.html * igt@gem_exec_whisper@basic-queues-forked: - shard-glk: [DMESG-WARN][45] ([i915#118] / [i915#95]) -> [PASS][46] [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/shard-glk2/igt@gem_exec_whisper@basic-queues-forked.html [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/shard-glk1/igt@gem_exec_whisper@basic-queues-forked.html * igt@i915_suspend@sysfs-reader: - shard-snb: [DMESG-WARN][47] ([i915#42]) -> [PASS][48] [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/shard-snb4/igt@i915_suspend@sysfs-reader.html [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/shard-snb2/igt@i915_suspend@sysfs-reader.html * igt@kms_cursor_crc@pipe-a-cursor-dpms: - shard-skl: [FAIL][49] ([i915#54]) -> [PASS][50] [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/shard-skl4/igt@kms_cursor_crc@pipe-a-cursor-dpms.html [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/shard-skl4/igt@kms_cursor_crc@pipe-a-cursor-dpms.html * igt@kms_cursor_crc@pipe-b-cursor-64x64-offscreen: - shard-apl: [FAIL][51] ([i915#54]) -> [PASS][52] [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/shard-apl6/igt@kms_cursor_crc@pipe-b-cursor-64x64-offscreen.html [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/shard-apl2/igt@kms_cursor_crc@pipe-b-cursor-64x64-offscreen.html * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible: - shard-glk: [FAIL][53] ([i915#79]) -> [PASS][54] [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/shard-glk9/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/shard-glk7/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html * igt@kms_hdr@bpc-switch-suspend: - shard-skl: [FAIL][55] ([i915#1188]) -> [PASS][56] [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/shard-skl8/igt@kms_hdr@bpc-switch-suspend.html [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/shard-skl5/igt@kms_hdr@bpc-switch-suspend.html * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: - shard-kbl: [INCOMPLETE][57] -> [PASS][58] [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/shard-kbl2/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/shard-kbl7/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: - shard-skl: [INCOMPLETE][59] ([i915#69]) -> [PASS][60] [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/shard-skl8/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b.html [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/shard-skl1/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b.html * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc: - shard-skl: [FAIL][61] ([fdo#108145]) -> [PASS][62] +1 similar issue [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/shard-skl4/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/shard-skl4/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc: - shard-skl: [FAIL][63] ([fdo#108145] / [i915#265]) -> [PASS][64] +1 similar issue [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/shard-skl5/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/shard-skl10/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html * igt@kms_psr@psr2_cursor_plane_move: - shard-iclb: [SKIP][65] ([fdo#109441]) -> [PASS][66] +1 similar issue [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/shard-iclb7/igt@kms_psr@psr2_cursor_plane_move.html [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/shard-iclb2/igt@kms_psr@psr2_cursor_plane_move.html * igt@kms_setmode@basic: - shard-kbl: [FAIL][67] ([i915#31]) -> [PASS][68] [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/shard-kbl7/igt@kms_setmode@basic.html [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/shard-kbl2/igt@kms_setmode@basic.html * igt@kms_vblank@pipe-a-ts-continuation-suspend: - shard-apl: [DMESG-WARN][69] ([i915#180]) -> [PASS][70] +1 similar issue [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/shard-apl1/igt@kms_vblank@pipe-a-ts-continuation-suspend.html [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/shard-apl7/igt@kms_vblank@pipe-a-ts-continuation-suspend.html * igt@perf_pmu@busy-no-semaphores-vcs1: - shard-iclb: [SKIP][71] ([fdo#112080]) -> [PASS][72] +10 similar issues [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/shard-iclb5/igt@perf_pmu@busy-no-semaphores-vcs1.html [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/shard-iclb4/igt@perf_pmu@busy-no-semaphores-vcs1.html * igt@prime_busy@hang-bsd2: - shard-iclb: [SKIP][73] ([fdo#109276]) -> [PASS][74] +11 similar issues [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/shard-iclb5/igt@prime_busy@hang-bsd2.html [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/shard-iclb4/igt@prime_busy@hang-bsd2.html #### Warnings #### * igt@gem_linear_blits@normal: - shard-apl: [TIMEOUT][75] ([i915#1322]) -> [TIMEOUT][76] ([fdo#111732] / [i915#1322]) [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/shard-apl4/igt@gem_linear_blits@normal.html [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/shard-apl3/igt@gem_linear_blits@normal.html * igt@i915_pm_rpm@fences: - shard-snb: [INCOMPLETE][77] ([i915#82]) -> [SKIP][78] ([fdo#109271]) [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/shard-snb4/igt@i915_pm_rpm@fences.html [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/shard-snb4/igt@i915_pm_rpm@fences.html * igt@kms_flip@flip-vs-suspend-interruptible: - shard-kbl: [DMESG-WARN][79] ([i915#180] / [i915#56]) -> [DMESG-WARN][80] ([i915#180]) [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/shard-kbl1/igt@kms_flip@flip-vs-suspend-interruptible.html [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/shard-kbl6/igt@kms_flip@flip-vs-suspend-interruptible.html * igt@runner@aborted: - shard-apl: ([FAIL][81], [FAIL][82]) ([fdo#103927] / [i915#1402]) -> [FAIL][83] ([fdo#103927]) [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/shard-apl1/igt@runner@aborted.html [82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8106/shard-apl2/igt@runner@aborted.html [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/shard-apl1/igt@runner@aborted.html [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927 [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276 [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642 [fdo#110841]: https://bugs.freedesktop.org/show_bug.cgi?id=110841 [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068 [fdo#111732]: https://bugs.freedesktop.org/show_bug.cgi?id=111732 [fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080 [fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146 [i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118 [i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188 [i915#1277]: https://gitlab.freedesktop.org/drm/intel/issues/1277 [i915#1322]: https://gitlab.freedesktop.org/drm/intel/issues/1322 [i915#1402]: https://gitlab.freedesktop.org/drm/intel/issues/1402 [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180 [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265 [i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31 [i915#42]: https://gitlab.freedesktop.org/drm/intel/issues/42 [i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49 [i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54 [i915#56]: https://gitlab.freedesktop.org/drm/intel/issues/56 [i915#570]: https://gitlab.freedesktop.org/drm/intel/issues/570 [i915#644]: https://gitlab.freedesktop.org/drm/intel/issues/644 [i915#677]: https://gitlab.freedesktop.org/drm/intel/issues/677 [i915#679]: https://gitlab.freedesktop.org/drm/intel/issues/679 [i915#69]: https://gitlab.freedesktop.org/drm/intel/issues/69 [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79 [i915#82]: https://gitlab.freedesktop.org/drm/intel/issues/82 [i915#899]: https://gitlab.freedesktop.org/drm/intel/issues/899 [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95 Participating hosts (10 -> 10) ------------------------------ No changes in participating hosts Build changes ------------- * CI: CI-20190529 -> None * Linux: CI_DRM_8106 -> Patchwork_16898 CI-20190529: 20190529 CI_DRM_8106: 5b0076e8066ea8218e7857ee1aa28b0670acde94 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5504: d6788bf0404f76b66170e18eb26c85004b5ccb25 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_16898: 37b27cd7ece9cd682017cebe77b194f7948b9caf @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16898/index.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2020-03-10 20:58 UTC | newest] Thread overview: 10+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2020-03-09 21:39 [Intel-gfx] [PATCH v5 1/2] drm/edid: Name the detailed monitor range flags Manasi Navare 2020-03-09 21:39 ` [Intel-gfx] [PATCH v5 2/2] drm/edid: Add function to parse EDID descriptors for adaptive sync limits Manasi Navare 2020-03-10 16:23 ` Ville Syrjälä 2020-03-10 19:08 ` Manasi Navare 2020-03-10 19:13 ` Ville Syrjälä 2020-03-10 19:21 ` Manasi Navare 2020-03-10 16:15 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v5,1/2] drm/edid: Name the detailed monitor range flags Patchwork 2020-03-10 16:20 ` [Intel-gfx] [PATCH v5 1/2] " Ville Syrjälä 2020-03-10 19:11 ` Manasi Navare 2020-03-10 20:58 ` [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v5,1/2] " Patchwork
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox