From: Imre Deak <imre.deak@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 4/6] drm/i915/dp_mst: Clear only the ACT sent flag from DP_TP_STATUS
Date: Tue, 16 Jun 2020 17:18:53 +0300 [thread overview]
Message-ID: <20200616141855.746-4-imre.deak@intel.com> (raw)
In-Reply-To: <20200616141855.746-1-imre.deak@intel.com>
It's not clear if the DP_TP_STATUS flags other than the ACT sent flag
have some side-effect, so don't clear those; we don't depend on the
state of these flags anyway.
Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 3977ee4f7176..b66b56a070e5 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -322,7 +322,7 @@ static void clear_act_sent(struct intel_dp *intel_dp)
struct drm_i915_private *i915 = dp_to_i915(intel_dp);
intel_de_write(i915, intel_dp->regs.dp_tp_status,
- intel_de_read(i915, intel_dp->regs.dp_tp_status));
+ DP_TP_STATUS_ACT_SENT);
}
static void wait_for_act_sent(struct intel_dp *intel_dp)
--
2.23.1
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next prev parent reply other threads:[~2020-06-16 14:19 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-16 14:18 [Intel-gfx] [PATCH 1/6] drm/i915/tgl+: Use the correct DP_TP_* register instances in MST encoders Imre Deak
2020-06-16 14:18 ` [Intel-gfx] [PATCH 2/6] drm/i915/dp_mst: Disable link training fallback on MST links Imre Deak
2020-06-16 15:22 ` Ville Syrjälä
2020-06-16 15:30 ` Imre Deak
2020-06-16 15:39 ` Ville Syrjälä
2020-06-16 15:49 ` Imre Deak
2020-06-16 16:20 ` Ville Syrjälä
2020-06-16 21:11 ` [Intel-gfx] [PATCH v2 " Imre Deak
2020-06-16 14:18 ` [Intel-gfx] [PATCH 3/6] drm/i915/dp_mst: Move clearing the ACT sent flag closer to its polling Imre Deak
2020-06-16 15:47 ` Ville Syrjälä
2020-06-16 14:18 ` Imre Deak [this message]
2020-06-16 15:47 ` [Intel-gfx] [PATCH 4/6] drm/i915/dp_mst: Clear only the ACT sent flag from DP_TP_STATUS Ville Syrjälä
2020-06-16 14:18 ` [Intel-gfx] [PATCH 5/6] drm/i915/dp_mst: Clear the ACT sent flag during encoder disabling too Imre Deak
2020-06-16 15:47 ` Ville Syrjälä
2020-06-16 14:18 ` [Intel-gfx] [PATCH 6/6] drm/i915/dp_mst: Ensure the DPCD ACT sent flag is cleared before waiting for it Imre Deak
2020-06-16 15:45 ` Ville Syrjälä
2020-06-16 15:54 ` Imre Deak
2020-06-16 16:23 ` Ville Syrjälä
2020-06-16 16:40 ` Ville Syrjälä
2020-06-16 16:47 ` Imre Deak
2020-06-16 21:11 ` [Intel-gfx] [PATCH v2 " Imre Deak
2020-06-17 15:27 ` Lyude Paul
2020-06-23 7:30 ` Imre Deak
2020-06-16 15:46 ` [Intel-gfx] [PATCH 1/6] drm/i915/tgl+: Use the correct DP_TP_* register instances in MST encoders Ville Syrjälä
2020-06-16 16:32 ` Souza, Jose
2020-06-16 16:42 ` Imre Deak
2020-06-16 17:02 ` Souza, Jose
2020-06-16 17:32 ` Imre Deak
2020-06-16 19:50 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/6] " Patchwork
2020-06-16 21:11 ` [Intel-gfx] [PATCH v2 1/6] " Imre Deak
2020-06-16 22:38 ` Souza, Jose
2020-06-16 22:16 ` [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/6] " Patchwork
2020-06-23 7:21 ` Imre Deak
2020-06-16 23:36 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/6] drm/i915/tgl+: Use the correct DP_TP_* register instances in MST encoders (rev4) Patchwork
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