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From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v2 16/61] drm/i915: Pin timeline map after first timeline pin, v2.
Date: Mon, 12 Oct 2020 16:46:21 +0200	[thread overview]
Message-ID: <20201012144706.555345-17-maarten.lankhorst@linux.intel.com> (raw)
In-Reply-To: <20201012144706.555345-1-maarten.lankhorst@linux.intel.com>

We're starting to require the reservation lock for pinning,
so wait until we have that.

Update the selftests to handle this correctly, and ensure pin is
called in live_hwsp_rollover_user() and mock_hwsp_freelist().

Changes since v1:
- Fix NULL + XX arithmatic, use casts. (kbuild)

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reported-by: kernel test robot <lkp@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_timeline.c    | 37 ++++++++----
 drivers/gpu/drm/i915/gt/intel_timeline.h    |  2 +
 drivers/gpu/drm/i915/gt/mock_engine.c       | 22 ++++++-
 drivers/gpu/drm/i915/gt/selftest_timeline.c | 63 +++++++++++----------
 drivers/gpu/drm/i915/i915_selftest.h        |  2 +
 5 files changed, 82 insertions(+), 44 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_timeline.c b/drivers/gpu/drm/i915/gt/intel_timeline.c
index 13f3f26fc504..71e695ebc175 100644
--- a/drivers/gpu/drm/i915/gt/intel_timeline.c
+++ b/drivers/gpu/drm/i915/gt/intel_timeline.c
@@ -51,13 +51,27 @@ static int __timeline_active(struct i915_active *active)
 	return 0;
 }
 
+I915_SELFTEST_EXPORT int
+intel_timeline_pin_map(struct intel_timeline *timeline)
+{
+	struct drm_i915_gem_object *obj = timeline->hwsp_ggtt->obj;
+	void *vaddr;
+
+	vaddr = i915_gem_object_pin_map(obj, I915_MAP_WB);
+	if (IS_ERR(vaddr))
+		return PTR_ERR(vaddr);
+
+	timeline->hwsp_map = vaddr;
+	timeline->hwsp_seqno = vaddr + offset_in_page(timeline->hwsp_seqno);
+	WRITE_ONCE(*(u32 *)timeline->hwsp_seqno, 0);
+	return 0;
+}
+
 static int intel_timeline_init(struct intel_timeline *timeline,
 			       struct intel_gt *gt,
 			       struct i915_vma *hwsp,
 			       unsigned int offset)
 {
-	void *vaddr;
-
 	kref_init(&timeline->kref);
 	atomic_set(&timeline->pin_count, 0);
 
@@ -73,14 +87,8 @@ static int intel_timeline_init(struct intel_timeline *timeline,
 			return PTR_ERR(hwsp);
 		timeline->hwsp_ggtt = hwsp;
 	}
-
-	vaddr = i915_gem_object_pin_map(hwsp->obj, I915_MAP_WB);
-	if (IS_ERR(vaddr))
-		return PTR_ERR(vaddr);
-
-	timeline->hwsp_map = vaddr;
-	timeline->hwsp_seqno = vaddr + timeline->hwsp_offset;
-	WRITE_ONCE(*(u32 *)timeline->hwsp_seqno, 0);
+	timeline->hwsp_map = NULL;
+	timeline->hwsp_seqno = (void *)(long)timeline->hwsp_offset;
 
 	GEM_BUG_ON(timeline->hwsp_offset >= hwsp->size);
 
@@ -111,7 +119,8 @@ static void intel_timeline_fini(struct intel_timeline *timeline)
 	GEM_BUG_ON(!list_empty(&timeline->requests));
 	GEM_BUG_ON(timeline->retire);
 
-	i915_gem_object_unpin_map(timeline->hwsp_ggtt->obj);
+	if (timeline->hwsp_map)
+		i915_gem_object_unpin_map(timeline->hwsp_ggtt->obj);
 
 	i915_vma_put(timeline->hwsp_ggtt);
 	i915_active_fini(&timeline->active);
@@ -151,6 +160,12 @@ int intel_timeline_pin(struct intel_timeline *tl, struct i915_gem_ww_ctx *ww)
 	if (atomic_add_unless(&tl->pin_count, 1, 0))
 		return 0;
 
+	if (!tl->hwsp_map) {
+		err = intel_timeline_pin_map(tl);
+		if (err)
+			return err;
+	}
+
 	err = i915_ggtt_pin(tl->hwsp_ggtt, ww, 0, PIN_HIGH);
 	if (err)
 		return err;
diff --git a/drivers/gpu/drm/i915/gt/intel_timeline.h b/drivers/gpu/drm/i915/gt/intel_timeline.h
index 9882cd911d8e..1cfdc4679b62 100644
--- a/drivers/gpu/drm/i915/gt/intel_timeline.h
+++ b/drivers/gpu/drm/i915/gt/intel_timeline.h
@@ -106,4 +106,6 @@ int intel_timeline_read_hwsp(struct i915_request *from,
 void intel_gt_init_timelines(struct intel_gt *gt);
 void intel_gt_fini_timelines(struct intel_gt *gt);
 
+I915_SELFTEST_DECLARE(int intel_timeline_pin_map(struct intel_timeline *tl));
+
 #endif
diff --git a/drivers/gpu/drm/i915/gt/mock_engine.c b/drivers/gpu/drm/i915/gt/mock_engine.c
index 2f830017c51d..effbac877eec 100644
--- a/drivers/gpu/drm/i915/gt/mock_engine.c
+++ b/drivers/gpu/drm/i915/gt/mock_engine.c
@@ -32,9 +32,20 @@
 #include "mock_engine.h"
 #include "selftests/mock_request.h"
 
-static void mock_timeline_pin(struct intel_timeline *tl)
+static int mock_timeline_pin(struct intel_timeline *tl)
 {
+	int err;
+
+	if (WARN_ON(!i915_gem_object_trylock(tl->hwsp_ggtt->obj)))
+		return -EBUSY;
+
+	err = intel_timeline_pin_map(tl);
+	i915_gem_object_unlock(tl->hwsp_ggtt->obj);
+	if (err)
+		return err;
+
 	atomic_inc(&tl->pin_count);
+	return 0;
 }
 
 static void mock_timeline_unpin(struct intel_timeline *tl)
@@ -152,6 +163,8 @@ static void mock_context_destroy(struct kref *ref)
 
 static int mock_context_alloc(struct intel_context *ce)
 {
+	int err;
+
 	ce->ring = mock_ring(ce->engine);
 	if (!ce->ring)
 		return -ENOMEM;
@@ -162,7 +175,12 @@ static int mock_context_alloc(struct intel_context *ce)
 		return PTR_ERR(ce->timeline);
 	}
 
-	mock_timeline_pin(ce->timeline);
+	err = mock_timeline_pin(ce->timeline);
+	if (err) {
+		intel_timeline_put(ce->timeline);
+		ce->timeline = NULL;
+		return err;
+	}
 
 	return 0;
 }
diff --git a/drivers/gpu/drm/i915/gt/selftest_timeline.c b/drivers/gpu/drm/i915/gt/selftest_timeline.c
index 98cd161b3925..6d6092a28e6b 100644
--- a/drivers/gpu/drm/i915/gt/selftest_timeline.c
+++ b/drivers/gpu/drm/i915/gt/selftest_timeline.c
@@ -33,7 +33,7 @@ static unsigned long hwsp_cacheline(struct intel_timeline *tl)
 {
 	unsigned long address = (unsigned long)page_address(hwsp_page(tl));
 
-	return (address + tl->hwsp_offset) / CACHELINE_BYTES;
+	return (address + offset_in_page(tl->hwsp_offset)) / CACHELINE_BYTES;
 }
 
 #define CACHELINES_PER_PAGE (PAGE_SIZE / CACHELINE_BYTES)
@@ -57,6 +57,7 @@ static void __mock_hwsp_record(struct mock_hwsp_freelist *state,
 	tl = xchg(&state->history[idx], tl);
 	if (tl) {
 		radix_tree_delete(&state->cachelines, hwsp_cacheline(tl));
+		intel_timeline_unpin(tl);
 		intel_timeline_put(tl);
 	}
 }
@@ -76,6 +77,12 @@ static int __mock_hwsp_timeline(struct mock_hwsp_freelist *state,
 		if (IS_ERR(tl))
 			return PTR_ERR(tl);
 
+		err = intel_timeline_pin(tl, NULL);
+		if (err) {
+			intel_timeline_put(tl);
+			return err;
+		}
+
 		cacheline = hwsp_cacheline(tl);
 		err = radix_tree_insert(&state->cachelines, cacheline, tl);
 		if (err) {
@@ -83,6 +90,7 @@ static int __mock_hwsp_timeline(struct mock_hwsp_freelist *state,
 				pr_err("HWSP cacheline %lu already used; duplicate allocation!\n",
 				       cacheline);
 			}
+			intel_timeline_unpin(tl);
 			intel_timeline_put(tl);
 			return err;
 		}
@@ -450,7 +458,7 @@ static int emit_ggtt_store_dw(struct i915_request *rq, u32 addr, u32 value)
 }
 
 static struct i915_request *
-tl_write(struct intel_timeline *tl, struct intel_engine_cs *engine, u32 value)
+checked_tl_write(struct intel_timeline *tl, struct intel_engine_cs *engine, u32 value)
 {
 	struct i915_request *rq;
 	int err;
@@ -461,6 +469,13 @@ tl_write(struct intel_timeline *tl, struct intel_engine_cs *engine, u32 value)
 		goto out;
 	}
 
+	if (READ_ONCE(*tl->hwsp_seqno) != tl->seqno) {
+		pr_err("Timeline created with incorrect breadcrumb, found %x, expected %x\n",
+		       *tl->hwsp_seqno, tl->seqno);
+		intel_timeline_unpin(tl);
+		return ERR_PTR(-EINVAL);
+	}
+
 	rq = intel_engine_create_kernel_request(engine);
 	if (IS_ERR(rq))
 		goto out_unpin;
@@ -482,25 +497,6 @@ tl_write(struct intel_timeline *tl, struct intel_engine_cs *engine, u32 value)
 	return rq;
 }
 
-static struct intel_timeline *
-checked_intel_timeline_create(struct intel_gt *gt)
-{
-	struct intel_timeline *tl;
-
-	tl = intel_timeline_create(gt);
-	if (IS_ERR(tl))
-		return tl;
-
-	if (READ_ONCE(*tl->hwsp_seqno) != tl->seqno) {
-		pr_err("Timeline created with incorrect breadcrumb, found %x, expected %x\n",
-		       *tl->hwsp_seqno, tl->seqno);
-		intel_timeline_put(tl);
-		return ERR_PTR(-EINVAL);
-	}
-
-	return tl;
-}
-
 static int live_hwsp_engine(void *arg)
 {
 #define NUM_TIMELINES 4096
@@ -533,13 +529,13 @@ static int live_hwsp_engine(void *arg)
 			struct intel_timeline *tl;
 			struct i915_request *rq;
 
-			tl = checked_intel_timeline_create(gt);
+			tl = intel_timeline_create(gt);
 			if (IS_ERR(tl)) {
 				err = PTR_ERR(tl);
 				break;
 			}
 
-			rq = tl_write(tl, engine, count);
+			rq = checked_tl_write(tl, engine, count);
 			if (IS_ERR(rq)) {
 				intel_timeline_put(tl);
 				err = PTR_ERR(rq);
@@ -606,14 +602,14 @@ static int live_hwsp_alternate(void *arg)
 			if (!intel_engine_can_store_dword(engine))
 				continue;
 
-			tl = checked_intel_timeline_create(gt);
+			tl = intel_timeline_create(gt);
 			if (IS_ERR(tl)) {
 				err = PTR_ERR(tl);
 				goto out;
 			}
 
 			intel_engine_pm_get(engine);
-			rq = tl_write(tl, engine, count);
+			rq = checked_tl_write(tl, engine, count);
 			intel_engine_pm_put(engine);
 			if (IS_ERR(rq)) {
 				intel_timeline_put(tl);
@@ -863,6 +859,10 @@ static int live_hwsp_rollover_user(void *arg)
 		if (!tl->has_initial_breadcrumb)
 			goto out;
 
+		err = intel_context_pin(ce);
+		if (err)
+			goto out;
+
 		tl->seqno = -4u;
 		WRITE_ONCE(*(u32 *)tl->hwsp_seqno, tl->seqno);
 
@@ -872,7 +872,7 @@ static int live_hwsp_rollover_user(void *arg)
 			this = intel_context_create_request(ce);
 			if (IS_ERR(this)) {
 				err = PTR_ERR(this);
-				goto out;
+				goto out_unpin;
 			}
 
 			pr_debug("%s: create fence.seqnp:%d\n",
@@ -891,17 +891,18 @@ static int live_hwsp_rollover_user(void *arg)
 		if (i915_request_wait(rq[2], 0, HZ / 5) < 0) {
 			pr_err("Wait for timeline wrap timed out!\n");
 			err = -EIO;
-			goto out;
+			goto out_unpin;
 		}
 
 		for (i = 0; i < ARRAY_SIZE(rq); i++) {
 			if (!i915_request_completed(rq[i])) {
 				pr_err("Pre-wrap request not completed!\n");
 				err = -EINVAL;
-				goto out;
+				goto out_unpin;
 			}
 		}
-
+out_unpin:
+		intel_context_unpin(ce);
 out:
 		for (i = 0; i < ARRAY_SIZE(rq); i++)
 			i915_request_put(rq[i]);
@@ -943,13 +944,13 @@ static int live_hwsp_recycle(void *arg)
 			struct intel_timeline *tl;
 			struct i915_request *rq;
 
-			tl = checked_intel_timeline_create(gt);
+			tl = intel_timeline_create(gt);
 			if (IS_ERR(tl)) {
 				err = PTR_ERR(tl);
 				break;
 			}
 
-			rq = tl_write(tl, engine, count);
+			rq = checked_tl_write(tl, engine, count);
 			if (IS_ERR(rq)) {
 				intel_timeline_put(tl);
 				err = PTR_ERR(rq);
diff --git a/drivers/gpu/drm/i915/i915_selftest.h b/drivers/gpu/drm/i915/i915_selftest.h
index d53d207ab6eb..f54de0499be7 100644
--- a/drivers/gpu/drm/i915/i915_selftest.h
+++ b/drivers/gpu/drm/i915/i915_selftest.h
@@ -107,6 +107,7 @@ int __i915_subtests(const char *caller,
 
 #define I915_SELFTEST_DECLARE(x) x
 #define I915_SELFTEST_ONLY(x) unlikely(x)
+#define I915_SELFTEST_EXPORT
 
 #else /* !IS_ENABLED(CONFIG_DRM_I915_SELFTEST) */
 
@@ -116,6 +117,7 @@ static inline int i915_perf_selftests(struct pci_dev *pdev) { return 0; }
 
 #define I915_SELFTEST_DECLARE(x)
 #define I915_SELFTEST_ONLY(x) 0
+#define I915_SELFTEST_EXPORT static
 
 #endif
 
-- 
2.28.0

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  parent reply	other threads:[~2020-10-12 14:47 UTC|newest]

Thread overview: 68+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-12 14:46 [Intel-gfx] [PATCH v2 00/61] drm/i915: Remove obj->mm.lock! Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 01/61] drm/i915: Move cmd parser pinning to execbuffer Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 02/61] drm/i915: Add missing -EDEADLK handling to execbuf pinning Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 03/61] drm/i915: Do not share hwsp across contexts any more, v3 Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 04/61] drm/i915: Ensure we hold the object mutex in pin correctly Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 05/61] drm/i915: Add gem object locking to madvise Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 06/61] drm/i915: Move HAS_STRUCT_PAGE to obj->flags Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 07/61] drm/i915: Rework struct phys attachment handling Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 08/61] drm/i915: Convert i915_gem_object_attach_phys() to ww locking Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 09/61] drm/i915: make lockdep slightly happier about execbuf Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 10/61] drm/i915: Disable userptr pread/pwrite support Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 11/61] drm/i915: No longer allow exporting userptr through dma-buf Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 12/61] drm/i915: Reject more ioctls for userptr Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 13/61] drm/i915: Reject UNSYNCHRONIZED " Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 14/61] drm/i915: Fix userptr so we do not have to worry about obj->mm.lock, v2 Maarten Lankhorst
2020-10-12 17:05   ` Thomas Hellström (Intel)
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 15/61] drm/i915: Flatten obj->mm.lock Maarten Lankhorst
2020-10-12 14:46 ` Maarten Lankhorst [this message]
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 17/61] drm/i915: Populate logical context during first pin Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 18/61] drm/i915: Make ring submission compatible with obj->mm.lock removal, v2 Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 19/61] drm/i915: Handle ww locking in init_status_page Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 20/61] drm/i915: Rework clflush to work correctly without obj->mm.lock Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 21/61] drm/i915: Pass ww ctx to intel_pin_to_display_plane Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 22/61] drm/i915: Add object locking to vm_fault_cpu Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 23/61] drm/i915: Move pinning to inside engine_wa_list_verify() Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 24/61] drm/i915: Take reservation lock around i915_vma_pin Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 25/61] drm/i915: Make intel_init_workaround_bb more compatible with ww locking Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 26/61] drm/i915: Make __engine_unpark() " Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 27/61] drm/i915: Take obj lock around set_domain ioctl Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 28/61] drm/i915: Defer pin calls in buffer pool until first use by caller Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 29/61] drm/i915: Fix pread/pwrite to work with new locking rules Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 30/61] drm/i915: Fix workarounds selftest, part 1 Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 31/61] drm/i915: Prepare for obj->mm.lock removal Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 32/61] drm/i915: Add igt_spinner_pin() to allow for ww locking around spinner Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 33/61] drm/i915: Add ww locking around vm_access() Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 34/61] drm/i915: Increase ww locking for perf Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 35/61] drm/i915: Lock ww in ucode objects correctly Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 36/61] drm/i915: Add ww locking to dma-buf ops Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 37/61] drm/i915: Add missing ww lock in intel_dsb_prepare Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 38/61] drm/i915: Fix ww locking in shmem_create_from_object Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 39/61] drm/i915: Use a single page table lock for each gtt Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 40/61] drm/i915/selftests: Prepare huge_pages testcases for obj->mm.lock removal Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 41/61] drm/i915/selftests: Prepare client blit " Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 42/61] drm/i915/selftests: Prepare coherency tests " Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 43/61] drm/i915/selftests: Prepare context " Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 44/61] drm/i915/selftests: Prepare dma-buf " Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 45/61] drm/i915/selftests: Prepare execbuf " Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 46/61] drm/i915/selftests: Prepare mman testcases " Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 47/61] drm/i915/selftests: Prepare object tests " Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 48/61] drm/i915/selftests: Prepare object blit " Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 49/61] drm/i915/selftests: Prepare igt_gem_utils " Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 50/61] drm/i915/selftests: Prepare context selftest " Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 51/61] drm/i915/selftests: Prepare hangcheck " Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 52/61] drm/i915/selftests: Prepare execlists " Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 53/61] drm/i915/selftests: Prepare mocs tests " Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 54/61] drm/i915/selftests: Prepare ring submission " Maarten Lankhorst
2020-10-12 14:47 ` [Intel-gfx] [PATCH v2 55/61] drm/i915/selftests: Prepare timeline tests " Maarten Lankhorst
2020-10-12 14:47 ` [Intel-gfx] [PATCH v2 56/61] drm/i915/selftests: Prepare i915_request " Maarten Lankhorst
2020-10-12 14:47 ` [Intel-gfx] [PATCH v2 57/61] drm/i915/selftests: Prepare memory region " Maarten Lankhorst
2020-10-12 14:47 ` [Intel-gfx] [PATCH v2 58/61] drm/i915/selftests: Prepare cs engine " Maarten Lankhorst
2020-10-12 14:47 ` [Intel-gfx] [PATCH v2 59/61] drm/i915/selftests: Prepare gtt " Maarten Lankhorst
2020-10-12 14:47 ` [Intel-gfx] [PATCH v2 60/61] drm/i915: Finally remove obj->mm.lock Maarten Lankhorst
2020-10-12 14:47 ` [Intel-gfx] [PATCH v2 61/61] drm/i915: Keep userpointer bindings if seqcount is unchanged Maarten Lankhorst
2020-10-12 16:45 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Remove obj->mm.lock! (rev2) Patchwork
2020-10-12 16:47 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-10-12 16:49 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2020-10-12 17:13 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-10-12 19:57 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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