From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Dan Carpenter <dan.carpenter@oracle.com>
Subject: [Intel-gfx] [PATCH v2 18/61] drm/i915: Make ring submission compatible with obj->mm.lock removal, v2.
Date: Mon, 12 Oct 2020 16:46:23 +0200 [thread overview]
Message-ID: <20201012144706.555345-19-maarten.lankhorst@linux.intel.com> (raw)
In-Reply-To: <20201012144706.555345-1-maarten.lankhorst@linux.intel.com>
We map the initial context during first pin.
This allows us to remove pin_map from state allocation, which saves
us a few retry loops. We won't need this until first pin anyway.
intel_ring_submission_setup() is also reworked slightly to do all
pinning in a single ww loop.
Changes since v1:
- Handle -EDEADLK backoff in intel_ring_submission_setup() better.
- Handle smatch errors reported by Dan and testbot.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
---
.../gpu/drm/i915/gt/intel_ring_submission.c | 184 +++++++++++-------
1 file changed, 118 insertions(+), 66 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_ring_submission.c b/drivers/gpu/drm/i915/gt/intel_ring_submission.c
index a41b43f445b8..6b280904db43 100644
--- a/drivers/gpu/drm/i915/gt/intel_ring_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_ring_submission.c
@@ -478,6 +478,26 @@ static void ring_context_destroy(struct kref *ref)
intel_context_free(ce);
}
+static int ring_context_init_default_state(struct intel_context *ce,
+ struct i915_gem_ww_ctx *ww)
+{
+ struct drm_i915_gem_object *obj = ce->state->obj;
+ void *vaddr;
+
+ vaddr = i915_gem_object_pin_map(obj, I915_MAP_WB);
+ if (IS_ERR(vaddr))
+ return PTR_ERR(vaddr);
+
+ shmem_read(ce->engine->default_state, 0,
+ vaddr, ce->engine->context_size);
+
+ i915_gem_object_flush_map(obj);
+ __i915_gem_object_release_map(obj);
+
+ __set_bit(CONTEXT_VALID_BIT, &ce->flags);
+ return 0;
+}
+
static int ring_context_pre_pin(struct intel_context *ce,
struct i915_gem_ww_ctx *ww,
void **unused)
@@ -485,6 +505,13 @@ static int ring_context_pre_pin(struct intel_context *ce,
struct i915_address_space *vm;
int err = 0;
+ if (ce->engine->default_state &&
+ !test_bit(CONTEXT_VALID_BIT, &ce->flags)) {
+ err = ring_context_init_default_state(ce, ww);
+ if (err)
+ return err;
+ }
+
vm = vm_alias(ce->vm);
if (vm)
err = gen6_ppgtt_pin(i915_vm_to_ppgtt((vm)), ww);
@@ -540,22 +567,6 @@ alloc_context_vma(struct intel_engine_cs *engine)
if (IS_IVYBRIDGE(i915))
i915_gem_object_set_cache_coherency(obj, I915_CACHE_L3_LLC);
- if (engine->default_state) {
- void *vaddr;
-
- vaddr = i915_gem_object_pin_map(obj, I915_MAP_WB);
- if (IS_ERR(vaddr)) {
- err = PTR_ERR(vaddr);
- goto err_obj;
- }
-
- shmem_read(engine->default_state, 0,
- vaddr, engine->context_size);
-
- i915_gem_object_flush_map(obj);
- __i915_gem_object_release_map(obj);
- }
-
vma = i915_vma_instance(obj, &engine->gt->ggtt->vm, NULL);
if (IS_ERR(vma)) {
err = PTR_ERR(vma);
@@ -587,8 +598,6 @@ static int ring_context_alloc(struct intel_context *ce)
return PTR_ERR(vma);
ce->state = vma;
- if (engine->default_state)
- __set_bit(CONTEXT_VALID_BIT, &ce->flags);
}
return 0;
@@ -1184,37 +1193,15 @@ static int gen7_ctx_switch_bb_setup(struct intel_engine_cs * const engine,
return gen7_setup_clear_gpr_bb(engine, vma);
}
-static int gen7_ctx_switch_bb_init(struct intel_engine_cs *engine)
+static int gen7_ctx_switch_bb_init(struct intel_engine_cs *engine,
+ struct i915_gem_ww_ctx *ww,
+ struct i915_vma *vma)
{
- struct drm_i915_gem_object *obj;
- struct i915_vma *vma;
- int size;
int err;
- size = gen7_ctx_switch_bb_setup(engine, NULL /* probe size */);
- if (size <= 0)
- return size;
-
- size = ALIGN(size, PAGE_SIZE);
- obj = i915_gem_object_create_internal(engine->i915, size);
- if (IS_ERR(obj))
- return PTR_ERR(obj);
-
- vma = i915_vma_instance(obj, engine->gt->vm, NULL);
- if (IS_ERR(vma)) {
- err = PTR_ERR(vma);
- goto err_obj;
- }
-
- vma->private = intel_context_create(engine); /* dummy residuals */
- if (IS_ERR(vma->private)) {
- err = PTR_ERR(vma->private);
- goto err_obj;
- }
-
- err = i915_vma_pin(vma, 0, 0, PIN_USER | PIN_HIGH);
+ err = i915_vma_pin_ww(vma, ww, 0, 0, PIN_USER | PIN_HIGH);
if (err)
- goto err_private;
+ return err;
err = i915_vma_sync(vma);
if (err)
@@ -1229,17 +1216,53 @@ static int gen7_ctx_switch_bb_init(struct intel_engine_cs *engine)
err_unpin:
i915_vma_unpin(vma);
-err_private:
- intel_context_put(vma->private);
-err_obj:
- i915_gem_object_put(obj);
return err;
}
+static struct i915_vma *gen7_ctx_vma(struct intel_engine_cs *engine)
+{
+ struct drm_i915_gem_object *obj;
+ struct i915_vma *vma;
+ int size, err;
+
+ if (!IS_HASWELL(engine->i915) || engine->class != RENDER_CLASS)
+ return 0;
+
+ err = gen7_ctx_switch_bb_setup(engine, NULL /* probe size */);
+ if (err < 0)
+ return ERR_PTR(err);
+ if (!err)
+ return NULL;
+
+ size = ALIGN(err, PAGE_SIZE);
+
+ obj = i915_gem_object_create_internal(engine->i915, size);
+ if (IS_ERR(obj))
+ return ERR_CAST(obj);
+
+ vma = i915_vma_instance(obj, engine->gt->vm, NULL);
+ if (IS_ERR(vma)) {
+ i915_gem_object_put(obj);
+ return ERR_CAST(vma);
+ }
+
+ vma->private = intel_context_create(engine); /* dummy residuals */
+ if (IS_ERR(vma->private)) {
+ err = PTR_ERR(vma->private);
+ vma->private = NULL;
+ i915_gem_object_put(obj);
+ return ERR_PTR(err);
+ }
+
+ return vma;
+}
+
int intel_ring_submission_setup(struct intel_engine_cs *engine)
{
+ struct i915_gem_ww_ctx ww;
struct intel_timeline *timeline;
struct intel_ring *ring;
+ struct i915_vma *gen7_wa_vma;
int err;
setup_common(engine);
@@ -1270,43 +1293,72 @@ int intel_ring_submission_setup(struct intel_engine_cs *engine)
}
GEM_BUG_ON(timeline->has_initial_breadcrumb);
- err = intel_timeline_pin(timeline, NULL);
- if (err)
- goto err_timeline;
-
ring = intel_engine_create_ring(engine, SZ_16K);
if (IS_ERR(ring)) {
err = PTR_ERR(ring);
- goto err_timeline_unpin;
+ goto err_timeline;
}
- err = intel_ring_pin(ring, NULL);
- if (err)
- goto err_ring;
-
GEM_BUG_ON(engine->legacy.ring);
engine->legacy.ring = ring;
engine->legacy.timeline = timeline;
- GEM_BUG_ON(timeline->hwsp_ggtt != engine->status_page.vma);
+ gen7_wa_vma = gen7_ctx_vma(engine);
+ if (IS_ERR(gen7_wa_vma)) {
+ err = PTR_ERR(gen7_wa_vma);
+ goto err_ring;
+ }
- if (IS_HASWELL(engine->i915) && engine->class == RENDER_CLASS) {
- err = gen7_ctx_switch_bb_init(engine);
+ i915_gem_ww_ctx_init(&ww, false);
+
+retry:
+ err = i915_gem_object_lock(timeline->hwsp_ggtt->obj, &ww);
+ if (!err && gen7_wa_vma)
+ err = i915_gem_object_lock(gen7_wa_vma->obj, &ww);
+ if (!err && engine->legacy.ring->vma->obj)
+ err = i915_gem_object_lock(engine->legacy.ring->vma->obj, &ww);
+ if (!err)
+ err = intel_timeline_pin(timeline, &ww);
+ if (!err) {
+ err = intel_ring_pin(ring, &ww);
if (err)
- goto err_ring_unpin;
+ intel_timeline_unpin(timeline);
}
+ if (err)
+ goto out;
+
+ GEM_BUG_ON(timeline->hwsp_ggtt != engine->status_page.vma);
+
+ if (gen7_wa_vma) {
+ err = gen7_ctx_switch_bb_init(engine, &ww, gen7_wa_vma);
+ if (err) {
+ intel_ring_unpin(ring);
+ intel_timeline_unpin(timeline);
+ }
+ }
+
+out:
+ if (err == -EDEADLK) {
+ err = i915_gem_ww_ctx_backoff(&ww);
+ if (!err)
+ goto retry;
+ }
+ i915_gem_ww_ctx_fini(&ww);
+ if (err)
+ goto err_gen7_put;
/* Finally, take ownership and responsibility for cleanup! */
engine->release = ring_release;
return 0;
-err_ring_unpin:
- intel_ring_unpin(ring);
+err_gen7_put:
+ if (gen7_wa_vma) {
+ intel_context_put(gen7_wa_vma->private);
+ i915_gem_object_put(gen7_wa_vma->obj);
+ }
err_ring:
intel_ring_put(ring);
-err_timeline_unpin:
- intel_timeline_unpin(timeline);
err_timeline:
intel_timeline_put(timeline);
err:
--
2.28.0
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next prev parent reply other threads:[~2020-10-12 14:47 UTC|newest]
Thread overview: 68+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-12 14:46 [Intel-gfx] [PATCH v2 00/61] drm/i915: Remove obj->mm.lock! Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 01/61] drm/i915: Move cmd parser pinning to execbuffer Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 02/61] drm/i915: Add missing -EDEADLK handling to execbuf pinning Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 03/61] drm/i915: Do not share hwsp across contexts any more, v3 Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 04/61] drm/i915: Ensure we hold the object mutex in pin correctly Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 05/61] drm/i915: Add gem object locking to madvise Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 06/61] drm/i915: Move HAS_STRUCT_PAGE to obj->flags Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 07/61] drm/i915: Rework struct phys attachment handling Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 08/61] drm/i915: Convert i915_gem_object_attach_phys() to ww locking Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 09/61] drm/i915: make lockdep slightly happier about execbuf Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 10/61] drm/i915: Disable userptr pread/pwrite support Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 11/61] drm/i915: No longer allow exporting userptr through dma-buf Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 12/61] drm/i915: Reject more ioctls for userptr Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 13/61] drm/i915: Reject UNSYNCHRONIZED " Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 14/61] drm/i915: Fix userptr so we do not have to worry about obj->mm.lock, v2 Maarten Lankhorst
2020-10-12 17:05 ` Thomas Hellström (Intel)
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 15/61] drm/i915: Flatten obj->mm.lock Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 16/61] drm/i915: Pin timeline map after first timeline pin, v2 Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 17/61] drm/i915: Populate logical context during first pin Maarten Lankhorst
2020-10-12 14:46 ` Maarten Lankhorst [this message]
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 19/61] drm/i915: Handle ww locking in init_status_page Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 20/61] drm/i915: Rework clflush to work correctly without obj->mm.lock Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 21/61] drm/i915: Pass ww ctx to intel_pin_to_display_plane Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 22/61] drm/i915: Add object locking to vm_fault_cpu Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 23/61] drm/i915: Move pinning to inside engine_wa_list_verify() Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 24/61] drm/i915: Take reservation lock around i915_vma_pin Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 25/61] drm/i915: Make intel_init_workaround_bb more compatible with ww locking Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 26/61] drm/i915: Make __engine_unpark() " Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 27/61] drm/i915: Take obj lock around set_domain ioctl Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 28/61] drm/i915: Defer pin calls in buffer pool until first use by caller Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 29/61] drm/i915: Fix pread/pwrite to work with new locking rules Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 30/61] drm/i915: Fix workarounds selftest, part 1 Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 31/61] drm/i915: Prepare for obj->mm.lock removal Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 32/61] drm/i915: Add igt_spinner_pin() to allow for ww locking around spinner Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 33/61] drm/i915: Add ww locking around vm_access() Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 34/61] drm/i915: Increase ww locking for perf Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 35/61] drm/i915: Lock ww in ucode objects correctly Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 36/61] drm/i915: Add ww locking to dma-buf ops Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 37/61] drm/i915: Add missing ww lock in intel_dsb_prepare Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 38/61] drm/i915: Fix ww locking in shmem_create_from_object Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 39/61] drm/i915: Use a single page table lock for each gtt Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 40/61] drm/i915/selftests: Prepare huge_pages testcases for obj->mm.lock removal Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 41/61] drm/i915/selftests: Prepare client blit " Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 42/61] drm/i915/selftests: Prepare coherency tests " Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 43/61] drm/i915/selftests: Prepare context " Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 44/61] drm/i915/selftests: Prepare dma-buf " Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 45/61] drm/i915/selftests: Prepare execbuf " Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 46/61] drm/i915/selftests: Prepare mman testcases " Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 47/61] drm/i915/selftests: Prepare object tests " Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 48/61] drm/i915/selftests: Prepare object blit " Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 49/61] drm/i915/selftests: Prepare igt_gem_utils " Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 50/61] drm/i915/selftests: Prepare context selftest " Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 51/61] drm/i915/selftests: Prepare hangcheck " Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 52/61] drm/i915/selftests: Prepare execlists " Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 53/61] drm/i915/selftests: Prepare mocs tests " Maarten Lankhorst
2020-10-12 14:46 ` [Intel-gfx] [PATCH v2 54/61] drm/i915/selftests: Prepare ring submission " Maarten Lankhorst
2020-10-12 14:47 ` [Intel-gfx] [PATCH v2 55/61] drm/i915/selftests: Prepare timeline tests " Maarten Lankhorst
2020-10-12 14:47 ` [Intel-gfx] [PATCH v2 56/61] drm/i915/selftests: Prepare i915_request " Maarten Lankhorst
2020-10-12 14:47 ` [Intel-gfx] [PATCH v2 57/61] drm/i915/selftests: Prepare memory region " Maarten Lankhorst
2020-10-12 14:47 ` [Intel-gfx] [PATCH v2 58/61] drm/i915/selftests: Prepare cs engine " Maarten Lankhorst
2020-10-12 14:47 ` [Intel-gfx] [PATCH v2 59/61] drm/i915/selftests: Prepare gtt " Maarten Lankhorst
2020-10-12 14:47 ` [Intel-gfx] [PATCH v2 60/61] drm/i915: Finally remove obj->mm.lock Maarten Lankhorst
2020-10-12 14:47 ` [Intel-gfx] [PATCH v2 61/61] drm/i915: Keep userpointer bindings if seqcount is unchanged Maarten Lankhorst
2020-10-12 16:45 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Remove obj->mm.lock! (rev2) Patchwork
2020-10-12 16:47 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-10-12 16:49 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2020-10-12 17:13 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-10-12 19:57 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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