From: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Subject: [Intel-gfx] [RFC 06/13] drm/i915: Check for FRL training before DP Link training
Date: Thu, 15 Oct 2020 16:22:52 +0530 [thread overview]
Message-ID: <20201015105259.27934-7-ankit.k.nautiyal@intel.com> (raw)
In-Reply-To: <20201015105259.27934-1-ankit.k.nautiyal@intel.com>
This patch calls functions to check FRL training requirements
for an HDMI2.1 sink, when connected through PCON.
The call is made before the DP link training. In case FRL is not
required or failure during FRL training, the TMDS mode is selected
for the pcon.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_ddi.c | 2 ++
drivers/gpu/drm/i915/display/intel_dp.c | 2 ++
2 files changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index bb0b9930958f..1834e5de60a7 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3484,6 +3484,8 @@ static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state,
if (!is_mst)
intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
+ intel_dp_check_frl_training(intel_dp);
+
intel_dp_sink_set_decompression_state(intel_dp, crtc_state, true);
/*
* DDI FEC: "anticipates enabling FEC encoding sets the FEC_READY bit
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index c1342b5e7781..668165dd2b1a 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4206,6 +4206,7 @@ static void intel_enable_dp(struct intel_atomic_state *state,
intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
intel_dp_configure_protocol_converter(intel_dp);
+ intel_dp_check_frl_training(intel_dp);
intel_dp_start_link_train(intel_dp, pipe_config);
intel_dp_stop_link_train(intel_dp, pipe_config);
@@ -6127,6 +6128,7 @@ int intel_dp_retrain_link(struct intel_encoder *encoder,
!intel_dp_mst_is_master_trans(crtc_state))
continue;
+ intel_dp_check_frl_training(intel_dp);
intel_dp_start_link_train(intel_dp, crtc_state);
intel_dp_stop_link_train(intel_dp, crtc_state);
break;
--
2.17.1
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next prev parent reply other threads:[~2020-10-15 11:00 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-15 10:52 [Intel-gfx] [RFC 00/13] Add support for DP-HDMI2.1 PCON Ankit Nautiyal
2020-10-15 10:52 ` [Intel-gfx] [RFC 01/13] drm/edid: Add additional HFVSDB fields for HDMI2.1 Ankit Nautiyal
2020-10-18 20:47 ` Shankar, Uma
2020-11-01 5:31 ` Nautiyal, Ankit K
2020-10-15 10:52 ` [Intel-gfx] [RFC 02/13] drm/edid: Parse MAX_FRL field from HFVSDB block Ankit Nautiyal
2020-10-18 20:47 ` Shankar, Uma
2020-11-01 5:41 ` Nautiyal, Ankit K
2020-10-15 10:52 ` [Intel-gfx] [RFC 03/13] drm/dp_helper: Add FRL training support for a DP-HDMI2.1 PCON Ankit Nautiyal
2020-10-18 21:33 ` Shankar, Uma
2020-11-01 5:53 ` Nautiyal, Ankit K
2020-10-15 10:52 ` [Intel-gfx] [RFC 04/13] drm/i915: Capture max frl rate for PCON in dfp cap structure Ankit Nautiyal
2020-10-18 21:41 ` Shankar, Uma
2020-11-01 5:56 ` Nautiyal, Ankit K
2020-10-15 10:52 ` [Intel-gfx] [RFC 05/13] drm/i915: Add support for starting FRL training for HDMI2.1 via PCON Ankit Nautiyal
2020-10-18 22:14 ` Shankar, Uma
2020-11-01 6:01 ` Nautiyal, Ankit K
2020-10-15 10:52 ` Ankit Nautiyal [this message]
2020-10-18 22:21 ` [Intel-gfx] [RFC 06/13] drm/i915: Check for FRL training before DP Link training Shankar, Uma
2020-11-01 6:06 ` Nautiyal, Ankit K
2020-10-15 10:52 ` [Intel-gfx] [RFC 07/13] drm/dp_helper: Add support for link status and link recovery Ankit Nautiyal
2020-10-18 22:37 ` Shankar, Uma
2020-11-01 6:18 ` Nautiyal, Ankit K
2020-10-15 10:52 ` [Intel-gfx] [RFC 08/13] drm/i915: Add support for enabling link status and recovery Ankit Nautiyal
2020-10-18 22:49 ` Shankar, Uma
2020-11-01 6:26 ` Nautiyal, Ankit K
2020-10-15 10:52 ` [Intel-gfx] [RFC 09/13] drm/edid: Parse DSC1.2 cap fields from HFVSDB block Ankit Nautiyal
2020-10-18 23:01 ` Shankar, Uma
2020-11-01 6:52 ` Nautiyal, Ankit K
2020-10-15 10:52 ` [Intel-gfx] [RFC 10/13] drm/dp_helper: Add support for Configuring DSC for HDMI2.1 Pcon Ankit Nautiyal
2020-10-18 23:19 ` Shankar, Uma
2020-11-01 7:00 ` Nautiyal, Ankit K
2020-10-15 10:52 ` [Intel-gfx] [RFC 11/13] drm/i915: Read DSC capabilities of the HDMI2.1 PCON encoder Ankit Nautiyal
2020-10-18 23:32 ` Shankar, Uma
2020-10-18 23:34 ` Shankar, Uma
2020-11-01 7:14 ` Nautiyal, Ankit K
2020-11-01 7:13 ` Nautiyal, Ankit K
2020-10-15 10:52 ` [Intel-gfx] [RFC 12/13] drm/i915: Add helper functions for calculating DSC parameters for HDMI2.1 Ankit Nautiyal
2020-10-15 10:52 ` [Intel-gfx] [RFC 13/13] drm/i915: Configure PCON for DSC1.1 to DSC1.2 encoding Ankit Nautiyal
2020-10-15 11:37 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add support for DP-HDMI2.1 PCON (rev3) Patchwork
2020-10-15 11:39 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-10-15 12:02 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-10-15 13:41 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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