Re: [Intel-gfx] [RFC 06/13] drm/i915: Check for FRL training before DP Link training

From: "Nautiyal, Ankit K" <ankit.k.nautiyal@intel.com>
To: "Shankar, Uma" <uma.shankar@intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>
Cc: "dri-devel@lists.freedesktop.org" <dri-devel@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [RFC 06/13] drm/i915: Check for FRL training before DP Link training
Date: Sun, 1 Nov 2020 11:36:14 +0530	[thread overview]
Message-ID: <7876fd54-5ea8-3e2b-6e89-206b06d63cb5@intel.com> (raw)
In-Reply-To: <5ca574e0aac34b8e8f39ef17d2610672@intel.com>

On 10/19/2020 3:51 AM, Shankar, Uma wrote:
>
>> -----Original Message-----
>> From: Nautiyal, Ankit K <ankit.k.nautiyal@intel.com>
>> Sent: Thursday, October 15, 2020 4:23 PM
>> To: intel-gfx@lists.freedesktop.org
>> Cc: dri-devel@lists.freedesktop.org; Shankar, Uma <uma.shankar@intel.com>;
>> Kulkarni, Vandita <vandita.kulkarni@intel.com>; ville.syrjala@linux.intel.com;
>> Sharma, Swati2 <swati2.sharma@intel.com>
>> Subject: [RFC 06/13] drm/i915: Check for FRL training before DP Link training
>>
>> This patch calls functions to check FRL training requirements for an HDMI2.1 sink,
>> when connected through PCON.
>> The call is made before the DP link training. In case FRL is not required or failure
>> during FRL training, the TMDS mode is selected for the pcon.
>>
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> ---
>>   drivers/gpu/drm/i915/display/intel_ddi.c | 2 ++
>> drivers/gpu/drm/i915/display/intel_dp.c  | 2 ++
>>   2 files changed, 4 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
>> b/drivers/gpu/drm/i915/display/intel_ddi.c
>> index bb0b9930958f..1834e5de60a7 100644
>> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
>> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
>> @@ -3484,6 +3484,8 @@ static void tgl_ddi_pre_enable_dp(struct
>> intel_atomic_state *state,
>>   if (!is_mst)
>>   intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
>>
>> +intel_dp_check_frl_training(intel_dp);
> Good to move it near start_link_training to stay consistent with rest of the calls.

Alright. Will take care in the next version.

Thanks & Regards,

Ankit

>
>> +
>>   intel_dp_sink_set_decompression_state(intel_dp, crtc_state, true);
>>   /*
>>    * DDI FEC: "anticipates enabling FEC encoding sets the FEC_READY bit
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
>> b/drivers/gpu/drm/i915/display/intel_dp.c
>> index c1342b5e7781..668165dd2b1a 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>> @@ -4206,6 +4206,7 @@ static void intel_enable_dp(struct intel_atomic_state
>> *state,
>>
>>   intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
>>   intel_dp_configure_protocol_converter(intel_dp);
>> +intel_dp_check_frl_training(intel_dp);
>>   intel_dp_start_link_train(intel_dp, pipe_config);
>>   intel_dp_stop_link_train(intel_dp, pipe_config);
>>
>> @@ -6127,6 +6128,7 @@ int intel_dp_retrain_link(struct intel_encoder
>> *encoder,
>>       !intel_dp_mst_is_master_trans(crtc_state))
>>   continue;
>>
>> +intel_dp_check_frl_training(intel_dp);
>>   intel_dp_start_link_train(intel_dp, crtc_state);
>>   intel_dp_stop_link_train(intel_dp, crtc_state);
>>   break;
>> --
>> 2.17.1
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