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From: "Nautiyal, Ankit K" <ankit.k.nautiyal@intel.com>
To: "Shankar, Uma" <uma.shankar@intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>
Cc: "dri-devel@lists.freedesktop.org" <dri-devel@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [RFC 02/13] drm/edid: Parse MAX_FRL field from HFVSDB block
Date: Sun, 1 Nov 2020 11:11:35 +0530	[thread overview]
Message-ID: <98103781-a583-6635-2c69-3a9c4fae8d3d@intel.com> (raw)
In-Reply-To: <f0e519bf25234f128e716a520443a60f@intel.com>


On 10/19/2020 2:17 AM, Shankar, Uma wrote:
>
>> -----Original Message-----
>> From: Nautiyal, Ankit K <ankit.k.nautiyal@intel.com>
>> Sent: Thursday, October 15, 2020 4:23 PM
>> To: intel-gfx@lists.freedesktop.org
>> Cc: dri-devel@lists.freedesktop.org; Shankar, Uma <uma.shankar@intel.com>;
>> Kulkarni, Vandita <vandita.kulkarni@intel.com>; ville.syrjala@linux.intel.com;
>> Sharma, Swati2 <swati2.sharma@intel.com>
>> Subject: [RFC 02/13] drm/edid: Parse MAX_FRL field from HFVSDB block
>>
>> From: Swati Sharma <swati2.sharma@intel.com>
>>
>> This patch parses MAX_FRL field to get the MAX rate in Gbps that the HDMI 2.1
>> panel can support in FRL mode. Source need this field to determine the optimal
>> rate between the source and sink during FRL training.
>>
>> Signed-off-by: Sharma, Swati2 <swati2.sharma@intel.com>
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> ---
>>   drivers/gpu/drm/drm_edid.c  | 51 +++++++++++++++++++++++++++++++++++++
>>   include/drm/drm_connector.h |  6 +++++
>>   2 files changed, 57 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index
>> 631125b46e04..8afb136e73f5 100644
>> --- a/drivers/gpu/drm/drm_edid.c
>> +++ b/drivers/gpu/drm/drm_edid.c
>> @@ -4849,6 +4849,52 @@ static void drm_parse_vcdb(struct drm_connector
>> *connector, const u8 *db)
>>   info->rgb_quant_range_selectable = true;  }
>>
>> +static
>> +void drm_get_max_frl_rate(int max_frl_rate, u8 *max_lanes, u8
>> +*max_rate_per_lane) {
>> +switch(max_frl_rate) {
>> +case 1:
>> +*max_lanes = 3;
>> +*max_rate_per_lane = 3;
>> +break;
>> +case 2:
>> +*max_lanes = 3;
>> +*max_rate_per_lane = 6;
>> +break;
>> +case 3:
>> +*max_lanes = 4;
>> +*max_rate_per_lane = 6;
>> +break;
>> +case 4:
>> +*max_lanes = 4;
>> +*max_rate_per_lane = 8;
>> +break;
>> +case 5:
>> +*max_lanes = 4;
>> +*max_rate_per_lane = 10;
>> +break;
>> +case 6:
>> +*max_lanes = 4;
>> +*max_rate_per_lane = 12;
>> +break;
>> +case 0:
>> +default:
>> +*max_lanes = 0;
>> +*max_rate_per_lane = 0;
>> +}
>> +}
>> +
>> +static void drm_parse_hdmi_21_additional_fields(struct drm_connector
>> *connector,
>> +const u8 *db)
>> +{
>> +struct drm_hdmi_info *hdmi = &connector->display_info.hdmi;
>> +u8 max_frl_rate;
>> +
>> +max_frl_rate = db[7] & DRM_EDID_MAX_FRL_RATE_MASK;
> This seems wrong,  we need to right shift this by 4 to get the max_frl_rate.


Thanks Uma for catching this.

This was correct in the first patch, bug crept in while restructuring 
the code. Will fix in the next patchset.

>
>> +drm_get_max_frl_rate(max_frl_rate, &hdmi->max_lanes,
>> +     &hdmi->max_frl_rate_per_lane);
> We can just pass the connecter and drm_get_max_frl_rate can fill the respective fields.


I wanted to make this generic, as this function is to be re-used in case 
of parsing DSC max frl also, so I just passed the lanes and rate per 
lane to be filled.


>
>> +}
>> +
>>   static void drm_parse_ycbcr420_deep_color_info(struct drm_connector
>> *connector,
>>          const u8 *db)
>>   {
>> @@ -4902,6 +4948,11 @@ static void drm_parse_hdmi_forum_vsdb(struct
>> drm_connector *connector,
>>   }
>>   }
>>
>> +if (hf_vsdb[7]) {
>> +    DRM_DEBUG_KMS("hdmi_21 sink detected. parsing edid\n");
>> +    drm_parse_hdmi_21_additional_fields(connector, hf_vsdb);
> We can get rid of this extra wrapper.


Agreed. Will take care of this in the next patchset.

Thanks & Regards,

Ankit

>
>> +}
>> +
>>   drm_parse_ycbcr420_deep_color_info(connector, hf_vsdb);  }
>>
>> diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h index
>> 928136556174..f351bf10c076 100644
>> --- a/include/drm/drm_connector.h
>> +++ b/include/drm/drm_connector.h
>> @@ -207,6 +207,12 @@ struct drm_hdmi_info {
>>
>>   /** @y420_dc_modes: bitmap of deep color support index */
>>   u8 y420_dc_modes;
>> +
>> +/** @max_frl_rate_per_lane: support fixed rate link */
>> +u8 max_frl_rate_per_lane;
>> +
>> +/** @max_lanes: supported by sink */
>> +u8 max_lanes;
>>   };
>>
>>   /**
>> --
>> 2.17.1
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  reply	other threads:[~2020-11-01  5:41 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-15 10:52 [Intel-gfx] [RFC 00/13] Add support for DP-HDMI2.1 PCON Ankit Nautiyal
2020-10-15 10:52 ` [Intel-gfx] [RFC 01/13] drm/edid: Add additional HFVSDB fields for HDMI2.1 Ankit Nautiyal
2020-10-18 20:47   ` Shankar, Uma
2020-11-01  5:31     ` Nautiyal, Ankit K
2020-10-15 10:52 ` [Intel-gfx] [RFC 02/13] drm/edid: Parse MAX_FRL field from HFVSDB block Ankit Nautiyal
2020-10-18 20:47   ` Shankar, Uma
2020-11-01  5:41     ` Nautiyal, Ankit K [this message]
2020-10-15 10:52 ` [Intel-gfx] [RFC 03/13] drm/dp_helper: Add FRL training support for a DP-HDMI2.1 PCON Ankit Nautiyal
2020-10-18 21:33   ` Shankar, Uma
2020-11-01  5:53     ` Nautiyal, Ankit K
2020-10-15 10:52 ` [Intel-gfx] [RFC 04/13] drm/i915: Capture max frl rate for PCON in dfp cap structure Ankit Nautiyal
2020-10-18 21:41   ` Shankar, Uma
2020-11-01  5:56     ` Nautiyal, Ankit K
2020-10-15 10:52 ` [Intel-gfx] [RFC 05/13] drm/i915: Add support for starting FRL training for HDMI2.1 via PCON Ankit Nautiyal
2020-10-18 22:14   ` Shankar, Uma
2020-11-01  6:01     ` Nautiyal, Ankit K
2020-10-15 10:52 ` [Intel-gfx] [RFC 06/13] drm/i915: Check for FRL training before DP Link training Ankit Nautiyal
2020-10-18 22:21   ` Shankar, Uma
2020-11-01  6:06     ` Nautiyal, Ankit K
2020-10-15 10:52 ` [Intel-gfx] [RFC 07/13] drm/dp_helper: Add support for link status and link recovery Ankit Nautiyal
2020-10-18 22:37   ` Shankar, Uma
2020-11-01  6:18     ` Nautiyal, Ankit K
2020-10-15 10:52 ` [Intel-gfx] [RFC 08/13] drm/i915: Add support for enabling link status and recovery Ankit Nautiyal
2020-10-18 22:49   ` Shankar, Uma
2020-11-01  6:26     ` Nautiyal, Ankit K
2020-10-15 10:52 ` [Intel-gfx] [RFC 09/13] drm/edid: Parse DSC1.2 cap fields from HFVSDB block Ankit Nautiyal
2020-10-18 23:01   ` Shankar, Uma
2020-11-01  6:52     ` Nautiyal, Ankit K
2020-10-15 10:52 ` [Intel-gfx] [RFC 10/13] drm/dp_helper: Add support for Configuring DSC for HDMI2.1 Pcon Ankit Nautiyal
2020-10-18 23:19   ` Shankar, Uma
2020-11-01  7:00     ` Nautiyal, Ankit K
2020-10-15 10:52 ` [Intel-gfx] [RFC 11/13] drm/i915: Read DSC capabilities of the HDMI2.1 PCON encoder Ankit Nautiyal
2020-10-18 23:32   ` Shankar, Uma
2020-10-18 23:34     ` Shankar, Uma
2020-11-01  7:14       ` Nautiyal, Ankit K
2020-11-01  7:13     ` Nautiyal, Ankit K
2020-10-15 10:52 ` [Intel-gfx] [RFC 12/13] drm/i915: Add helper functions for calculating DSC parameters for HDMI2.1 Ankit Nautiyal
2020-10-15 10:52 ` [Intel-gfx] [RFC 13/13] drm/i915: Configure PCON for DSC1.1 to DSC1.2 encoding Ankit Nautiyal
2020-10-15 11:37 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add support for DP-HDMI2.1 PCON (rev3) Patchwork
2020-10-15 11:39 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-10-15 12:02 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-10-15 13:41 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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