Intel-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Uma Shankar <uma.shankar@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [v8 09/12] drm/i915/display: Implement DRM infoframe read for LSPCON
Date: Fri, 16 Oct 2020 05:18:59 +0530	[thread overview]
Message-ID: <20201015234902.7134-10-uma.shankar@intel.com> (raw)
In-Reply-To: <20201015234902.7134-1-uma.shankar@intel.com>

Implement Read back of HDR metadata infoframes i.e Dynamic Range
and Mastering Infoframe for LSPCON devices.

v2: Added proper bitmask of enabled infoframes as per Ville's
recommendation.

v3: Dropped a redundant wrapper as per Ville's comment.

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/display/intel_hdmi.c   | 7 +++----
 drivers/gpu/drm/i915/display/intel_lspcon.c | 7 ++++++-
 drivers/gpu/drm/i915/display/intel_lspcon.h | 4 ++++
 3 files changed, 13 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index f1a927cdf798..81dabffbb3e6 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -555,10 +555,9 @@ void hsw_write_infoframe(struct intel_encoder *encoder,
 	intel_de_posting_read(dev_priv, ctl_reg);
 }
 
-static void hsw_read_infoframe(struct intel_encoder *encoder,
-			       const struct intel_crtc_state *crtc_state,
-			       unsigned int type,
-			       void *frame, ssize_t len)
+void hsw_read_infoframe(struct intel_encoder *encoder,
+			const struct intel_crtc_state *crtc_state,
+			unsigned int type, void *frame, ssize_t len)
 {
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c b/drivers/gpu/drm/i915/display/intel_lspcon.c
index 9685be1991ca..d81a615ff9ac 100644
--- a/drivers/gpu/drm/i915/display/intel_lspcon.c
+++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
@@ -501,7 +501,12 @@ void lspcon_read_infoframe(struct intel_encoder *encoder,
 			   unsigned int type,
 			   void *frame, ssize_t len)
 {
-	/* FIXME implement this */
+	/* FIXME implement for AVI Infoframe as well */
+	if (type == HDMI_PACKET_TYPE_GAMUT_METADATA) {
+		drm_dbg_kms(encoder->base.dev, "Read HDR metadata for lspcon\n");
+		hsw_read_infoframe(encoder, crtc_state, type,
+				   frame, len);
+	}
 }
 
 void lspcon_set_infoframes(struct intel_encoder *encoder,
diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.h b/drivers/gpu/drm/i915/display/intel_lspcon.h
index 972afa3b2168..15965c77b43a 100644
--- a/drivers/gpu/drm/i915/display/intel_lspcon.h
+++ b/drivers/gpu/drm/i915/display/intel_lspcon.h
@@ -39,5 +39,9 @@ void hsw_write_infoframe(struct intel_encoder *encoder,
 			 const struct intel_crtc_state *crtc_state,
 			 unsigned int type,
 			const void *frame, ssize_t len);
+void hsw_read_infoframe(struct intel_encoder *encoder,
+			const struct intel_crtc_state *crtc_state,
+			unsigned int type,
+			void *frame, ssize_t len);
 
 #endif /* __INTEL_LSPCON_H__ */
-- 
2.26.2

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2020-10-15 23:15 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-15 23:48 [Intel-gfx] [v8 00/12] Enable HDR on MCA LSPCON based Gen9 devices Uma Shankar
2020-10-15 23:31 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable HDR on MCA LSPCON based Gen9 devices (rev8) Patchwork
2020-10-15 23:33 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-10-15 23:48 ` [Intel-gfx] [v8 01/12] drm/i915/display: Add HDR Capability detection for LSPCON Uma Shankar
2020-10-15 23:48 ` [Intel-gfx] [v8 02/12] drm/i915/display: Enable HDR on gen9 devices with MCA Lspcon Uma Shankar
2020-10-15 23:48 ` [Intel-gfx] [v8 03/12] drm/i915/display: Attach HDR property for capable Gen9 devices Uma Shankar
2020-10-15 23:48 ` [Intel-gfx] [v8 04/12] drm/i915/display: Attach content type property for LSPCON Uma Shankar
2020-10-15 23:48 ` [Intel-gfx] [v8 05/12] drm/i915/display: Nuke bogus lspcon check Uma Shankar
2020-10-15 23:48 ` [Intel-gfx] [v8 06/12] drm/i915/display: Enable BT2020 for HDR on LSPCON devices Uma Shankar
2020-10-15 23:48 ` [Intel-gfx] [v8 07/12] drm/i915/display: Enable HDR for Parade based lspcon Uma Shankar
2020-10-15 23:48 ` [Intel-gfx] [v8 08/12] drm/i915/display: Implement infoframes readback for LSPCON Uma Shankar
2020-10-15 23:48 ` Uma Shankar [this message]
2020-10-15 23:49 ` [Intel-gfx] [v8 10/12] drm/i915/lspcon: Create separate infoframe_enabled helper Uma Shankar
2020-10-15 23:49 ` [Intel-gfx] [v8 11/12] drm/i915/lspcon: Do not send DRM infoframes to non-HDMI sinks Uma Shankar
2020-10-15 23:49 ` [Intel-gfx] [v8 12/12] drm/i915/display: [NOT FOR MERGE] Reduce blanking to support 4k60@10bpp for LSPCON Uma Shankar
2020-10-16  0:03 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for Enable HDR on MCA LSPCON based Gen9 devices (rev8) Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20201015234902.7134-10-uma.shankar@intel.com \
    --to=uma.shankar@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox