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From: Uma Shankar <uma.shankar@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [v8 01/12] drm/i915/display: Add HDR Capability detection for LSPCON
Date: Fri, 16 Oct 2020 05:18:51 +0530	[thread overview]
Message-ID: <20201015234902.7134-2-uma.shankar@intel.com> (raw)
In-Reply-To: <20201015234902.7134-1-uma.shankar@intel.com>

LSPCON firmware exposes HDR capability through LPCON_CAPABILITIES
DPCD register. LSPCON implementations capable of supporting
HDR set HDR_CAPABILITY bit in LSPCON_CAPABILITIES to 1. This patch
reads the same, detects the HDR capability and adds this to
intel_lspcon struct.

v2: Addressed Jani Nikula's review comment and fixed the HDR
    capability detection logic

v3: Deferred HDR detection from lspcon_init (Ville)

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
 .../drm/i915/display/intel_display_types.h    |  1 +
 drivers/gpu/drm/i915/display/intel_lspcon.c   | 28 +++++++++++++++++++
 drivers/gpu/drm/i915/display/intel_lspcon.h   |  1 +
 3 files changed, 30 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 0b5df8e44966..537144ed1494 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1418,6 +1418,7 @@ struct intel_lspcon {
 	bool active;
 	enum drm_lspcon_mode mode;
 	enum lspcon_vendor vendor;
+	bool hdr_supported;
 };
 
 struct intel_digital_port {
diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c b/drivers/gpu/drm/i915/display/intel_lspcon.c
index ee95fc353a56..093329cbb3bd 100644
--- a/drivers/gpu/drm/i915/display/intel_lspcon.c
+++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
@@ -35,6 +35,8 @@
 #define LSPCON_VENDOR_PARADE_OUI 0x001CF8
 #define LSPCON_VENDOR_MCA_OUI 0x0060AD
 
+#define DPCD_MCA_LSPCON_HDR_STATUS	0x70003
+
 /* AUX addresses to write MCA AVI IF */
 #define LSPCON_MCA_AVI_IF_WRITE_OFFSET 0x5C0
 #define LSPCON_MCA_AVI_IF_CTRL 0x5DF
@@ -104,6 +106,32 @@ static bool lspcon_detect_vendor(struct intel_lspcon *lspcon)
 	return true;
 }
 
+void lspcon_detect_hdr_capability(struct intel_lspcon *lspcon)
+{
+	struct intel_digital_port *dig_port =
+		container_of(lspcon, struct intel_digital_port, lspcon);
+	struct drm_device *dev = dig_port->base.base.dev;
+	struct intel_dp *dp = lspcon_to_intel_dp(lspcon);
+	u8 hdr_caps;
+	int ret;
+
+	/* Enable HDR for MCA based LSPCON devices */
+	if (lspcon->vendor == LSPCON_VENDOR_MCA)
+		ret = drm_dp_dpcd_read(&dp->aux, DPCD_MCA_LSPCON_HDR_STATUS,
+				       &hdr_caps, 1);
+	else
+		return;
+
+	if (ret < 0) {
+		drm_dbg_kms(dev, "hdr capability detection failed\n");
+		lspcon->hdr_supported = false;
+		return;
+	} else if (hdr_caps & 0x1) {
+		drm_dbg_kms(dev, "lspcon capable of HDR\n");
+		lspcon->hdr_supported = true;
+	}
+}
+
 static enum drm_lspcon_mode lspcon_get_current_mode(struct intel_lspcon *lspcon)
 {
 	enum drm_lspcon_mode current_mode;
diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.h b/drivers/gpu/drm/i915/display/intel_lspcon.h
index 0851ea30831a..a54b97cd3d64 100644
--- a/drivers/gpu/drm/i915/display/intel_lspcon.h
+++ b/drivers/gpu/drm/i915/display/intel_lspcon.h
@@ -15,6 +15,7 @@ struct intel_digital_port;
 struct intel_encoder;
 struct intel_lspcon;
 
+void lspcon_detect_hdr_capability(struct intel_lspcon *lspcon);
 void lspcon_resume(struct intel_digital_port *dig_port);
 void lspcon_wait_pcon_mode(struct intel_lspcon *lspcon);
 void lspcon_write_infoframe(struct intel_encoder *encoder,
-- 
2.26.2

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  parent reply	other threads:[~2020-10-15 23:15 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-15 23:48 [Intel-gfx] [v8 00/12] Enable HDR on MCA LSPCON based Gen9 devices Uma Shankar
2020-10-15 23:31 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable HDR on MCA LSPCON based Gen9 devices (rev8) Patchwork
2020-10-15 23:33 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-10-15 23:48 ` Uma Shankar [this message]
2020-10-15 23:48 ` [Intel-gfx] [v8 02/12] drm/i915/display: Enable HDR on gen9 devices with MCA Lspcon Uma Shankar
2020-10-15 23:48 ` [Intel-gfx] [v8 03/12] drm/i915/display: Attach HDR property for capable Gen9 devices Uma Shankar
2020-10-15 23:48 ` [Intel-gfx] [v8 04/12] drm/i915/display: Attach content type property for LSPCON Uma Shankar
2020-10-15 23:48 ` [Intel-gfx] [v8 05/12] drm/i915/display: Nuke bogus lspcon check Uma Shankar
2020-10-15 23:48 ` [Intel-gfx] [v8 06/12] drm/i915/display: Enable BT2020 for HDR on LSPCON devices Uma Shankar
2020-10-15 23:48 ` [Intel-gfx] [v8 07/12] drm/i915/display: Enable HDR for Parade based lspcon Uma Shankar
2020-10-15 23:48 ` [Intel-gfx] [v8 08/12] drm/i915/display: Implement infoframes readback for LSPCON Uma Shankar
2020-10-15 23:48 ` [Intel-gfx] [v8 09/12] drm/i915/display: Implement DRM infoframe read " Uma Shankar
2020-10-15 23:49 ` [Intel-gfx] [v8 10/12] drm/i915/lspcon: Create separate infoframe_enabled helper Uma Shankar
2020-10-15 23:49 ` [Intel-gfx] [v8 11/12] drm/i915/lspcon: Do not send DRM infoframes to non-HDMI sinks Uma Shankar
2020-10-15 23:49 ` [Intel-gfx] [v8 12/12] drm/i915/display: [NOT FOR MERGE] Reduce blanking to support 4k60@10bpp for LSPCON Uma Shankar
2020-10-16  0:03 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for Enable HDR on MCA LSPCON based Gen9 devices (rev8) Patchwork

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