From: Aditya Swarup <aditya.swarup@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Jani Nikula <jani.nikula@intel.com>,
Lucas De Marchi <lucas.demarchi@intel.com>
Subject: [Intel-gfx] [PATCH 17/18] drm/i915/adl_s: Update memory bandwidth parameters
Date: Wed, 21 Oct 2020 06:32:12 -0700 [thread overview]
Message-ID: <20201021133213.328994-18-aditya.swarup@intel.com> (raw)
In-Reply-To: <20201021133213.328994-1-aditya.swarup@intel.com>
From: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
Just like RKL, the ADL_S platform also has different memory
characteristics from past platforms. Update the values used
by our memory bandwidth calculations accordingly.
Bspec: 64631
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
Signed-off-by: Aditya Swarup <aditya.swarup@intel.com>
---
drivers/gpu/drm/i915/display/intel_bw.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index bd060404d249..32522ec1ffb9 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -205,6 +205,12 @@ static const struct intel_sa_info rkl_sa_info = {
.displayrtids = 128,
};
+static const struct intel_sa_info adls_sa_info = {
+ .deburst = 16,
+ .deprogbwlimit = 38, /* GB/s */
+ .displayrtids = 256,
+};
+
static int icl_get_bw_info(struct drm_i915_private *dev_priv, const struct intel_sa_info *sa)
{
struct intel_qgv_info qi = {};
@@ -317,6 +323,8 @@ void intel_bw_init_hw(struct drm_i915_private *dev_priv)
if (IS_ROCKETLAKE(dev_priv))
icl_get_bw_info(dev_priv, &rkl_sa_info);
+ else if (IS_ALDERLAKE_S(dev_priv))
+ icl_get_bw_info(dev_priv, &adls_sa_info);
else if (IS_GEN(dev_priv, 12))
icl_get_bw_info(dev_priv, &tgl_sa_info);
else if (IS_GEN(dev_priv, 11))
--
2.27.0
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next prev parent reply other threads:[~2020-10-21 13:32 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-21 13:31 [Intel-gfx] [PATCH 00/18] Introduce Alderlake-S Aditya Swarup
2020-10-21 13:31 ` [Intel-gfx] [PATCH 01/18] drm/i915/adl_s: Add ADL-S platform info and PCI ids Aditya Swarup
2020-10-23 18:05 ` Matt Roper
2020-10-21 13:31 ` [Intel-gfx] [PATCH 02/18] x86/gpu: add ADL_S stolen memory support Aditya Swarup
2020-10-21 20:43 ` Matt Roper
2020-10-21 20:57 ` Lucas De Marchi
2020-10-21 13:31 ` [Intel-gfx] [PATCH 03/18] drm/i915/adl_s: Add PCH support Aditya Swarup
2020-10-21 14:17 ` Jani Nikula
2020-10-21 13:31 ` [Intel-gfx] [PATCH 04/18] drm/i915/adl_s: Add Interrupt Support Aditya Swarup
2020-10-21 17:28 ` Lucas De Marchi
2020-10-22 23:26 ` Aditya Swarup
2020-10-23 0:40 ` Lucas De Marchi
2020-10-21 13:32 ` [Intel-gfx] [PATCH 05/18] drm/i915/adl_s: Add PHYs for Alderlake S Aditya Swarup
2020-10-23 18:11 ` Matt Roper
2020-10-21 13:32 ` [Intel-gfx] [PATCH 06/18] drm/i915/adl_s: Configure DPLL for ADL-S Aditya Swarup
2020-10-21 13:32 ` [Intel-gfx] [PATCH 07/18] drm/i915/adl_s: Configure Port clock registers " Aditya Swarup
2020-10-21 14:21 ` Jani Nikula
2020-10-21 13:32 ` [Intel-gfx] [PATCH 08/18] drm/i915/adl_s: Setup display outputs and HTI support " Aditya Swarup
2020-10-21 13:32 ` [Intel-gfx] [PATCH 09/18] drm/i915/adl_s: Add adl-s ddc pin mapping Aditya Swarup
2020-10-21 13:32 ` [Intel-gfx] [PATCH 10/18] drm/i915/adl_s: Add vbt port and aux channel settings for adls Aditya Swarup
2020-10-21 13:32 ` [Intel-gfx] [PATCH 11/18] drm/i915/adl_s: Update combo PHY master/slave relationships Aditya Swarup
2020-10-21 13:32 ` [Intel-gfx] [PATCH 12/18] drm/i915/adl_s: Update PHY_MISC programming Aditya Swarup
2020-10-21 13:32 ` [Intel-gfx] [PATCH 13/18] drm/i915/adl_s: Add display, gt, ctx and ADL-S whitelist WA Aditya Swarup
2020-11-04 10:38 ` Joonas Lahtinen
2020-11-04 14:07 ` Rodrigo Vivi
2020-10-21 13:32 ` [Intel-gfx] [PATCH 14/18] drm/i915/adl_s: MCHBAR memory info registers are moved Aditya Swarup
2020-10-21 13:32 ` [Intel-gfx] [PATCH 15/18] drm/i915/adl_s: Re-use TGL GuC/HuC firmware Aditya Swarup
2020-10-21 13:32 ` [Intel-gfx] [PATCH 16/18] drm/i915/display: Add HAS_D12_PLANE_MINIMIZATION Aditya Swarup
2020-10-21 13:32 ` Aditya Swarup [this message]
2020-10-21 13:32 ` [Intel-gfx] [PATCH 18/18] drm/i915/adl_s: Load DMC Aditya Swarup
2020-10-21 14:16 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Introduce Alderlake-S Patchwork
2020-10-21 14:17 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-10-21 14:41 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-10-21 16:36 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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