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From: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>
To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v2 14/15] drm/i915: Use ttm mmap handling for ttm bo's.
Date: Tue, 18 May 2021 10:27:00 +0200	[thread overview]
Message-ID: <20210518082701.997251-15-thomas.hellstrom@linux.intel.com> (raw)
In-Reply-To: <20210518082701.997251-1-thomas.hellstrom@linux.intel.com>

From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>

Use the ttm handlers for servicing page faults, and vm_access.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
---
 drivers/gpu/drm/i915/gem/i915_gem_mman.c      |  17 ++-
 drivers/gpu/drm/i915/gem/i915_gem_mman.h      |   2 +
 .../gpu/drm/i915/gem/i915_gem_object_types.h  |   1 +
 drivers/gpu/drm/i915/gem/i915_gem_ttm.c       | 105 +++++++++++++++++-
 4 files changed, 118 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
index 65db290efd16..2bf89349dde9 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
@@ -19,6 +19,7 @@
 #include "i915_gem_mman.h"
 #include "i915_trace.h"
 #include "i915_user_extensions.h"
+#include "i915_gem_ttm.h"
 #include "i915_vma.h"
 
 static inline bool
@@ -789,7 +790,7 @@ i915_gem_mmap_offset_ioctl(struct drm_device *dev, void *data,
 	return __assign_mmap_offset(file, args->handle, type, &args->offset);
 }
 
-static void vm_open(struct vm_area_struct *vma)
+void i915_gem_mmap_vm_open(struct vm_area_struct *vma)
 {
 	struct i915_mmap_offset *mmo = vma->vm_private_data;
 	struct drm_i915_gem_object *obj = mmo->obj;
@@ -798,7 +799,7 @@ static void vm_open(struct vm_area_struct *vma)
 	i915_gem_object_get(obj);
 }
 
-static void vm_close(struct vm_area_struct *vma)
+void i915_gem_mmap_vm_close(struct vm_area_struct *vma)
 {
 	struct i915_mmap_offset *mmo = vma->vm_private_data;
 	struct drm_i915_gem_object *obj = mmo->obj;
@@ -810,15 +811,15 @@ static void vm_close(struct vm_area_struct *vma)
 static const struct vm_operations_struct vm_ops_gtt = {
 	.fault = vm_fault_gtt,
 	.access = vm_access,
-	.open = vm_open,
-	.close = vm_close,
+	.open = i915_gem_mmap_vm_open,
+	.close = i915_gem_mmap_vm_close,
 };
 
 static const struct vm_operations_struct vm_ops_cpu = {
 	.fault = vm_fault_cpu,
 	.access = vm_access,
-	.open = vm_open,
-	.close = vm_close,
+	.open = i915_gem_mmap_vm_open,
+	.close = i915_gem_mmap_vm_close,
 };
 
 static int singleton_release(struct inode *inode, struct file *file)
@@ -953,6 +954,10 @@ int i915_gem_mmap(struct file *filp, struct vm_area_struct *vma)
 	}
 	vma->vm_page_prot = pgprot_decrypted(vma->vm_page_prot);
 
+	/* override ops per-object if desired */
+	if (obj->ops->mmap_ops)
+		vma->vm_ops = obj->ops->mmap_ops;
+
 	return 0;
 }
 
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.h b/drivers/gpu/drm/i915/gem/i915_gem_mman.h
index efee9e0d2508..e5bd02a6db12 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.h
@@ -28,5 +28,7 @@ void __i915_gem_object_release_mmap_gtt(struct drm_i915_gem_object *obj);
 void i915_gem_object_release_mmap_gtt(struct drm_i915_gem_object *obj);
 
 void i915_gem_object_release_mmap_offset(struct drm_i915_gem_object *obj);
+void i915_gem_mmap_vm_open(struct vm_area_struct *vma);
+void i915_gem_mmap_vm_close(struct vm_area_struct *vma);
 
 #endif
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
index b350765e1935..31d828e91cf4 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
@@ -79,6 +79,7 @@ struct drm_i915_gem_object_ops {
 	void (*delayed_free)(struct drm_i915_gem_object *obj);
 	void (*release)(struct drm_i915_gem_object *obj);
 
+	const struct vm_operations_struct *mmap_ops;
 	const char *name; /* friendly name for debug, e.g. lockdep classes */
 };
 
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
index 790f5ec45c4d..fe9ac50b2470 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
@@ -14,6 +14,7 @@
 #include "gem/i915_gem_region.h"
 #include "gem/i915_gem_ttm.h"
 #include "gem/i915_gem_ttm_bo_util.h"
+#include "gem/i915_gem_mman.h"
 
 #define I915_PL_LMEM0 TTM_PL_PRIV
 #define I915_PL_SYSTEM TTM_PL_SYSTEM
@@ -345,6 +346,44 @@ static int i915_ttm_move(struct ttm_buffer_object *bo, bool evict,
 	return 0;
 }
 
+static int i915_ttm_io_mem_reserve(struct ttm_device *bdev, struct ttm_resource *mem)
+{
+	if (mem->mem_type < I915_PL_LMEM0)
+		return 0;
+
+	/* We may need to revisit this later, but this allows all caching to be used in mmap */
+	mem->bus.caching = ttm_cached;
+	mem->bus.is_iomem = true;
+
+	return 0;
+}
+
+static unsigned long i915_ttm_io_mem_pfn(struct ttm_buffer_object *bo,
+					 unsigned long page_offset)
+{
+	struct drm_i915_gem_object *obj = i915_ttm_to_gem(bo);
+	struct sg_table *sgt = obj->ttm.cached_io_st;
+	struct scatterlist *sg;
+	unsigned int i;
+
+	GEM_WARN_ON(bo->ttm);
+
+	for_each_sgtable_dma_sg(sgt, sg, i) {
+		unsigned long sg_max = sg->length >> PAGE_SHIFT;
+
+		if (page_offset < sg_max) {
+			unsigned long base =
+				obj->mm.region->iomap.base - obj->mm.region->region.start;
+
+			return ((base + sg_dma_address(sg)) >> PAGE_SHIFT) + page_offset;
+		}
+
+		page_offset -= sg_max;
+	}
+	GEM_BUG_ON(1);
+	return 0;
+}
+
 struct ttm_device_funcs i915_ttm_bo_driver = {
 	.ttm_tt_create = i915_ttm_tt_create,
 	.ttm_tt_unpopulate = i915_ttm_tt_unpopulate,
@@ -355,6 +394,8 @@ struct ttm_device_funcs i915_ttm_bo_driver = {
 	.verify_access = NULL,
 	.swap_notify = i915_ttm_swap_notify,
 	.delete_mem_notify = i915_ttm_delete_mem_notify,
+	.io_mem_reserve = i915_ttm_io_mem_reserve,
+	.io_mem_pfn = i915_ttm_io_mem_pfn,
 };
 
 static int i915_ttm_get_pages(struct drm_i915_gem_object *obj)
@@ -454,7 +495,68 @@ static void i915_ttm_delayed_free(struct drm_i915_gem_object *obj)
 	ttm_bo_put(i915_gem_to_ttm(obj));
 }
 
-static const struct drm_i915_gem_object_ops i915_gem_ttm_obj_ops = {
+static vm_fault_t vm_fault_ttm(struct vm_fault *vmf)
+{
+	struct vm_area_struct *area = vmf->vma;
+	struct i915_mmap_offset *mmo = area->vm_private_data;
+	struct drm_i915_gem_object *obj = mmo->obj;
+	vm_fault_t ret;
+
+	/* Sanity check that we allow writing into this object */
+	if (unlikely(i915_gem_object_is_readonly(obj) &&
+		     area->vm_flags & VM_WRITE))
+		return VM_FAULT_SIGBUS;
+
+	ret = ttm_bo_vm_reserve(i915_gem_to_ttm(obj), vmf);
+	if (ret)
+		return ret;
+
+	ret = ttm_bo_vm_fault_reserved(i915_gem_to_ttm(obj), vmf,
+				       drm_vma_node_start(&mmo->vma_node),
+				       vmf->vma->vm_page_prot,
+				       TTM_BO_VM_NUM_PREFAULT, 1);
+	if (ret == VM_FAULT_RETRY && !(vmf->flags & FAULT_FLAG_RETRY_NOWAIT))
+		return ret;
+
+	dma_resv_unlock(obj->base.resv);
+
+	return ret;
+}
+
+static int
+vm_access_ttm(struct vm_area_struct *area, unsigned long addr,
+	  void *buf, int len, int write)
+{
+	struct i915_mmap_offset *mmo = area->vm_private_data;
+	struct drm_i915_gem_object *obj = mmo->obj;
+	int err = 0;
+
+	if (i915_gem_object_is_readonly(obj) && write)
+		return -EACCES;
+
+	addr -= area->vm_start;
+	if (addr >= obj->base.size)
+		return -EINVAL;
+
+	err = i915_gem_object_lock_interruptible(obj, NULL);
+	if (err)
+		return err;
+
+	len = ttm_bo_vm_access_reserved(i915_gem_to_ttm(obj), area,
+					addr, buf, len, write);
+	i915_gem_object_unlock(obj);
+
+	return len;
+}
+
+static const struct vm_operations_struct vm_ops_ttm = {
+	.fault = vm_fault_ttm,
+	.access = vm_access_ttm,
+	.open = i915_gem_mmap_vm_open,
+	.close = i915_gem_mmap_vm_close,
+};
+
+const struct drm_i915_gem_object_ops i915_gem_ttm_obj_ops = {
 	.name = "i915_gem_object_ttm",
 	.flags = I915_GEM_OBJECT_HAS_IOMEM,
 
@@ -463,6 +565,7 @@ static const struct drm_i915_gem_object_ops i915_gem_ttm_obj_ops = {
 	.truncate = i915_ttm_purge,
 	.adjust_lru = i915_ttm_adjust_lru,
 	.delayed_free = i915_ttm_delayed_free,
+	.mmap_ops = &vm_ops_ttm,
 };
 
 void i915_ttm_bo_destroy(struct ttm_buffer_object *bo)
-- 
2.31.1

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  parent reply	other threads:[~2021-05-18  8:28 UTC|newest]

Thread overview: 62+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-18  8:26 [Intel-gfx] [PATCH v2 00/15] drm/i915: Move LMEM (VRAM) management over to TTM Thomas Hellström
2021-05-18  8:26 ` [Intel-gfx] [PATCH v2 01/15] drm/i915: Untangle the vma pages_mutex Thomas Hellström
2021-05-18 11:12   ` Maarten Lankhorst
2021-05-18 11:28     ` Thomas Hellström
2021-05-18  8:26 ` [Intel-gfx] [PATCH v2 02/15] drm/i915: Don't free shared locks while shared Thomas Hellström
2021-05-18 11:18   ` Maarten Lankhorst
2021-05-18 11:30     ` Thomas Hellström (Intel)
2021-05-18  8:26 ` [Intel-gfx] [PATCH v2 03/15] drm/i915: Fix i915_sg_page_sizes to record dma segments rather than physical pages Thomas Hellström
2021-05-18  8:46   ` Matthew Auld
2021-05-18  8:26 ` [Intel-gfx] [PATCH v2 04/15] drm/ttm: Export functions to initialize and finalize the ttm range manager standalone Thomas Hellström
2021-05-18  9:03   ` Daniel Vetter
2021-05-18 11:51   ` Christian König
2021-05-18 13:06     ` Thomas Hellström
2021-05-18 13:11       ` Christian König
2021-05-18  8:26 ` [Intel-gfx] [PATCH v2 05/15] drm/i915/ttm Initialize the ttm device and memory managers Thomas Hellström
2021-05-18  9:05   ` Matthew Auld
2021-05-18  9:09   ` Matthew Auld
2021-05-18  9:12     ` Thomas Hellström
2021-05-18  8:26 ` [Intel-gfx] [PATCH v2 06/15] drm/i915/ttm: Embed a ttm buffer object in the i915 gem object Thomas Hellström
2021-05-18 11:44   ` Maarten Lankhorst
2021-05-18  8:26 ` [Intel-gfx] [PATCH v2 07/15] drm/ttm: Export ttm_bo_tt_destroy() Thomas Hellström
2021-05-18 11:46   ` Maarten Lankhorst
2021-05-18 12:01   ` Christian König
2021-05-18  8:26 ` [Intel-gfx] [PATCH v2 08/15] drm/i915/ttm Add a generic TTM memcpy move for page-based iomem Thomas Hellström
2021-05-18 11:55   ` Christian König
2021-05-18 12:04     ` Thomas Hellström
2021-05-18 12:09       ` Christian König
2021-05-18 12:52         ` Thomas Hellström
2021-05-18 13:08           ` Christian König
2021-05-18 13:24             ` Thomas Hellström
2021-05-18 13:26               ` Christian König
2021-05-18  8:26 ` [Intel-gfx] [PATCH v2 09/15] drm/ttm, drm/amdgpu: Allow the driver some control over swapping Thomas Hellström
2021-05-18 12:19   ` Maarten Lankhorst
2021-05-18 15:15   ` Thomas Hellström
2021-05-18 15:18     ` Christian König
2021-05-18 15:20       ` Thomas Hellström
2021-05-18 15:28         ` Christian König
2021-05-18 15:38           ` Thomas Hellström
2021-05-18 15:42             ` Christian König
2021-05-18 16:07               ` Thomas Hellström
2021-05-18 16:30                 ` Christian König
2021-05-19  6:27                   ` Thomas Hellström
2021-05-19 10:43                     ` Christian König
2021-05-18  8:26 ` [Intel-gfx] [PATCH v2 10/15] drm/i915/ttm: Introduce a TTM i915 gem object backend Thomas Hellström
2021-05-19  9:53   ` Matthew Auld
2021-05-19 11:29     ` Thomas Hellström
2021-05-18  8:26 ` [Intel-gfx] [PATCH v2 11/15] drm/i915/lmem: Verify checks for lmem residency Thomas Hellström
2021-05-19 10:04   ` Matthew Auld
2021-05-18  8:26 ` [Intel-gfx] [PATCH v2 12/15] drm/i915: Disable mmap ioctl for gen12+ Thomas Hellström
2021-05-18  8:41   ` Thomas Hellström
2021-05-18  8:26 ` [Intel-gfx] [PATCH v2 13/15] drm/ttm: Add BO and offset arguments for vm_access and vm_fault ttm handlers Thomas Hellström
2021-05-18  8:59   ` Thomas Hellström
2021-05-18 11:59     ` Christian König
2021-05-18 14:59       ` Thomas Hellström
2021-05-18  8:27 ` Thomas Hellström [this message]
2021-05-18  9:17   ` [Intel-gfx] [PATCH v2 14/15] drm/i915: Use ttm mmap handling for ttm bo's Thomas Hellström
2021-05-18  8:27 ` [Intel-gfx] [PATCH v2 15/15] drm/i915/ttm: Add io sgt caching to i915_ttm_io_mem_pfn Thomas Hellström
2021-05-18  9:33   ` Thomas Hellström
2021-05-18  8:44 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Move LMEM (VRAM) management over to TTM (rev2) Patchwork
2021-05-18  8:47 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-05-18  9:14 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-05-18 17:02 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork

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