Intel-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>
To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v2 15/15] drm/i915/ttm: Add io sgt caching to i915_ttm_io_mem_pfn
Date: Tue, 18 May 2021 10:27:01 +0200	[thread overview]
Message-ID: <20210518082701.997251-16-thomas.hellstrom@linux.intel.com> (raw)
In-Reply-To: <20210518082701.997251-1-thomas.hellstrom@linux.intel.com>

From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>

Instead of walking the sg table manually, use our caching helpers
to do the sgt caching. To prevent lifetime issues of ttm_bo vs
i915_gem_object, we will use a separate member, instead of re-using
the dma page member.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
---
 drivers/gpu/drm/i915/gem/i915_gem_object.h    |  6 +--
 .../gpu/drm/i915/gem/i915_gem_object_types.h  |  1 +
 drivers/gpu/drm/i915/gem/i915_gem_pages.c     |  3 +-
 drivers/gpu/drm/i915/gem/i915_gem_ttm.c       | 46 ++++++++++---------
 4 files changed, 30 insertions(+), 26 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h b/drivers/gpu/drm/i915/gem/i915_gem_object.h
index a3ad8cf4eefd..ff59e6c640e6 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h
@@ -342,14 +342,14 @@ struct scatterlist *
 __i915_gem_object_get_sg(struct drm_i915_gem_object *obj,
 			 struct i915_gem_object_page_iter *iter,
 			 unsigned int n,
-			 unsigned int *offset, bool allow_alloc);
+			 unsigned int *offset, bool allow_alloc, bool dma);
 
 static inline struct scatterlist *
 i915_gem_object_get_sg(struct drm_i915_gem_object *obj,
 		       unsigned int n,
 		       unsigned int *offset, bool allow_alloc)
 {
-	return __i915_gem_object_get_sg(obj, &obj->mm.get_page, n, offset, allow_alloc);
+	return __i915_gem_object_get_sg(obj, &obj->mm.get_page, n, offset, allow_alloc, false);
 }
 
 static inline struct scatterlist *
@@ -357,7 +357,7 @@ i915_gem_object_get_sg_dma(struct drm_i915_gem_object *obj,
 			   unsigned int n,
 			   unsigned int *offset, bool allow_alloc)
 {
-	return __i915_gem_object_get_sg(obj, &obj->mm.get_dma_page, n, offset, allow_alloc);
+	return __i915_gem_object_get_sg(obj, &obj->mm.get_dma_page, n, offset, allow_alloc, true);
 }
 
 struct page *
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
index 31d828e91cf4..828310802b9f 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
@@ -324,6 +324,7 @@ struct drm_i915_gem_object {
 
 	struct {
 		struct sg_table *cached_io_st;
+		struct i915_gem_object_page_iter get_io_page;
 	} ttm;
 
 	/** Record of address bit 17 of each page at last unbind. */
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
index 62ee2185a41b..577352b4f2f6 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
@@ -465,9 +465,8 @@ __i915_gem_object_get_sg(struct drm_i915_gem_object *obj,
 			 struct i915_gem_object_page_iter *iter,
 			 unsigned int n,
 			 unsigned int *offset,
-			 bool allow_alloc)
+			 bool allow_alloc, bool dma)
 {
-	const bool dma = iter == &obj->mm.get_dma_page;
 	struct scatterlist *sg;
 	unsigned int idx, count;
 
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
index fe9ac50b2470..1eaefb89e859 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
@@ -167,11 +167,20 @@ static int i915_ttm_move_notify(struct ttm_buffer_object *bo)
 
 static void i915_ttm_free_cached_io_st(struct drm_i915_gem_object *obj)
 {
-	if (obj->ttm.cached_io_st) {
-		sg_free_table(obj->ttm.cached_io_st);
-		kfree(obj->ttm.cached_io_st);
-		obj->ttm.cached_io_st = NULL;
-	}
+	struct radix_tree_iter iter;
+	void __rcu **slot;
+
+	if (!obj->ttm.cached_io_st)
+		return;
+
+	rcu_read_lock();
+	radix_tree_for_each_slot(slot, &obj->ttm.get_io_page.radix, &iter, 0)
+		radix_tree_delete(&obj->ttm.get_io_page.radix, iter.index);
+	rcu_read_unlock();
+
+	sg_free_table(obj->ttm.cached_io_st);
+	kfree(obj->ttm.cached_io_st);
+	obj->ttm.cached_io_st = NULL;
 }
 
 static void i915_ttm_purge(struct drm_i915_gem_object *obj)
@@ -340,8 +349,11 @@ static int i915_ttm_move(struct ttm_buffer_object *bo, bool evict,
 	i915_ttm_move_memcpy(bo, new_mem, new_iter, old_iter);
 	i915_ttm_free_cached_io_st(obj);
 
-	if (!new_man->use_tt)
+	if (!new_man->use_tt) {
 		obj->ttm.cached_io_st = new_st;
+		obj->ttm.get_io_page.sg_pos = new_st->sgl;
+		obj->ttm.get_io_page.sg_idx = 0;
+	}
 
 	return 0;
 }
@@ -362,26 +374,15 @@ static unsigned long i915_ttm_io_mem_pfn(struct ttm_buffer_object *bo,
 					 unsigned long page_offset)
 {
 	struct drm_i915_gem_object *obj = i915_ttm_to_gem(bo);
-	struct sg_table *sgt = obj->ttm.cached_io_st;
+	unsigned long base = obj->mm.region->iomap.base - obj->mm.region->region.start;
 	struct scatterlist *sg;
-	unsigned int i;
+	unsigned int ofs;
 
 	GEM_WARN_ON(bo->ttm);
 
-	for_each_sgtable_dma_sg(sgt, sg, i) {
-		unsigned long sg_max = sg->length >> PAGE_SHIFT;
+	sg = __i915_gem_object_get_sg(obj, &obj->ttm.get_io_page, page_offset, &ofs, true, true);
 
-		if (page_offset < sg_max) {
-			unsigned long base =
-				obj->mm.region->iomap.base - obj->mm.region->region.start;
-
-			return ((base + sg_dma_address(sg)) >> PAGE_SHIFT) + page_offset;
-		}
-
-		page_offset -= sg_max;
-	}
-	GEM_BUG_ON(1);
-	return 0;
+	return ((base + sg_dma_address(sg)) >> PAGE_SHIFT) + ofs;
 }
 
 struct ttm_device_funcs i915_ttm_bo_driver = {
@@ -613,6 +614,9 @@ int __i915_gem_ttm_object_init(struct intel_memory_region *mem,
 	obj->read_domains = I915_GEM_DOMAIN_WC | I915_GEM_DOMAIN_GTT;
 	i915_gem_object_set_cache_coherency(obj, I915_CACHE_NONE);
 
+	INIT_RADIX_TREE(&obj->ttm.get_io_page.radix, GFP_KERNEL | __GFP_NOWARN);
+	mutex_init(&obj->ttm.get_io_page.lock);
+
 	ret = ttm_bo_init(&i915->bdev, i915_gem_to_ttm(obj), size,
 			  ttm_bo_type_kernel, &i915_sys_placement, alignment,
 			  true, NULL, NULL, i915_ttm_bo_destroy);
-- 
2.31.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2021-05-18  8:28 UTC|newest]

Thread overview: 62+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-18  8:26 [Intel-gfx] [PATCH v2 00/15] drm/i915: Move LMEM (VRAM) management over to TTM Thomas Hellström
2021-05-18  8:26 ` [Intel-gfx] [PATCH v2 01/15] drm/i915: Untangle the vma pages_mutex Thomas Hellström
2021-05-18 11:12   ` Maarten Lankhorst
2021-05-18 11:28     ` Thomas Hellström
2021-05-18  8:26 ` [Intel-gfx] [PATCH v2 02/15] drm/i915: Don't free shared locks while shared Thomas Hellström
2021-05-18 11:18   ` Maarten Lankhorst
2021-05-18 11:30     ` Thomas Hellström (Intel)
2021-05-18  8:26 ` [Intel-gfx] [PATCH v2 03/15] drm/i915: Fix i915_sg_page_sizes to record dma segments rather than physical pages Thomas Hellström
2021-05-18  8:46   ` Matthew Auld
2021-05-18  8:26 ` [Intel-gfx] [PATCH v2 04/15] drm/ttm: Export functions to initialize and finalize the ttm range manager standalone Thomas Hellström
2021-05-18  9:03   ` Daniel Vetter
2021-05-18 11:51   ` Christian König
2021-05-18 13:06     ` Thomas Hellström
2021-05-18 13:11       ` Christian König
2021-05-18  8:26 ` [Intel-gfx] [PATCH v2 05/15] drm/i915/ttm Initialize the ttm device and memory managers Thomas Hellström
2021-05-18  9:05   ` Matthew Auld
2021-05-18  9:09   ` Matthew Auld
2021-05-18  9:12     ` Thomas Hellström
2021-05-18  8:26 ` [Intel-gfx] [PATCH v2 06/15] drm/i915/ttm: Embed a ttm buffer object in the i915 gem object Thomas Hellström
2021-05-18 11:44   ` Maarten Lankhorst
2021-05-18  8:26 ` [Intel-gfx] [PATCH v2 07/15] drm/ttm: Export ttm_bo_tt_destroy() Thomas Hellström
2021-05-18 11:46   ` Maarten Lankhorst
2021-05-18 12:01   ` Christian König
2021-05-18  8:26 ` [Intel-gfx] [PATCH v2 08/15] drm/i915/ttm Add a generic TTM memcpy move for page-based iomem Thomas Hellström
2021-05-18 11:55   ` Christian König
2021-05-18 12:04     ` Thomas Hellström
2021-05-18 12:09       ` Christian König
2021-05-18 12:52         ` Thomas Hellström
2021-05-18 13:08           ` Christian König
2021-05-18 13:24             ` Thomas Hellström
2021-05-18 13:26               ` Christian König
2021-05-18  8:26 ` [Intel-gfx] [PATCH v2 09/15] drm/ttm, drm/amdgpu: Allow the driver some control over swapping Thomas Hellström
2021-05-18 12:19   ` Maarten Lankhorst
2021-05-18 15:15   ` Thomas Hellström
2021-05-18 15:18     ` Christian König
2021-05-18 15:20       ` Thomas Hellström
2021-05-18 15:28         ` Christian König
2021-05-18 15:38           ` Thomas Hellström
2021-05-18 15:42             ` Christian König
2021-05-18 16:07               ` Thomas Hellström
2021-05-18 16:30                 ` Christian König
2021-05-19  6:27                   ` Thomas Hellström
2021-05-19 10:43                     ` Christian König
2021-05-18  8:26 ` [Intel-gfx] [PATCH v2 10/15] drm/i915/ttm: Introduce a TTM i915 gem object backend Thomas Hellström
2021-05-19  9:53   ` Matthew Auld
2021-05-19 11:29     ` Thomas Hellström
2021-05-18  8:26 ` [Intel-gfx] [PATCH v2 11/15] drm/i915/lmem: Verify checks for lmem residency Thomas Hellström
2021-05-19 10:04   ` Matthew Auld
2021-05-18  8:26 ` [Intel-gfx] [PATCH v2 12/15] drm/i915: Disable mmap ioctl for gen12+ Thomas Hellström
2021-05-18  8:41   ` Thomas Hellström
2021-05-18  8:26 ` [Intel-gfx] [PATCH v2 13/15] drm/ttm: Add BO and offset arguments for vm_access and vm_fault ttm handlers Thomas Hellström
2021-05-18  8:59   ` Thomas Hellström
2021-05-18 11:59     ` Christian König
2021-05-18 14:59       ` Thomas Hellström
2021-05-18  8:27 ` [Intel-gfx] [PATCH v2 14/15] drm/i915: Use ttm mmap handling for ttm bo's Thomas Hellström
2021-05-18  9:17   ` Thomas Hellström
2021-05-18  8:27 ` Thomas Hellström [this message]
2021-05-18  9:33   ` [Intel-gfx] [PATCH v2 15/15] drm/i915/ttm: Add io sgt caching to i915_ttm_io_mem_pfn Thomas Hellström
2021-05-18  8:44 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Move LMEM (VRAM) management over to TTM (rev2) Patchwork
2021-05-18  8:47 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-05-18  9:14 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-05-18 17:02 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210518082701.997251-16-thomas.hellstrom@linux.intel.com \
    --to=thomas.hellstrom@linux.intel.com \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox