From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: iommu@lists.linux-foundation.org,
David Woodhouse <dwmw2@infradead.org>,
Lu Baolu <baolu.lu@linux.intel.com>
Subject: [Intel-gfx] [PATCH 1/4] iommu/vt-d: Disable superpage for Geminilake igfx
Date: Fri, 9 Jul 2021 19:47:47 +0300 [thread overview]
Message-ID: <20210709164750.9465-2-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20210709164750.9465-1-ville.syrjala@linux.intel.com>
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
While running "gem_exec_big --r single" from igt-gpu-tools on
Geminilake as soon as a 2M mapping is made I tend to get a DMAR
write fault. Strangely the faulting address is always a 4K page
and usually very far away from the 2M page that got mapped.
But if no 2M mappings get used I can't reproduce the fault.
I also tried to dump the PTE for the faulting address but it actually
looks correct to me (ie. definitely seems to have the write bit set):
DMAR: DRHD: handling fault status reg 2
DMAR: [DMA Write] Request device [00:02.0] PASID ffffffff fault addr 7fa8a78000 [fault reason 05] PTE Write access is not set
DMAR: fault 7fa8a78000 (level=1) PTE = 149efc003
So not really sure what's going on and this might just be full on duct
tape, but it seems to work here. The machine has now survived a whole day
running that test whereas with superpage enabled it fails in less than
a minute usually.
TODO: might be nice to disable superpage only for the igfx iommu
instead of both iommus
TODO: would be nice to use the macros from include/drm/i915_pciids.h,
but can't do that with DECLARE_PCI_FIXUP_HEADER()
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Lu Baolu <baolu.lu@linux.intel.com>
Cc: iommu@lists.linux-foundation.org
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/iommu/intel/iommu.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
index 19c7888cbb86..4fff2c9c86af 100644
--- a/drivers/iommu/intel/iommu.c
+++ b/drivers/iommu/intel/iommu.c
@@ -5617,6 +5617,16 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1632, quirk_iommu_igfx);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x163A, quirk_iommu_igfx);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x163D, quirk_iommu_igfx);
+static void quirk_iommu_nosp(struct pci_dev *dev)
+{
+ pci_info(dev, "Disabling IOMMU superpage for graphics on this chipset\n");
+ intel_iommu_superpage = 0;
+}
+
+/* Geminilake igfx appears to have issues with superpage */
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x3184, quirk_iommu_nosp);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x3185, quirk_iommu_nosp);
+
static void quirk_iommu_rwbf(struct pci_dev *dev)
{
if (risky_device(dev))
--
2.31.1
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next prev parent reply other threads:[~2021-07-09 16:48 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-09 16:47 [Intel-gfx] [PATCH 0/4] iommu/vt-d: Disable igfx iommu superpage on bxt/skl/glk Ville Syrjala
2021-07-09 16:47 ` Ville Syrjala [this message]
2021-07-11 23:23 ` [Intel-gfx] [PATCH 1/4] iommu/vt-d: Disable superpage for Geminilake igfx Lu Baolu
2021-07-12 15:47 ` Ville Syrjälä
2021-07-13 1:34 ` Lu Baolu
2021-07-13 20:30 ` Ville Syrjälä
2021-07-14 1:31 ` Lu Baolu
2021-07-09 16:47 ` [Intel-gfx] [PATCH 2/4] iommu/vt-d: Disable superpage for Broxton igfx Ville Syrjala
2021-07-09 16:47 ` [Intel-gfx] [PATCH 3/4] iommu/vt-d: Disable superpage for Skylake igfx Ville Syrjala
2021-07-09 16:47 ` [Intel-gfx] [PATCH 4/4] drm/i915/fbc: Allow FBC + VT-d on SKL/BXT Ville Syrjala
2021-07-09 18:12 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for iommu/vt-d: Disable igfx iommu superpage on bxt/skl/glk Patchwork
2021-07-09 18:38 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-07-10 12:52 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-07-13 1:59 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for iommu/vt-d: Disable igfx iommu superpage on bxt/skl/glk (rev2) Patchwork
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