Re: [Intel-gfx] [PATCH 1/4] iommu/vt-d: Disable superpage for Geminilake igfx

From: Lu Baolu <baolu.lu@linux.intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
	intel-gfx@lists.freedesktop.org
Cc: iommu@lists.linux-foundation.org,
	David Woodhouse <dwmw2@infradead.org>,
	baolu.lu@linux.intel.com
Subject: Re: [Intel-gfx] [PATCH 1/4] iommu/vt-d: Disable superpage for Geminilake igfx
Date: Mon, 12 Jul 2021 07:23:07 +0800	[thread overview]
Message-ID: <ab04666c-229c-fbd2-07f3-6955b46985db@linux.intel.com> (raw)
In-Reply-To: <20210709164750.9465-2-ville.syrjala@linux.intel.com>

On 7/10/21 12:47 AM, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> While running "gem_exec_big --r single" from igt-gpu-tools on
> Geminilake as soon as a 2M mapping is made I tend to get a DMAR
> write fault. Strangely the faulting address is always a 4K page
> and usually very far away from the 2M page that got mapped.
> But if no 2M mappings get used I can't reproduce the fault.
> 
> I also tried to dump the PTE for the faulting address but it actually
> looks correct to me (ie. definitely seems to have the write bit set):
>   DMAR: DRHD: handling fault status reg 2
>   DMAR: [DMA Write] Request device [00:02.0] PASID ffffffff fault addr 7fa8a78000 [fault reason 05] PTE Write access is not set
>   DMAR: fault 7fa8a78000 (level=1) PTE = 149efc003
> 
> So not really sure what's going on and this might just be full on duct
> tape, but it seems to work here. The machine has now survived a whole day
> running that test whereas with superpage enabled it fails in less than
> a minute usually.
> 
> TODO: might be nice to disable superpage only for the igfx iommu
>        instead of both iommus

If all these quirks are about igfx dedicated iommu's, I would suggest to
disable superpage only for the igfx ones.

Best regards,
baolu

> TODO: would be nice to use the macros from include/drm/i915_pciids.h,
>        but can't do that with DECLARE_PCI_FIXUP_HEADER()
> 
> Cc: David Woodhouse <dwmw2@infradead.org>
> Cc: Lu Baolu <baolu.lu@linux.intel.com>
> Cc: iommu@lists.linux-foundation.org
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>   drivers/iommu/intel/iommu.c | 10 ++++++++++
>   1 file changed, 10 insertions(+)
> 
> diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
> index 19c7888cbb86..4fff2c9c86af 100644
> --- a/drivers/iommu/intel/iommu.c
> +++ b/drivers/iommu/intel/iommu.c
> @@ -5617,6 +5617,16 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1632, quirk_iommu_igfx);
>   DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x163A, quirk_iommu_igfx);
>   DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x163D, quirk_iommu_igfx);
>   
> +static void quirk_iommu_nosp(struct pci_dev *dev)
> +{
> +	pci_info(dev, "Disabling IOMMU superpage for graphics on this chipset\n");
> +	intel_iommu_superpage = 0;
> +}
> +
> +/* Geminilake igfx appears to have issues with superpage */
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x3184, quirk_iommu_nosp);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x3185, quirk_iommu_nosp);
> +
>   static void quirk_iommu_rwbf(struct pci_dev *dev)
>   {
>   	if (risky_device(dev))
> 
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