From: Lu Baolu <baolu.lu@linux.intel.com>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org,
David Woodhouse <dwmw2@infradead.org>,
iommu@lists.linux-foundation.org, baolu.lu@linux.intel.com
Subject: Re: [Intel-gfx] [PATCH 1/4] iommu/vt-d: Disable superpage for Geminilake igfx
Date: Wed, 14 Jul 2021 09:31:42 +0800 [thread overview]
Message-ID: <c7aa02e6-3023-24cf-adf6-e01a529b1324@linux.intel.com> (raw)
In-Reply-To: <YO330qFZi58X36PJ@intel.com>
On 7/14/21 4:30 AM, Ville Syrjälä wrote:
> On Tue, Jul 13, 2021 at 09:34:09AM +0800, Lu Baolu wrote:
>> On 7/12/21 11:47 PM, Ville Syrjälä wrote:
>>> On Mon, Jul 12, 2021 at 07:23:07AM +0800, Lu Baolu wrote:
>>>> On 7/10/21 12:47 AM, Ville Syrjala wrote:
>>>>> From: Ville Syrjälä<ville.syrjala@linux.intel.com>
>>>>>
>>>>> While running "gem_exec_big --r single" from igt-gpu-tools on
>>>>> Geminilake as soon as a 2M mapping is made I tend to get a DMAR
>>>>> write fault. Strangely the faulting address is always a 4K page
>>>>> and usually very far away from the 2M page that got mapped.
>>>>> But if no 2M mappings get used I can't reproduce the fault.
>>>>>
>>>>> I also tried to dump the PTE for the faulting address but it actually
>>>>> looks correct to me (ie. definitely seems to have the write bit set):
>>>>> DMAR: DRHD: handling fault status reg 2
>>>>> DMAR: [DMA Write] Request device [00:02.0] PASID ffffffff fault addr 7fa8a78000 [fault reason 05] PTE Write access is not set
>>>>> DMAR: fault 7fa8a78000 (level=1) PTE = 149efc003
>>>>>
>>>>> So not really sure what's going on and this might just be full on duct
>>>>> tape, but it seems to work here. The machine has now survived a whole day
>>>>> running that test whereas with superpage enabled it fails in less than
>>>>> a minute usually.
>>>>>
>>>>> TODO: might be nice to disable superpage only for the igfx iommu
>>>>> instead of both iommus
>>>> If all these quirks are about igfx dedicated iommu's, I would suggest to
>>>> disable superpage only for the igfx ones.
>>> Sure. Unfortunately there's no convenient mechanism to do that in
>>> the iommu driver that I can immediately see. So not something I
>>> can just whip up easily. Since you're actually familiar with the
>>> driver maybe you can come up with a decent solution for that?
>>>
>> How about something like below? [no compile, no test...]
>>
>> diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
>> index 1131b8efb050..2d51ef288a9e 100644
>> --- a/drivers/iommu/intel/iommu.c
>> +++ b/drivers/iommu/intel/iommu.c
>> @@ -338,6 +338,7 @@ static int intel_iommu_strict;
>> static int intel_iommu_superpage = 1;
>> static int iommu_identity_mapping;
>> static int iommu_skip_te_disable;
>> +static int iommu_skip_igfx_superpage;
>>
>> #define IDENTMAP_GFX 2
>> #define IDENTMAP_AZALIA 4
>> @@ -652,6 +653,27 @@ static bool domain_update_iommu_snooping(struct
>> intel_iommu *skip)
>> return ret;
>> }
>>
>> +static bool domain_use_super_page(struct dmar_domain *domain)
>> +{
>> + struct dmar_drhd_unit *drhd;
>> + struct intel_iommu *iommu;
>> + bool ret = true;
>> +
>> + if (!intel_iommu_superpage)
>> + return false;
>> +
>> + rcu_read_lock();
>> + for_each_active_iommu(iommu, drhd) {
>> + if (drhd->gfx_dedicated && iommu_skip_igfx_superpage) {
>> + ret = false;
>> + break
> ^
> Missing semicolon. Othwerwise seems to work great here. Thanks.
>
> Are you going to turn this into a proper patch, or do you
> want me to just squash this into my patches and repost?
>
Please go ahead with a new version.
Best regards,
baolu
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next prev parent reply other threads:[~2021-07-14 1:33 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-09 16:47 [Intel-gfx] [PATCH 0/4] iommu/vt-d: Disable igfx iommu superpage on bxt/skl/glk Ville Syrjala
2021-07-09 16:47 ` [Intel-gfx] [PATCH 1/4] iommu/vt-d: Disable superpage for Geminilake igfx Ville Syrjala
2021-07-11 23:23 ` Lu Baolu
2021-07-12 15:47 ` Ville Syrjälä
2021-07-13 1:34 ` Lu Baolu
2021-07-13 20:30 ` Ville Syrjälä
2021-07-14 1:31 ` Lu Baolu [this message]
2021-07-09 16:47 ` [Intel-gfx] [PATCH 2/4] iommu/vt-d: Disable superpage for Broxton igfx Ville Syrjala
2021-07-09 16:47 ` [Intel-gfx] [PATCH 3/4] iommu/vt-d: Disable superpage for Skylake igfx Ville Syrjala
2021-07-09 16:47 ` [Intel-gfx] [PATCH 4/4] drm/i915/fbc: Allow FBC + VT-d on SKL/BXT Ville Syrjala
2021-07-09 18:12 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for iommu/vt-d: Disable igfx iommu superpage on bxt/skl/glk Patchwork
2021-07-09 18:38 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-07-10 12:52 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-07-13 1:59 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for iommu/vt-d: Disable igfx iommu superpage on bxt/skl/glk (rev2) Patchwork
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