From: Imre Deak <imre.deak@intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 5/9] drm/i915: Hoover the level>=n_entries WARN into intel_ddi_level()
Date: Wed, 29 Sep 2021 23:09:03 +0300 [thread overview]
Message-ID: <20210929200903.GG2192289@ideak-desk.fi.intel.com> (raw)
In-Reply-To: <20210927182455.27119-6-ville.syrjala@linux.intel.com>
On Mon, Sep 27, 2021 at 09:24:51PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> All callers of intel_ddi_level() duplicate the check+WARN
> to make sure the returned level is actually present in the
> appropriate buf_trans table. Let's push that stuff into
> intel_ddi_level() so the callers don't have to worry about it.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 27 ++++++++++---------
> drivers/gpu/drm/i915/display/intel_dpio_phy.c | 2 --
> drivers/gpu/drm/i915/display/intel_snps_phy.c | 2 --
> 3 files changed, 15 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 970a796a4f52..0fd67d2487ad 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -141,8 +141,6 @@ static void hsw_prepare_hdmi_ddi_buffers(struct intel_encoder *encoder,
> trans = encoder->get_buf_trans(encoder, crtc_state, &n_entries);
> if (drm_WARN_ON_ONCE(&dev_priv->drm, !trans))
> return;
> - if (drm_WARN_ON_ONCE(&dev_priv->drm, level >= n_entries))
> - level = n_entries - 1;
>
> /* If we're boosting the current, set bit 31 of trans1 */
> if (DISPLAY_VER(dev_priv) == 9 && !IS_BROXTON(dev_priv) &&
> @@ -977,8 +975,6 @@ static void skl_ddi_set_iboost(struct intel_encoder *encoder,
> trans = encoder->get_buf_trans(encoder, crtc_state, &n_entries);
> if (drm_WARN_ON_ONCE(&dev_priv->drm, !trans))
> return;
> - if (drm_WARN_ON_ONCE(&dev_priv->drm, level >= n_entries))
> - level = n_entries - 1;
>
> iboost = trans->entries[level].hsw.i_boost;
> }
> @@ -1037,8 +1033,6 @@ static void icl_ddi_combo_vswing_program(struct intel_encoder *encoder,
> trans = encoder->get_buf_trans(encoder, crtc_state, &n_entries);
> if (drm_WARN_ON_ONCE(&dev_priv->drm, !trans))
> return;
> - if (drm_WARN_ON_ONCE(&dev_priv->drm, level >= n_entries))
> - level = n_entries - 1;
>
> if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP)) {
> struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> @@ -1163,8 +1157,6 @@ static void icl_mg_phy_set_signal_levels(struct intel_encoder *encoder,
> trans = encoder->get_buf_trans(encoder, crtc_state, &n_entries);
> if (drm_WARN_ON_ONCE(&dev_priv->drm, !trans))
> return;
> - if (drm_WARN_ON_ONCE(&dev_priv->drm, level >= n_entries))
> - level = n_entries - 1;
>
> /* Set MG_TX_LINK_PARAMS cri_use_fs32 to 0. */
> for (ln = 0; ln < 2; ln++) {
> @@ -1286,8 +1278,6 @@ static void tgl_dkl_phy_set_signal_levels(struct intel_encoder *encoder,
> trans = encoder->get_buf_trans(encoder, crtc_state, &n_entries);
> if (drm_WARN_ON_ONCE(&dev_priv->drm, !trans))
> return;
> - if (drm_WARN_ON_ONCE(&dev_priv->drm, level >= n_entries))
> - level = n_entries - 1;
>
> dpcnt_mask = (DKL_TX_PRESHOOT_COEFF_MASK |
> DKL_TX_DE_EMPAHSIS_COEFF_MASK |
> @@ -1357,10 +1347,23 @@ static int intel_ddi_dp_level(struct intel_dp *intel_dp)
> int intel_ddi_level(struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state)
> {
> + struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> + const struct intel_ddi_buf_trans *trans;
> + int level, n_entries;
> +
> + trans = encoder->get_buf_trans(encoder, crtc_state, &n_entries);
> + if (drm_WARN_ON_ONCE(&i915->drm, !trans))
> + return 0;
> +
> if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
> - return intel_ddi_hdmi_level(encoder, crtc_state);
> + level = intel_ddi_hdmi_level(encoder, crtc_state);
> else
> - return intel_ddi_dp_level(enc_to_intel_dp(encoder));
> + level = intel_ddi_dp_level(enc_to_intel_dp(encoder));
> +
> + if (drm_WARN_ON_ONCE(&i915->drm, level >= n_entries))
> + level = n_entries - 1;
> +
> + return level;
> }
>
> static void
> diff --git a/drivers/gpu/drm/i915/display/intel_dpio_phy.c b/drivers/gpu/drm/i915/display/intel_dpio_phy.c
> index 4d604e4cfa5d..96650369164d 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpio_phy.c
> +++ b/drivers/gpu/drm/i915/display/intel_dpio_phy.c
> @@ -282,8 +282,6 @@ void bxt_ddi_phy_set_signal_levels(struct intel_encoder *encoder,
> trans = encoder->get_buf_trans(encoder, crtc_state, &n_entries);
> if (drm_WARN_ON_ONCE(&dev_priv->drm, !trans))
> return;
> - if (drm_WARN_ON_ONCE(&dev_priv->drm, level >= n_entries))
> - level = n_entries - 1;
>
> bxt_port_to_phy_channel(dev_priv, encoder->port, &phy, &ch);
>
> diff --git a/drivers/gpu/drm/i915/display/intel_snps_phy.c b/drivers/gpu/drm/i915/display/intel_snps_phy.c
> index f59cc320ce9c..7a9771dbb63f 100644
> --- a/drivers/gpu/drm/i915/display/intel_snps_phy.c
> +++ b/drivers/gpu/drm/i915/display/intel_snps_phy.c
> @@ -64,8 +64,6 @@ void intel_snps_phy_set_signal_levels(struct intel_encoder *encoder,
> trans = encoder->get_buf_trans(encoder, crtc_state, &n_entries);
> if (drm_WARN_ON_ONCE(&dev_priv->drm, !trans))
> return;
> - if (drm_WARN_ON_ONCE(&dev_priv->drm, level < 0 || level >= n_entries))
> - level = n_entries - 1;
>
> for (ln = 0; ln < 4; ln++) {
> u32 val = 0;
> --
> 2.32.0
>
next prev parent reply other threads:[~2021-09-29 20:09 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-27 18:24 [Intel-gfx] [PATCH 0/9] drm/i915: DP per-lane drive settings prep work Ville Syrjala
2021-09-27 18:24 ` [Intel-gfx] [PATCH 1/9] drm/i915: s/ddi_translations/trans/ Ville Syrjala
2021-09-29 16:59 ` Imre Deak
2021-09-27 18:24 ` [Intel-gfx] [PATCH 2/9] drm/i915: Generalize .set_signal_levels() Ville Syrjala
2021-09-29 19:17 ` Imre Deak
2021-09-30 7:33 ` Ville Syrjälä
2021-09-27 18:24 ` [Intel-gfx] [PATCH 3/9] drm/i915: Nuke usless .set_signal_levels() wrappers Ville Syrjala
2021-09-29 19:43 ` Imre Deak
2021-09-27 18:24 ` [Intel-gfx] [PATCH 4/9] drm/i915: De-wrapper bxt_ddi_phy_set_signal_levels() Ville Syrjala
2021-09-29 19:48 ` Imre Deak
2021-09-27 18:24 ` [Intel-gfx] [PATCH 5/9] drm/i915: Hoover the level>=n_entries WARN into intel_ddi_level() Ville Syrjala
2021-09-29 20:09 ` Imre Deak [this message]
2021-09-27 18:24 ` [Intel-gfx] [PATCH 6/9] drm/i915: Nuke intel_ddi_hdmi_num_entries() Ville Syrjala
2021-09-29 20:11 ` Imre Deak
2021-09-27 18:24 ` [Intel-gfx] [PATCH 7/9] drm/i915: Pass the lane to intel_ddi_level() Ville Syrjala
2021-09-29 20:14 ` Imre Deak
2021-09-27 18:24 ` [Intel-gfx] [PATCH 8/9] drm/i915: Prepare link training for per-lane drive settings Ville Syrjala
2021-09-28 21:22 ` [Intel-gfx] [PATCH v2 " Ville Syrjala
2021-09-29 16:54 ` [Intel-gfx] [PATCH v3 " Ville Syrjala
2021-09-29 20:26 ` Imre Deak
2021-09-30 7:07 ` Ville Syrjälä
2021-09-27 18:24 ` [Intel-gfx] [PATCH 9/9] drm/i915: Allow per-lane drive settings with LTTPRs Ville Syrjala
2021-09-29 16:55 ` [Intel-gfx] [PATCH v2 " Ville Syrjala
2021-09-29 20:27 ` Imre Deak
2021-09-27 20:15 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: DP per-lane drive settings prep work Patchwork
2021-09-27 20:16 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-09-27 20:44 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-09-28 1:25 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-09-28 21:54 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: DP per-lane drive settings prep work (rev2) Patchwork
2021-09-28 21:55 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-09-28 22:23 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-09-29 0:54 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-09-29 17:34 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: DP per-lane drive settings prep work (rev4) Patchwork
2021-09-29 17:35 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-09-29 18:05 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-09-29 21:12 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210929200903.GG2192289@ideak-desk.fi.intel.com \
--to=imre.deak@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=ville.syrjala@linux.intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox