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From: Imre Deak <imre.deak@intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 6/9] drm/i915: Nuke intel_ddi_hdmi_num_entries()
Date: Wed, 29 Sep 2021 23:11:47 +0300	[thread overview]
Message-ID: <20210929201147.GH2192289@ideak-desk.fi.intel.com> (raw)
In-Reply-To: <20210927182455.27119-7-ville.syrjala@linux.intel.com>

On Mon, Sep 27, 2021 at 09:24:52PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Since intel_ddi_level() now looks that buf_trans table there's
> no point in having intel_ddi_hdmi_num_entries() around. Just
> roll the necessary bits of locic into
> intel_ddi_hdmi_level()/intel_ddi_level().
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Imre Deak <imre.deak@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c      | 17 +++++-----------
>  .../drm/i915/display/intel_ddi_buf_trans.c    | 20 -------------------
>  .../drm/i915/display/intel_ddi_buf_trans.h    |  4 ----
>  3 files changed, 5 insertions(+), 36 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 0fd67d2487ad..05124bf4abac 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -74,20 +74,13 @@ static const u8 index_to_dp_signal_levels[] = {
>  };
>  
>  static int intel_ddi_hdmi_level(struct intel_encoder *encoder,
> -				const struct intel_crtc_state *crtc_state)
> +				const struct intel_ddi_buf_trans *trans)
>  {
> -	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> -	int n_entries, level, default_entry;
> +	int level;
>  
> -	n_entries = intel_ddi_hdmi_num_entries(encoder, crtc_state, &default_entry);
> -	if (n_entries == 0)
> -		return 0;
>  	level = intel_bios_hdmi_level_shift(encoder);
>  	if (level < 0)
> -		level = default_entry;
> -
> -	if (drm_WARN_ON_ONCE(&dev_priv->drm, level >= n_entries))
> -		level = n_entries - 1;
> +		level = trans->hdmi_default_entry;
>  
>  	return level;
>  }
> @@ -132,7 +125,7 @@ static void hsw_prepare_hdmi_ddi_buffers(struct intel_encoder *encoder,
>  					 const struct intel_crtc_state *crtc_state)
>  {
>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> -	int level = intel_ddi_hdmi_level(encoder, crtc_state);
> +	int level = intel_ddi_level(encoder, crtc_state);
>  	u32 iboost_bit = 0;
>  	int n_entries;
>  	enum port port = encoder->port;
> @@ -1356,7 +1349,7 @@ int intel_ddi_level(struct intel_encoder *encoder,
>  		return 0;
>  
>  	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
> -		level = intel_ddi_hdmi_level(encoder, crtc_state);
> +		level = intel_ddi_hdmi_level(encoder, trans);
>  	else
>  		level = intel_ddi_dp_level(enc_to_intel_dp(encoder));
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
> index 449daba7afb3..a2d39131ea53 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
> @@ -1617,26 +1617,6 @@ dg2_get_snps_buf_trans(struct intel_encoder *encoder,
>  		return intel_get_buf_trans(&dg2_snps_trans, n_entries);
>  }
>  
> -int intel_ddi_hdmi_num_entries(struct intel_encoder *encoder,
> -			       const struct intel_crtc_state *crtc_state,
> -			       int *default_entry)
> -{
> -	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> -	const struct intel_ddi_buf_trans *trans;
> -	int n_entries;
> -
> -	trans = encoder->get_buf_trans(encoder, crtc_state, &n_entries);
> -
> -	if (drm_WARN_ON(&dev_priv->drm, !trans)) {
> -		*default_entry = 0;
> -		return 0;
> -	}
> -
> -	*default_entry = trans->hdmi_default_entry;
> -
> -	return n_entries;
> -}
> -
>  void intel_ddi_buf_trans_init(struct intel_encoder *encoder)
>  {
>  	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
> index 94d338287f61..6cdb8e9073c7 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
> +++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
> @@ -68,10 +68,6 @@ struct intel_ddi_buf_trans {
>  
>  bool is_hobl_buf_trans(const struct intel_ddi_buf_trans *table);
>  
> -int intel_ddi_hdmi_num_entries(struct intel_encoder *encoder,
> -			       const struct intel_crtc_state *crtc_state,
> -			       int *default_entry);
> -
>  void intel_ddi_buf_trans_init(struct intel_encoder *encoder);
>  
>  #endif
> -- 
> 2.32.0
> 

  reply	other threads:[~2021-09-29 20:11 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-27 18:24 [Intel-gfx] [PATCH 0/9] drm/i915: DP per-lane drive settings prep work Ville Syrjala
2021-09-27 18:24 ` [Intel-gfx] [PATCH 1/9] drm/i915: s/ddi_translations/trans/ Ville Syrjala
2021-09-29 16:59   ` Imre Deak
2021-09-27 18:24 ` [Intel-gfx] [PATCH 2/9] drm/i915: Generalize .set_signal_levels() Ville Syrjala
2021-09-29 19:17   ` Imre Deak
2021-09-30  7:33     ` Ville Syrjälä
2021-09-27 18:24 ` [Intel-gfx] [PATCH 3/9] drm/i915: Nuke usless .set_signal_levels() wrappers Ville Syrjala
2021-09-29 19:43   ` Imre Deak
2021-09-27 18:24 ` [Intel-gfx] [PATCH 4/9] drm/i915: De-wrapper bxt_ddi_phy_set_signal_levels() Ville Syrjala
2021-09-29 19:48   ` Imre Deak
2021-09-27 18:24 ` [Intel-gfx] [PATCH 5/9] drm/i915: Hoover the level>=n_entries WARN into intel_ddi_level() Ville Syrjala
2021-09-29 20:09   ` Imre Deak
2021-09-27 18:24 ` [Intel-gfx] [PATCH 6/9] drm/i915: Nuke intel_ddi_hdmi_num_entries() Ville Syrjala
2021-09-29 20:11   ` Imre Deak [this message]
2021-09-27 18:24 ` [Intel-gfx] [PATCH 7/9] drm/i915: Pass the lane to intel_ddi_level() Ville Syrjala
2021-09-29 20:14   ` Imre Deak
2021-09-27 18:24 ` [Intel-gfx] [PATCH 8/9] drm/i915: Prepare link training for per-lane drive settings Ville Syrjala
2021-09-28 21:22   ` [Intel-gfx] [PATCH v2 " Ville Syrjala
2021-09-29 16:54   ` [Intel-gfx] [PATCH v3 " Ville Syrjala
2021-09-29 20:26     ` Imre Deak
2021-09-30  7:07       ` Ville Syrjälä
2021-09-27 18:24 ` [Intel-gfx] [PATCH 9/9] drm/i915: Allow per-lane drive settings with LTTPRs Ville Syrjala
2021-09-29 16:55   ` [Intel-gfx] [PATCH v2 " Ville Syrjala
2021-09-29 20:27     ` Imre Deak
2021-09-27 20:15 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: DP per-lane drive settings prep work Patchwork
2021-09-27 20:16 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-09-27 20:44 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-09-28  1:25 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-09-28 21:54 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: DP per-lane drive settings prep work (rev2) Patchwork
2021-09-28 21:55 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-09-28 22:23 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-09-29  0:54 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-09-29 17:34 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: DP per-lane drive settings prep work (rev4) Patchwork
2021-09-29 17:35 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-09-29 18:05 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-09-29 21:12 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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