From: Matthew Brost <matthew.brost@intel.com>
To: John Harrison <john.c.harrison@intel.com>
Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
daniele.ceraolospurio@intel.com
Subject: Re: [Intel-gfx] [PATCH 14/26] drm/i915/guc: Implement multi-lrc reset
Date: Fri, 8 Oct 2021 10:56:08 -0700 [thread overview]
Message-ID: <20211008175608.GA31079@jons-linux-dev-box> (raw)
In-Reply-To: <2d816209-7c88-8059-ff04-0cb7559f2c2f@intel.com>
On Fri, Oct 08, 2021 at 10:39:35AM -0700, John Harrison wrote:
> On 10/4/2021 15:06, Matthew Brost wrote:
> > Update context and full GPU reset to work with multi-lrc. The idea is
> > parent context tracks all the active requests inflight for itself and
> > its' children. The parent context owns the reset replaying / canceling
> Still its' should be its.
>
Yea. Will fix.
> > requests as needed.
> >
> > v2:
> > (John Harrison)
> > - Simply loop in find active request
> > - Add comments to find ative request / reset loop
> >
> > Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> > ---
> > drivers/gpu/drm/i915/gt/intel_context.c | 15 +++-
> > .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 69 ++++++++++++++-----
> > 2 files changed, 63 insertions(+), 21 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/gt/intel_context.c b/drivers/gpu/drm/i915/gt/intel_context.c
> > index c5bb7ccfb3f8..3b340eb59ada 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_context.c
> > +++ b/drivers/gpu/drm/i915/gt/intel_context.c
> > @@ -528,20 +528,29 @@ struct i915_request *intel_context_create_request(struct intel_context *ce)
> > struct i915_request *intel_context_find_active_request(struct intel_context *ce)
> > {
> > + struct intel_context *parent = intel_context_to_parent(ce);
> > struct i915_request *rq, *active = NULL;
> > unsigned long flags;
> > GEM_BUG_ON(!intel_engine_uses_guc(ce->engine));
> > - spin_lock_irqsave(&ce->guc_state.lock, flags);
> > - list_for_each_entry_reverse(rq, &ce->guc_state.requests,
> > + /*
> > + * We search the parent list to find an active request on the submitted
> > + * context. The parent list contains the requests for all the contexts
> > + * in the relationship so we have to do a compare of each request's
> > + * context must be done.
> "have to do ... must be done" - no need for both.
>
Right, will fix.
> > + */
> > + spin_lock_irqsave(&parent->guc_state.lock, flags);
> > + list_for_each_entry_reverse(rq, &parent->guc_state.requests,
> > sched.link) {
> > + if (rq->context != ce)
> > + continue;
> > if (i915_request_completed(rq))
> > break;
> > active = rq;
> > }
> > - spin_unlock_irqrestore(&ce->guc_state.lock, flags);
> > + spin_unlock_irqrestore(&parent->guc_state.lock, flags);
> > return active;
> > }
> > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> > index 6be7adf89e4f..d661a69ef4f7 100644
> > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> > @@ -681,6 +681,11 @@ static inline int rq_prio(const struct i915_request *rq)
> > return rq->sched.attr.priority;
> > }
> > +static inline bool is_multi_lrc(struct intel_context *ce)
> > +{
> > + return intel_context_is_parallel(ce);
> > +}
> > +
> > static bool is_multi_lrc_rq(struct i915_request *rq)
> > {
> > return intel_context_is_parallel(rq->context);
> > @@ -1214,10 +1219,15 @@ __unwind_incomplete_requests(struct intel_context *ce)
> > static void __guc_reset_context(struct intel_context *ce, bool stalled)
> > {
> > + bool local_stalled;
> > struct i915_request *rq;
> > unsigned long flags;
> > u32 head;
> > + int i, number_children = ce->parallel.number_children;
> > bool skip = false;
> > + struct intel_context *parent = ce;
> > +
> > + GEM_BUG_ON(intel_context_is_child(ce));
> > intel_context_get(ce);
> > @@ -1243,25 +1253,38 @@ static void __guc_reset_context(struct intel_context *ce, bool stalled)
> > if (unlikely(skip))
> > goto out_put;
> > - rq = intel_context_find_active_request(ce);
> > - if (!rq) {
> > - head = ce->ring->tail;
> > - stalled = false;
> > - goto out_replay;
> > - }
> > + /*
> > + * For each context in the relationship find the hanging request
> > + * resetting each context / request as needed
> > + */
> > + for (i = 0; i < number_children + 1; ++i) {
> > + if (!intel_context_is_pinned(ce))
> > + goto next_context;
> > +
> > + local_stalled = false;
> > + rq = intel_context_find_active_request(ce);
> > + if (!rq) {
> > + head = ce->ring->tail;
> > + goto out_replay;
> > + }
> > - if (!i915_request_started(rq))
> > - stalled = false;
> > + GEM_BUG_ON(i915_active_is_idle(&ce->active));
> > + head = intel_ring_wrap(ce->ring, rq->head);
> > - GEM_BUG_ON(i915_active_is_idle(&ce->active));
> > - head = intel_ring_wrap(ce->ring, rq->head);
> > - __i915_request_reset(rq, stalled);
> > + if (i915_request_started(rq))
> I didn't see an answer as to why the started test and the wrap call need to
> be reversed?
>
Sorry, they don't have to be. Can flip this back if you want but either
way works.
Matt
> John.
>
> > + local_stalled = true;
> > + __i915_request_reset(rq, local_stalled && stalled);
> > out_replay:
> > - guc_reset_state(ce, head, stalled);
> > - __unwind_incomplete_requests(ce);
> > + guc_reset_state(ce, head, local_stalled && stalled);
> > +next_context:
> > + if (i != number_children)
> > + ce = list_next_entry(ce, parallel.child_link);
> > + }
> > +
> > + __unwind_incomplete_requests(parent);
> > out_put:
> > - intel_context_put(ce);
> > + intel_context_put(parent);
> > }
> > void intel_guc_submission_reset(struct intel_guc *guc, bool stalled)
> > @@ -1282,7 +1305,8 @@ void intel_guc_submission_reset(struct intel_guc *guc, bool stalled)
> > xa_unlock(&guc->context_lookup);
> > - if (intel_context_is_pinned(ce))
> > + if (intel_context_is_pinned(ce) &&
> > + !intel_context_is_child(ce))
> > __guc_reset_context(ce, stalled);
> > intel_context_put(ce);
> > @@ -1374,7 +1398,8 @@ void intel_guc_submission_cancel_requests(struct intel_guc *guc)
> > xa_unlock(&guc->context_lookup);
> > - if (intel_context_is_pinned(ce))
> > + if (intel_context_is_pinned(ce) &&
> > + !intel_context_is_child(ce))
> > guc_cancel_context_requests(ce);
> > intel_context_put(ce);
> > @@ -2067,6 +2092,8 @@ static struct i915_sw_fence *guc_context_block(struct intel_context *ce)
> > u16 guc_id;
> > bool enabled;
> > + GEM_BUG_ON(intel_context_is_child(ce));
> > +
> > spin_lock_irqsave(&ce->guc_state.lock, flags);
> > incr_context_blocked(ce);
> > @@ -2121,6 +2148,7 @@ static void guc_context_unblock(struct intel_context *ce)
> > bool enable;
> > GEM_BUG_ON(context_enabled(ce));
> > + GEM_BUG_ON(intel_context_is_child(ce));
> > spin_lock_irqsave(&ce->guc_state.lock, flags);
> > @@ -2147,11 +2175,14 @@ static void guc_context_unblock(struct intel_context *ce)
> > static void guc_context_cancel_request(struct intel_context *ce,
> > struct i915_request *rq)
> > {
> > + struct intel_context *block_context =
> > + request_to_scheduling_context(rq);
> > +
> > if (i915_sw_fence_signaled(&rq->submit)) {
> > struct i915_sw_fence *fence;
> > intel_context_get(ce);
> > - fence = guc_context_block(ce);
> > + fence = guc_context_block(block_context);
> > i915_sw_fence_wait(fence);
> > if (!i915_request_completed(rq)) {
> > __i915_request_skip(rq);
> > @@ -2165,7 +2196,7 @@ static void guc_context_cancel_request(struct intel_context *ce,
> > */
> > flush_work(&ce_to_guc(ce)->ct.requests.worker);
> > - guc_context_unblock(ce);
> > + guc_context_unblock(block_context);
> > intel_context_put(ce);
> > }
> > }
> > @@ -2191,6 +2222,8 @@ static void guc_context_ban(struct intel_context *ce, struct i915_request *rq)
> > intel_wakeref_t wakeref;
> > unsigned long flags;
> > + GEM_BUG_ON(intel_context_is_child(ce));
> > +
> > guc_flush_submissions(guc);
> > spin_lock_irqsave(&ce->guc_state.lock, flags);
>
next prev parent reply other threads:[~2021-10-08 18:00 UTC|newest]
Thread overview: 92+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-04 22:06 [Intel-gfx] [PATCH 00/26] Parallel submission aka multi-bb execbuf Matthew Brost
2021-10-04 22:06 ` [Intel-gfx] [PATCH 01/26] drm/i915/guc: Move GuC guc_id allocation under submission state sub-struct Matthew Brost
2021-10-07 3:06 ` John Harrison
2021-10-07 15:05 ` Matthew Brost
2021-10-07 18:13 ` John Harrison
2021-10-04 22:06 ` [Intel-gfx] [PATCH 02/26] drm/i915/guc: Take GT PM ref when deregistering context Matthew Brost
2021-10-07 3:37 ` John Harrison
2021-10-08 1:28 ` Matthew Brost
2021-10-08 18:23 ` Matthew Brost
2021-10-04 22:06 ` [Intel-gfx] [PATCH 03/26] drm/i915/guc: Take engine PM when a context is pinned with GuC submission Matthew Brost
2021-10-07 3:45 ` John Harrison
2021-10-07 15:19 ` Matthew Brost
2021-10-07 18:15 ` John Harrison
2021-10-08 1:23 ` Matthew Brost
2021-10-04 22:06 ` [Intel-gfx] [PATCH 04/26] drm/i915/guc: Don't call switch_to_kernel_context " Matthew Brost
2021-10-07 3:49 ` John Harrison
2021-10-04 22:06 ` [Intel-gfx] [PATCH 05/26] drm/i915: Add logical engine mapping Matthew Brost
2021-10-07 19:03 ` John Harrison
2021-10-04 22:06 ` [Intel-gfx] [PATCH 06/26] drm/i915: Expose logical engine instance to user Matthew Brost
2021-10-04 22:06 ` [Intel-gfx] [PATCH 07/26] drm/i915/guc: Introduce context parent-child relationship Matthew Brost
2021-10-07 19:35 ` John Harrison
2021-10-08 18:33 ` Matthew Brost
2021-10-04 22:06 ` [Intel-gfx] [PATCH 08/26] drm/i915/guc: Add multi-lrc context registration Matthew Brost
2021-10-07 19:50 ` John Harrison
2021-10-08 1:31 ` Matthew Brost
2021-10-08 17:20 ` John Harrison
2021-10-08 17:29 ` Matthew Brost
2021-10-04 22:06 ` [Intel-gfx] [PATCH 09/26] drm/i915/guc: Ensure GuC schedule operations do not operate on child contexts Matthew Brost
2021-10-07 20:23 ` John Harrison
2021-10-04 22:06 ` [Intel-gfx] [PATCH 10/26] drm/i915/guc: Assign contexts in parent-child relationship consecutive guc_ids Matthew Brost
2021-10-07 22:03 ` John Harrison
2021-10-08 1:21 ` Matthew Brost
2021-10-08 16:40 ` John Harrison
2021-10-13 18:03 ` Matthew Brost
2021-10-13 19:11 ` John Harrison
2021-10-04 22:06 ` [Intel-gfx] [PATCH 11/26] drm/i915/guc: Implement parallel context pin / unpin functions Matthew Brost
2021-10-04 22:06 ` [Intel-gfx] [PATCH 12/26] drm/i915/guc: Implement multi-lrc submission Matthew Brost
2021-10-05 7:55 ` kernel test robot
2021-10-05 10:37 ` kernel test robot
2021-10-08 17:20 ` John Harrison
2021-10-13 18:24 ` Matthew Brost
2021-10-04 22:06 ` [Intel-gfx] [PATCH 13/26] drm/i915/guc: Insert submit fences between requests in parent-child relationship Matthew Brost
2021-10-04 22:06 ` [Intel-gfx] [PATCH 14/26] drm/i915/guc: Implement multi-lrc reset Matthew Brost
2021-10-08 17:39 ` John Harrison
2021-10-08 17:56 ` Matthew Brost [this message]
2021-10-04 22:06 ` [Intel-gfx] [PATCH 15/26] drm/i915/guc: Update debugfs for GuC multi-lrc Matthew Brost
2021-10-08 17:46 ` John Harrison
2021-10-04 22:06 ` [Intel-gfx] [PATCH 16/26] drm/i915: Fix bug in user proto-context creation that leaked contexts Matthew Brost
2021-10-08 17:49 ` John Harrison
2021-10-04 22:06 ` [Intel-gfx] [PATCH 17/26] drm/i915/guc: Connect UAPI to GuC multi-lrc interface Matthew Brost
2021-10-11 22:09 ` John Harrison
2021-10-11 22:59 ` Matthew Brost
2021-10-04 22:06 ` [Intel-gfx] [PATCH 18/26] drm/i915/doc: Update parallel submit doc to point to i915_drm.h Matthew Brost
2021-10-04 22:06 ` [Intel-gfx] [PATCH 19/26] drm/i915/guc: Add basic GuC multi-lrc selftest Matthew Brost
2021-10-04 22:06 ` [Intel-gfx] [PATCH 20/26] drm/i915/guc: Implement no mid batch preemption for multi-lrc Matthew Brost
2021-10-11 23:32 ` John Harrison
2021-10-13 1:52 ` Matthew Brost
2021-10-04 22:06 ` [Intel-gfx] [PATCH 21/26] drm/i915: Multi-BB execbuf Matthew Brost
2021-10-05 8:31 ` kernel test robot
2021-10-05 17:02 ` Matthew Brost
2021-10-06 20:46 ` Matthew Brost
2021-10-12 21:22 ` John Harrison
2021-10-13 0:37 ` Matthew Brost
2021-10-04 22:06 ` [Intel-gfx] [PATCH 22/26] drm/i915/guc: Handle errors in multi-lrc requests Matthew Brost
2021-10-12 21:56 ` John Harrison
2021-10-13 0:18 ` Matthew Brost
2021-10-04 22:06 ` [Intel-gfx] [PATCH 23/26] drm/i915: Make request conflict tracking understand parallel submits Matthew Brost
2021-10-12 22:08 ` John Harrison
2021-10-13 0:32 ` Matthew Brost
2021-10-13 19:35 ` John Harrison
2021-10-13 17:51 ` Matthew Brost
2021-10-13 19:25 ` John Harrison
2021-10-04 22:06 ` [Intel-gfx] [PATCH 24/26] drm/i915: Update I915_GEM_BUSY IOCTL to understand composite fences Matthew Brost
2021-10-11 22:15 ` Daniele Ceraolo Spurio
2021-10-12 7:53 ` Tvrtko Ursulin
2021-10-12 18:31 ` Matthew Brost
2021-10-04 22:06 ` [Intel-gfx] [PATCH 25/26] drm/i915: Enable multi-bb execbuf Matthew Brost
2021-10-04 22:06 ` [Intel-gfx] [PATCH 26/26] drm/i915/execlists: Weak parallel submission support for execlists Matthew Brost
2021-10-04 22:21 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Parallel submission aka multi-bb execbuf (rev4) Patchwork
2021-10-12 22:15 ` John Harrison
2021-10-13 0:15 ` Matthew Brost
2021-10-13 19:24 ` John Harrison
2021-10-04 22:23 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-10-04 22:26 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2021-10-12 22:15 ` John Harrison
2021-10-13 0:12 ` Matthew Brost
2021-10-04 22:54 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-10-05 1:49 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Parallel submission aka multi-bb execbuf (rev5) Patchwork
2021-10-05 1:51 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-10-05 1:54 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2021-10-05 2:21 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-10-12 18:11 ` [Intel-gfx] [PATCH 02/26] drm/i915/guc: Take GT PM ref when deregistering context Matthew Brost
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