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* [Intel-gfx] [PATCH 0/2] Tile 4 format support
@ 2022-01-18 11:55 Stanislav Lisovskiy
  2022-01-18 11:55 ` [Intel-gfx] [PATCH 1/2] drm/i915: Introduce new Tile 4 format Stanislav Lisovskiy
                   ` (5 more replies)
  0 siblings, 6 replies; 10+ messages in thread
From: Stanislav Lisovskiy @ 2022-01-18 11:55 UTC (permalink / raw)
  To: intel-gfx; +Cc: m

Tile4 in bspec format is 4K tile organized into
64B subtiles with same basic shape as for legacy TileY.

Stanislav Lisovskiy (2):
  drm/i915: Introduce new Tile 4 format
  drm/i915/dg2: Tile 4 plane format support

 drivers/gpu/drm/i915/display/intel_display.c  |  1 +
 drivers/gpu/drm/i915/display/intel_fb.c       | 15 +++++++++++-
 drivers/gpu/drm/i915/display/intel_fb.h       |  1 +
 drivers/gpu/drm/i915/display/intel_fbc.c      |  1 +
 .../drm/i915/display/intel_plane_initial.c    |  1 +
 .../drm/i915/display/skl_universal_plane.c    | 23 ++++++++++++-------
 drivers/gpu/drm/i915/i915_drv.h               |  1 +
 drivers/gpu/drm/i915/i915_pci.c               |  1 +
 drivers/gpu/drm/i915/i915_reg.h               |  1 +
 drivers/gpu/drm/i915/intel_device_info.h      |  1 +
 drivers/gpu/drm/i915/intel_pm.c               |  1 +
 include/uapi/drm/drm_fourcc.h                 | 11 +++++++++
 12 files changed, 49 insertions(+), 9 deletions(-)

-- 
2.24.1.485.gad05a3d8e5


^ permalink raw reply	[flat|nested] 10+ messages in thread
* [Intel-gfx] [PATCH 1/2] drm/i915: Introduce new Tile 4 format
@ 2021-12-09 10:47 Stanislav Lisovskiy
  2021-12-09 15:14 ` Chery, Nanley G
  0 siblings, 1 reply; 10+ messages in thread
From: Stanislav Lisovskiy @ 2021-12-09 10:47 UTC (permalink / raw)
  To: intel-gfx; +Cc: nanley.g.chery, dri-devel

This tiling layout uses 4KB tiles in a row-major layout. It has the same
shape as Tile Y at two granularities: 4KB (128B x 32) and 64B (16B x 4). It
only differs from Tile Y at the 256B granularity in between. At this
granularity, Tile Y has a shape of 16B x 32 rows, but this tiling has a shape
of 64B x 8 rows.

Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
---
 include/uapi/drm/drm_fourcc.h | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
index 7f652c96845b..a146c6df1066 100644
--- a/include/uapi/drm/drm_fourcc.h
+++ b/include/uapi/drm/drm_fourcc.h
@@ -565,6 +565,17 @@ extern "C" {
  */
 #define I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC fourcc_mod_code(INTEL, 8)
 
+/*
+ * Intel Tile 4 layout
+ *
+ * This is a tiled layout using 4KB tiles in a row-major layout. It has the same
+ * shape as Tile Y at two granularities: 4KB (128B x 32) and 64B (16B x 4). It
+ * only differs from Tile Y at the 256B granularity in between. At this
+ * granularity, Tile Y has a shape of 16B x 32 rows, but this tiling has a shape
+ * of 64B x 8 rows.
+ */
+#define I915_FORMAT_MOD_4_TILED         fourcc_mod_code(INTEL, 9)
+
 /*
  * Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks
  *
-- 
2.24.1.485.gad05a3d8e5


^ permalink raw reply related	[flat|nested] 10+ messages in thread

end of thread, other threads:[~2022-01-18 15:56 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2022-01-18 11:55 [Intel-gfx] [PATCH 0/2] Tile 4 format support Stanislav Lisovskiy
2022-01-18 11:55 ` [Intel-gfx] [PATCH 1/2] drm/i915: Introduce new Tile 4 format Stanislav Lisovskiy
2022-01-18 11:55 ` [Intel-gfx] [PATCH 2/2] drm/i915/dg2: Tile 4 plane format support Stanislav Lisovskiy
2022-01-18 13:03 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Tile 4 format support (rev2) Patchwork
2022-01-18 13:05 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-01-18 13:34 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-01-18 15:56 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2021-12-09 10:47 [Intel-gfx] [PATCH 1/2] drm/i915: Introduce new Tile 4 format Stanislav Lisovskiy
2021-12-09 15:14 ` Chery, Nanley G
2021-12-10 10:09   ` Imre Deak

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