From: Imre Deak <imre.deak@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v2 23/26] drm/i915: Remove the aliasing of power domain enum values
Date: Tue, 8 Feb 2022 13:36:53 +0200 [thread overview]
Message-ID: <20220208113656.179823-24-imre.deak@intel.com> (raw)
In-Reply-To: <20220208113656.179823-1-imre.deak@intel.com>
Aliasing the intel_display_power_domain enum values was required because
of the u64 power domain mask size limit. This makes the dmesg/debugfs
printouts of the domain names somewhat unclear, for instance domain
names for port D are shown on D12+ platforms where the corresponding
port is called TC1. Make this clearer by removing the aliasing which is
possible after a previous patch converting the mask to a bitmap.
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
.../drm/i915/display/intel_display_power.c | 84 +++++++++++++------
.../drm/i915/display/intel_display_power.h | 26 ++----
2 files changed, 67 insertions(+), 43 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 2816c3b1faef0..f6a6e15eca9b1 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -77,12 +77,22 @@ intel_display_power_domain_str(enum intel_display_power_domain domain)
return "PORT_DDI_LANES_E";
case POWER_DOMAIN_PORT_DDI_LANES_F:
return "PORT_DDI_LANES_F";
- case POWER_DOMAIN_PORT_DDI_LANES_G:
- return "PORT_DDI_LANES_G";
- case POWER_DOMAIN_PORT_DDI_LANES_H:
- return "PORT_DDI_LANES_H";
- case POWER_DOMAIN_PORT_DDI_LANES_I:
- return "PORT_DDI_LANES_I";
+ case POWER_DOMAIN_PORT_DDI_LANES_TC1:
+ return "PORT_DDI_LANES_TC1";
+ case POWER_DOMAIN_PORT_DDI_LANES_TC2:
+ return "PORT_DDI_LANES_TC2";
+ case POWER_DOMAIN_PORT_DDI_LANES_TC3:
+ return "PORT_DDI_LANES_TC3";
+ case POWER_DOMAIN_PORT_DDI_LANES_TC4:
+ return "PORT_DDI_LANES_TC4";
+ case POWER_DOMAIN_PORT_DDI_LANES_TC5:
+ return "PORT_DDI_LANES_TC5";
+ case POWER_DOMAIN_PORT_DDI_LANES_TC6:
+ return "PORT_DDI_LANES_TC6";
+ case POWER_DOMAIN_PORT_DDI_LANES_D_XELPD:
+ return "PORT_DDI_LANES_D_XELPD";
+ case POWER_DOMAIN_PORT_DDI_LANES_E_XELPD:
+ return "PORT_DDI_LANES_E_XELPD";
case POWER_DOMAIN_PORT_DDI_IO_A:
return "PORT_DDI_IO_A";
case POWER_DOMAIN_PORT_DDI_IO_B:
@@ -95,12 +105,22 @@ intel_display_power_domain_str(enum intel_display_power_domain domain)
return "PORT_DDI_IO_E";
case POWER_DOMAIN_PORT_DDI_IO_F:
return "PORT_DDI_IO_F";
- case POWER_DOMAIN_PORT_DDI_IO_G:
- return "PORT_DDI_IO_G";
- case POWER_DOMAIN_PORT_DDI_IO_H:
- return "PORT_DDI_IO_H";
- case POWER_DOMAIN_PORT_DDI_IO_I:
- return "PORT_DDI_IO_I";
+ case POWER_DOMAIN_PORT_DDI_IO_TC1:
+ return "PORT_DDI_IO_TC1";
+ case POWER_DOMAIN_PORT_DDI_IO_TC2:
+ return "PORT_DDI_IO_TC2";
+ case POWER_DOMAIN_PORT_DDI_IO_TC3:
+ return "PORT_DDI_IO_TC3";
+ case POWER_DOMAIN_PORT_DDI_IO_TC4:
+ return "PORT_DDI_IO_TC4";
+ case POWER_DOMAIN_PORT_DDI_IO_TC5:
+ return "PORT_DDI_IO_TC5";
+ case POWER_DOMAIN_PORT_DDI_IO_TC6:
+ return "PORT_DDI_IO_TC6";
+ case POWER_DOMAIN_PORT_DDI_IO_D_XELPD:
+ return "PORT_DDI_IO_D_XELPD";
+ case POWER_DOMAIN_PORT_DDI_IO_E_XELPD:
+ return "PORT_DDI_IO_E_XELPD";
case POWER_DOMAIN_PORT_DSI:
return "PORT_DSI";
case POWER_DOMAIN_PORT_CRT:
@@ -125,12 +145,22 @@ intel_display_power_domain_str(enum intel_display_power_domain domain)
return "AUX_E";
case POWER_DOMAIN_AUX_F:
return "AUX_F";
- case POWER_DOMAIN_AUX_G:
- return "AUX_G";
- case POWER_DOMAIN_AUX_H:
- return "AUX_H";
- case POWER_DOMAIN_AUX_I:
- return "AUX_I";
+ case POWER_DOMAIN_AUX_USBC1:
+ return "AUX_USBC1";
+ case POWER_DOMAIN_AUX_USBC2:
+ return "AUX_USBC2";
+ case POWER_DOMAIN_AUX_USBC3:
+ return "AUX_USBC3";
+ case POWER_DOMAIN_AUX_USBC4:
+ return "AUX_USBC4";
+ case POWER_DOMAIN_AUX_USBC5:
+ return "AUX_USBC5";
+ case POWER_DOMAIN_AUX_USBC6:
+ return "AUX_USBC6";
+ case POWER_DOMAIN_AUX_D_XELPD:
+ return "AUX_D_XELPD";
+ case POWER_DOMAIN_AUX_E_XELPD:
+ return "AUX_E_XELPD";
case POWER_DOMAIN_AUX_IO_A:
return "AUX_IO_A";
case POWER_DOMAIN_AUX_TBT_C:
@@ -141,12 +171,18 @@ intel_display_power_domain_str(enum intel_display_power_domain domain)
return "AUX_TBT_E";
case POWER_DOMAIN_AUX_TBT_F:
return "AUX_TBT_F";
- case POWER_DOMAIN_AUX_TBT_G:
- return "AUX_TBT_G";
- case POWER_DOMAIN_AUX_TBT_H:
- return "AUX_TBT_H";
- case POWER_DOMAIN_AUX_TBT_I:
- return "AUX_TBT_I";
+ case POWER_DOMAIN_AUX_TBT1:
+ return "AUX_TBT1";
+ case POWER_DOMAIN_AUX_TBT2:
+ return "AUX_TBT2";
+ case POWER_DOMAIN_AUX_TBT3:
+ return "AUX_TBT3";
+ case POWER_DOMAIN_AUX_TBT4:
+ return "AUX_TBT4";
+ case POWER_DOMAIN_AUX_TBT5:
+ return "AUX_TBT5";
+ case POWER_DOMAIN_AUX_TBT6:
+ return "AUX_TBT6";
case POWER_DOMAIN_GMBUS:
return "GMBUS";
case POWER_DOMAIN_INIT:
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h
index 5ede1146b1582..3c555cb05c9c6 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.h
+++ b/drivers/gpu/drm/i915/display/intel_display_power.h
@@ -48,18 +48,15 @@ enum intel_display_power_domain {
POWER_DOMAIN_PORT_DDI_LANES_D,
POWER_DOMAIN_PORT_DDI_LANES_E,
POWER_DOMAIN_PORT_DDI_LANES_F,
- POWER_DOMAIN_PORT_DDI_LANES_G,
- POWER_DOMAIN_PORT_DDI_LANES_H,
- POWER_DOMAIN_PORT_DDI_LANES_I,
- POWER_DOMAIN_PORT_DDI_LANES_TC1 = POWER_DOMAIN_PORT_DDI_LANES_D, /* tgl+ */
+ POWER_DOMAIN_PORT_DDI_LANES_TC1,
POWER_DOMAIN_PORT_DDI_LANES_TC2,
POWER_DOMAIN_PORT_DDI_LANES_TC3,
POWER_DOMAIN_PORT_DDI_LANES_TC4,
POWER_DOMAIN_PORT_DDI_LANES_TC5,
POWER_DOMAIN_PORT_DDI_LANES_TC6,
- POWER_DOMAIN_PORT_DDI_LANES_D_XELPD = POWER_DOMAIN_PORT_DDI_LANES_TC5, /* XELPD */
+ POWER_DOMAIN_PORT_DDI_LANES_D_XELPD,
POWER_DOMAIN_PORT_DDI_LANES_E_XELPD,
POWER_DOMAIN_PORT_DDI_IO_A,
@@ -68,18 +65,15 @@ enum intel_display_power_domain {
POWER_DOMAIN_PORT_DDI_IO_D,
POWER_DOMAIN_PORT_DDI_IO_E,
POWER_DOMAIN_PORT_DDI_IO_F,
- POWER_DOMAIN_PORT_DDI_IO_G,
- POWER_DOMAIN_PORT_DDI_IO_H,
- POWER_DOMAIN_PORT_DDI_IO_I,
- POWER_DOMAIN_PORT_DDI_IO_TC1 = POWER_DOMAIN_PORT_DDI_IO_D, /* tgl+ */
+ POWER_DOMAIN_PORT_DDI_IO_TC1,
POWER_DOMAIN_PORT_DDI_IO_TC2,
POWER_DOMAIN_PORT_DDI_IO_TC3,
POWER_DOMAIN_PORT_DDI_IO_TC4,
POWER_DOMAIN_PORT_DDI_IO_TC5,
POWER_DOMAIN_PORT_DDI_IO_TC6,
- POWER_DOMAIN_PORT_DDI_IO_D_XELPD = POWER_DOMAIN_PORT_DDI_IO_TC5, /* XELPD */
+ POWER_DOMAIN_PORT_DDI_IO_D_XELPD,
POWER_DOMAIN_PORT_DDI_IO_E_XELPD,
POWER_DOMAIN_PORT_DSI,
@@ -94,18 +88,15 @@ enum intel_display_power_domain {
POWER_DOMAIN_AUX_D,
POWER_DOMAIN_AUX_E,
POWER_DOMAIN_AUX_F,
- POWER_DOMAIN_AUX_G,
- POWER_DOMAIN_AUX_H,
- POWER_DOMAIN_AUX_I,
- POWER_DOMAIN_AUX_USBC1 = POWER_DOMAIN_AUX_D, /* tgl+ */
+ POWER_DOMAIN_AUX_USBC1,
POWER_DOMAIN_AUX_USBC2,
POWER_DOMAIN_AUX_USBC3,
POWER_DOMAIN_AUX_USBC4,
POWER_DOMAIN_AUX_USBC5,
POWER_DOMAIN_AUX_USBC6,
- POWER_DOMAIN_AUX_D_XELPD = POWER_DOMAIN_AUX_USBC5, /* XELPD */
+ POWER_DOMAIN_AUX_D_XELPD,
POWER_DOMAIN_AUX_E_XELPD,
POWER_DOMAIN_AUX_IO_A,
@@ -113,11 +104,8 @@ enum intel_display_power_domain {
POWER_DOMAIN_AUX_TBT_D,
POWER_DOMAIN_AUX_TBT_E,
POWER_DOMAIN_AUX_TBT_F,
- POWER_DOMAIN_AUX_TBT_G,
- POWER_DOMAIN_AUX_TBT_H,
- POWER_DOMAIN_AUX_TBT_I,
- POWER_DOMAIN_AUX_TBT1 = POWER_DOMAIN_AUX_TBT_D, /* tgl+ */
+ POWER_DOMAIN_AUX_TBT1,
POWER_DOMAIN_AUX_TBT2,
POWER_DOMAIN_AUX_TBT3,
POWER_DOMAIN_AUX_TBT4,
--
2.27.0
next prev parent reply other threads:[~2022-02-08 11:37 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-08 11:36 [Intel-gfx] [PATCH v2 00/26] drm/i915: Refactor the display power domain mappings Imre Deak
2022-02-08 11:36 ` [Intel-gfx] [PATCH v2 01/26] drm/i915: Fix the VDSC_PW2 power domain enum value Imre Deak
2022-02-08 11:36 ` [Intel-gfx] [PATCH v2 02/26] drm/i915: Sanitize open-coded power well enable()/disable() calls Imre Deak
2022-02-08 11:36 ` [Intel-gfx] [PATCH v2 03/26] drm/i915: Remove redundant state verification during TypeC AUX power well disabling Imre Deak
2022-02-08 11:36 ` [Intel-gfx] [PATCH v2 04/26] drm/i915: Move i915_power_well_regs struct into i915_power_well_ops Imre Deak
2022-02-08 11:36 ` [Intel-gfx] [PATCH v2 05/26] drm/i915: Move power well get/put/enable/disable functions to a new file Imre Deak
2022-02-08 11:36 ` [Intel-gfx] [PATCH v2 06/26] drm/i915: Add function to call a power well's sync_hw() hook Imre Deak
2022-02-08 11:36 ` [Intel-gfx] [PATCH v2 07/26] drm/i915: Add functions to get a power well's state/name/domains/mask/refcount Imre Deak
2022-02-11 14:26 ` Hogander, Jouni
2022-02-11 15:29 ` Imre Deak
2022-02-17 11:52 ` Hogander, Jouni
2022-02-08 11:36 ` [Intel-gfx] [PATCH v2 08/26] drm/i915: Move intel_display_power_well_is_enabled() to intel_display_power_well.c Imre Deak
2022-02-08 11:36 ` [Intel-gfx] [PATCH v2 09/26] drm/i915: Move per-platform power well hooks " Imre Deak
2022-02-11 15:47 ` Hogander, Jouni
2022-02-11 18:21 ` Imre Deak
2022-02-08 11:36 ` [Intel-gfx] [PATCH v2 10/26] drm/i915: Unexport the for_each_power_well() macros Imre Deak
2022-02-08 11:36 ` [Intel-gfx] [PATCH v2 11/26] drm/i915: Move the power domain->well mappings to intel_display_power_map.c Imre Deak
2022-02-08 11:36 ` [Intel-gfx] [PATCH v2 12/26] drm/i915: Move the dg2 fixed_enable_delay power well param to a common bitfield Imre Deak
2022-02-08 11:36 ` [Intel-gfx] [PATCH v2 13/26] drm/i915: Move the HSW power well flags " Imre Deak
2022-02-08 11:36 ` [Intel-gfx] [PATCH v2 14/26] drm/i915: Rename the power domain names to end with pipes/ports Imre Deak
2022-02-08 11:36 ` [Intel-gfx] [PATCH v2 15/26] drm/i915: Sanitize the power well names Imre Deak
2022-02-08 11:36 ` [Intel-gfx] [PATCH v2 16/26] drm/i915: Convert the power well descriptor domain mask to an array of domains Imre Deak
2022-02-08 11:36 ` [Intel-gfx] [PATCH v2 17/26] drm/i915: Convert the u64 power well domains mask to a bitmap Imre Deak
2022-02-08 11:36 ` [Intel-gfx] [PATCH v2 18/26] drm/i915: Simplify power well definitions by adding power well instances Imre Deak
2022-02-08 11:36 ` [Intel-gfx] [PATCH v2 19/26] drm/i915: Allow platforms to share power well descriptors Imre Deak
2022-02-08 11:36 ` [Intel-gfx] [PATCH v2 20/26] drm/i915: Simplify the DG1 " Imre Deak
2022-02-08 11:36 ` [Intel-gfx] [PATCH v2 21/26] drm/i915: Sanitize the ADL-S power well definition Imre Deak
2022-02-08 11:36 ` [Intel-gfx] [PATCH v2 22/26] drm/i915: Sanitize the port -> DDI/AUX power domain mapping for each platform Imre Deak
2022-02-08 11:36 ` Imre Deak [this message]
2022-02-08 11:36 ` [Intel-gfx] [PATCH v2 24/26] drm/i915: Remove the ICL specific TBT power domains Imre Deak
2022-02-08 11:36 ` [Intel-gfx] [PATCH v2 25/26] drm/i915: Remove duplicate DDI/AUX power domain mappings Imre Deak
2022-02-08 11:36 ` [Intel-gfx] [PATCH v2 26/26] drm/i915: Remove the XELPD specific AUX and DDI power domains Imre Deak
2022-02-08 12:32 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Refactor the display power domain mappings (rev2) Patchwork
2022-02-08 12:33 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-02-08 13:03 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-02-17 11:59 ` [Intel-gfx] [PATCH v2 00/26] drm/i915: Refactor the display power domain mappings Hogander, Jouni
2022-02-22 15:24 ` Imre Deak
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