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From: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [RFC 13/15] drm/i915/hdmi21/mtl: Enable Scrambling only for FRL mode
Date: Mon,  7 Nov 2022 12:50:43 +0530	[thread overview]
Message-ID: <20221107072045.628895-14-ankit.k.nautiyal@intel.com> (raw)
In-Reply-To: <20221107072045.628895-1-ankit.k.nautiyal@intel.com>

In FRL mode, the Scrambling is always enabled by the HW.
The High TMDS Char Rate and Scrambing Enable bit of
reg TRANS_DDI_FUNC_CTRL are only set in TMDS mode and not
in FRL mode.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_hdmi.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 1dd0b0f2e2f1..1eadf77dc819 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -2292,7 +2292,13 @@ int intel_hdmi_compute_config(struct intel_encoder *encoder,
 
 	pipe_config->lane_count = 4;
 
-	if (scdc->scrambling.supported && DISPLAY_VER(dev_priv) >= 10) {
+	/*
+	 * Enable scrambing for only for TMDS mode.
+	 * For FRL mode, scrambling is always enabled by HW, and
+	 * scrambling enable and high tmds clock bits are not used.
+	 */
+	if (scdc->scrambling.supported && DISPLAY_VER(dev_priv) >= 10 &&
+	    !pipe_config->frl.enable) {
 		if (scdc->scrambling.low_rates)
 			pipe_config->hdmi_scrambling = true;
 
-- 
2.25.1


  parent reply	other threads:[~2022-11-07  7:21 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-07  7:20 [Intel-gfx] [RFC 00/15] Add support for HDMI2.1 FRL Ankit Nautiyal
2022-11-07  7:20 ` [Intel-gfx] [RFC 01/15] drm/edid: Add helper to get max FRL rate for an HDMI sink Ankit Nautiyal
2022-11-07  7:20 ` [Intel-gfx] [RFC 02/15] drm/i915/dp: Use the drm helpers for getting max FRL rate Ankit Nautiyal
2022-11-07  7:20 ` [Intel-gfx] [RFC 03/15] drm/i915/mtl: Create separate reg file for PICA registers Ankit Nautiyal
2022-11-07  7:20 ` [Intel-gfx] [RFC 04/15] drm/i915/hdmi21/mtl: Parse frl max link rate from vbt Ankit Nautiyal
2022-11-07  7:20 ` [Intel-gfx] [RFC 05/15] drm/i915/hdmi21/mtl: Add new data members for FRL configuration Ankit Nautiyal
2022-11-07  7:20 ` [Intel-gfx] [RFC 06/15] drm/drm_scdc_helper: Add SCDC helper funcs for HDMI2.1 Ankit Nautiyal
2022-11-07  7:20 ` [Intel-gfx] [RFC 07/15] drm/i915/mtl: Add registers for FRL Link Training Ankit Nautiyal
2022-11-07  7:20 ` [Intel-gfx] [RFC 08/15] drm/i915/mtl: Add HDMI2.1 bits in PORT_BUF_CTL_1 Ankit Nautiyal
2022-11-07  7:20 ` [Intel-gfx] [RFC 09/15] drm/i915/mtl: Add port_data/data width for TRANS_DDI_FUNC and DDI_BUF_CTL Ankit Nautiyal
2022-11-07  7:20 ` [Intel-gfx] [RFC 10/15] drm/i915/display/mtl: Add new members in crtc_state for FRL configuration Ankit Nautiyal
2022-11-07  7:20 ` [Intel-gfx] [RFC 11/15] drm/i915/display/mtl: Update Transcoder/DDI registers with the frl bits Ankit Nautiyal
2022-11-07  7:20 ` [Intel-gfx] [RFC 12/15] drm/i915/display/mtl: Reset FRL Transcoder config while disabling HDMI Ankit Nautiyal
2022-11-07  7:20 ` Ankit Nautiyal [this message]
2022-11-07  7:20 ` [Intel-gfx] [RFC 14/15] drm/i915/hdmi21/mtl: Add support for sending uevent to user for FRL training failure Ankit Nautiyal
2022-11-07  7:20 ` [Intel-gfx] [RFC 15/15] drm/i915/display/mtl: Add functions for FRL trainining state machine Ankit Nautiyal
2022-11-07  8:09 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add support for HDMI2.1 FRL Patchwork
2022-11-07  8:09 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-11-07  8:31 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-11-07  9:44 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2026-02-04 23:06 ` [Intel-gfx] [RFC 00/15] " Tomasz Pakuła

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