From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 10/13] drm/i915/dsb: Load LUTs using the DSB during vblank
Date: Wed, 18 Jan 2023 18:30:37 +0200 [thread overview]
Message-ID: <20230118163040.29808-11-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20230118163040.29808-1-ville.syrjala@linux.intel.com>
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Loading LUTs with the DSB outside of vblank doesn't really
work due to the palette anti-collision logic. Apparently the
DSB register writes don't get stalled like CPU mmio writes
do and instead we end up corrupting the LUT entries. Disabling
the anti-collision logic would allow us to successfully load
the LUT outside of vblank, but presumably that risks the LUT
reads from the scanout (temportarily) getting corrupted data
from the LUT instead.
The anti-collision logic isn't active during vblank so that
is when we can successfully load the LUT with the DSB. That is
what we want to do anyway to avoid tearing.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_color.c | 30 ++++++++++++++++----
drivers/gpu/drm/i915/display/intel_color.h | 2 ++
drivers/gpu/drm/i915/display/intel_crtc.c | 4 ++-
drivers/gpu/drm/i915/display/intel_display.c | 3 ++
4 files changed, 32 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index cab8dfd03853..4c3344ee473e 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -1255,12 +1255,6 @@ static void icl_load_luts(const struct intel_crtc_state *crtc_state)
MISSING_CASE(crtc_state->gamma_mode);
break;
}
-
- if (crtc_state->dsb) {
- intel_dsb_finish(crtc_state->dsb);
- intel_dsb_commit(crtc_state->dsb, false);
- intel_dsb_wait(crtc_state->dsb);
- }
}
static u32 chv_cgm_degamma_ldw(const struct drm_color_lut *color)
@@ -1358,6 +1352,9 @@ void intel_color_load_luts(const struct intel_crtc_state *crtc_state)
{
struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev);
+ if (crtc_state->dsb)
+ return;
+
i915->display.funcs.color->load_luts(crtc_state);
}
@@ -1374,11 +1371,15 @@ void intel_color_commit_arm(const struct intel_crtc_state *crtc_state)
struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev);
i915->display.funcs.color->color_commit_arm(crtc_state);
+
+ if (crtc_state->dsb)
+ intel_dsb_commit(crtc_state->dsb, true);
}
void intel_color_prepare_commit(struct intel_crtc_state *crtc_state)
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+ struct drm_i915_private *i915 = to_i915(crtc->base.dev);
/* FIXME DSB has issues loading LUTs, disable it for now */
return;
@@ -1391,6 +1392,12 @@ void intel_color_prepare_commit(struct intel_crtc_state *crtc_state)
return;
crtc_state->dsb = intel_dsb_prepare(crtc, 1024);
+ if (!crtc_state->dsb)
+ return;
+
+ i915->display.funcs.color->load_luts(crtc_state);
+
+ intel_dsb_finish(crtc_state->dsb);
}
void intel_color_cleanup_commit(struct intel_crtc_state *crtc_state)
@@ -1402,6 +1409,17 @@ void intel_color_cleanup_commit(struct intel_crtc_state *crtc_state)
crtc_state->dsb = NULL;
}
+void intel_color_wait_commit(const struct intel_crtc_state *crtc_state)
+{
+ if (crtc_state->dsb)
+ intel_dsb_wait(crtc_state->dsb);
+}
+
+bool intel_color_uses_dsb(const struct intel_crtc_state *crtc_state)
+{
+ return crtc_state->dsb;
+}
+
static bool intel_can_preload_luts(const struct intel_crtc_state *new_crtc_state)
{
struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc);
diff --git a/drivers/gpu/drm/i915/display/intel_color.h b/drivers/gpu/drm/i915/display/intel_color.h
index d620b5b1e2a6..a478606a38d4 100644
--- a/drivers/gpu/drm/i915/display/intel_color.h
+++ b/drivers/gpu/drm/i915/display/intel_color.h
@@ -19,6 +19,8 @@ void intel_color_crtc_init(struct intel_crtc *crtc);
int intel_color_check(struct intel_crtc_state *crtc_state);
void intel_color_prepare_commit(struct intel_crtc_state *crtc_state);
void intel_color_cleanup_commit(struct intel_crtc_state *crtc_state);
+bool intel_color_uses_dsb(const struct intel_crtc_state *crtc_state);
+void intel_color_wait_commit(const struct intel_crtc_state *crtc_state);
void intel_color_commit_noarm(const struct intel_crtc_state *crtc_state);
void intel_color_commit_arm(const struct intel_crtc_state *crtc_state);
void intel_color_load_luts(const struct intel_crtc_state *crtc_state);
diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c
index 82be0fbe9934..764942c843fd 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc.c
@@ -24,6 +24,7 @@
#include "intel_display_trace.h"
#include "intel_display_types.h"
#include "intel_drrs.h"
+#include "intel_dsb.h"
#include "intel_dsi.h"
#include "intel_pipe_crc.h"
#include "intel_psr.h"
@@ -387,7 +388,8 @@ static bool intel_crtc_needs_vblank_work(const struct intel_crtc_state *crtc_sta
return crtc_state->hw.active &&
!intel_crtc_needs_modeset(crtc_state) &&
!crtc_state->preload_luts &&
- intel_crtc_needs_color_update(crtc_state);
+ intel_crtc_needs_color_update(crtc_state) &&
+ !intel_color_uses_dsb(crtc_state);
}
static void intel_crtc_vblank_work(struct kthread_work *base)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index c38a54efedbe..a5f1a4698a78 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -80,6 +80,7 @@
#include "intel_dpll_mgr.h"
#include "intel_dpt.h"
#include "intel_drrs.h"
+#include "intel_dsb.h"
#include "intel_dsi.h"
#include "intel_dvo.h"
#include "intel_fb.h"
@@ -7482,6 +7483,8 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
if (new_crtc_state->do_async_flip)
intel_crtc_disable_flip_done(state, crtc);
+
+ intel_color_wait_commit(new_crtc_state);
}
/*
--
2.38.2
next prev parent reply other threads:[~2023-01-18 16:31 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-18 16:30 [Intel-gfx] [PATCH 00/13] drm/i915: Load LUTs with DSB Ville Syrjala
2023-01-18 16:30 ` [Intel-gfx] [PATCH 01/13] drm/i915/dsb: Define more DSB registers Ville Syrjala
2023-02-03 9:49 ` Manna, Animesh
2023-01-18 16:30 ` [Intel-gfx] [PATCH 02/13] drm/i915/dsb: Pimp debug/error prints Ville Syrjala
2023-02-03 9:49 ` Manna, Animesh
2023-01-18 16:30 ` [Intel-gfx] [PATCH 03/13] drm/i915/dsb: Split intel_dsb_wait() from intel_dsb_commit() Ville Syrjala
2023-02-02 15:22 ` Manna, Animesh
2023-01-18 16:30 ` [Intel-gfx] [PATCH 04/13] drm/i915/dsb: Introduce intel_dsb_finish() Ville Syrjala
2023-02-02 15:26 ` Manna, Animesh
2023-01-18 16:30 ` [Intel-gfx] [PATCH 05/13] drm/i915/dsb: Dump the DSB command buffer when DSB fails Ville Syrjala
2023-02-02 17:09 ` Manna, Animesh
2023-02-03 11:51 ` Ville Syrjälä
2023-01-18 16:30 ` [Intel-gfx] [PATCH 06/13] drm/i915/dsb: Allow vblank synchronized DSB execution Ville Syrjala
2023-02-02 17:17 ` Manna, Animesh
2023-01-18 16:30 ` [Intel-gfx] [PATCH 07/13] drm/i915/dsb: Nuke the DSB debug Ville Syrjala
2023-02-02 17:19 ` Manna, Animesh
2023-01-18 16:30 ` [Intel-gfx] [PATCH 08/13] drm/i915/dsb: Skip DSB command buffer setup if we have no LUTs Ville Syrjala
2023-02-03 10:01 ` Manna, Animesh
2023-01-18 16:30 ` [Intel-gfx] [PATCH 09/13] drm/i915/dsb: Don't use DSB to load the LUTs during full modeset Ville Syrjala
2023-02-03 10:04 ` Manna, Animesh
2023-02-03 10:46 ` Ville Syrjälä
2023-01-18 16:30 ` Ville Syrjala [this message]
2023-01-18 16:30 ` [Intel-gfx] [PATCH 11/13] drm/i915/dsb: Write each legacy LUT entry twice with DSB Ville Syrjala
2023-02-02 19:05 ` Manna, Animesh
2023-02-03 10:50 ` Ville Syrjälä
2023-01-18 16:30 ` [Intel-gfx] [PATCH 12/13] drm/i915/dsb: Load LUTs with the DSB Ville Syrjala
2023-01-18 16:30 ` [Intel-gfx] [PATCH 13/13] drm/i915: Do state check for color management changes Ville Syrjala
2023-01-19 0:07 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Load LUTs with DSB Patchwork
2023-01-19 0:35 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-01-19 22:29 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230118163040.29808-11-ville.syrjala@linux.intel.com \
--to=ville.syrjala@linux.intel.com \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox