From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 03/13] drm/i915/dsb: Split intel_dsb_wait() from intel_dsb_commit()
Date: Wed, 18 Jan 2023 18:30:30 +0200 [thread overview]
Message-ID: <20230118163040.29808-4-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20230118163040.29808-1-ville.syrjala@linux.intel.com>
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Starting the DSB execution vs. waiting for it stop are two
totally different things. Split intel_dsb_wait() from
intel_dsb_commit() so that we can eventually allow the DSB
to execute asynchronously.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_color.c | 4 +++-
drivers/gpu/drm/i915/display/intel_dsb.c | 11 +++++++++--
drivers/gpu/drm/i915/display/intel_dsb.h | 1 +
3 files changed, 13 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 8d97c299e657..5d99913429b9 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -1256,8 +1256,10 @@ static void icl_load_luts(const struct intel_crtc_state *crtc_state)
break;
}
- if (crtc_state->dsb)
+ if (crtc_state->dsb) {
intel_dsb_commit(crtc_state->dsb);
+ intel_dsb_wait(crtc_state->dsb);
+ }
}
static u32 chv_cgm_degamma_ldw(const struct drm_color_lut *color)
diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c b/drivers/gpu/drm/i915/display/intel_dsb.c
index f41146fc84d7..0b2faa33f204 100644
--- a/drivers/gpu/drm/i915/display/intel_dsb.c
+++ b/drivers/gpu/drm/i915/display/intel_dsb.c
@@ -235,7 +235,7 @@ void intel_dsb_commit(struct intel_dsb *dsb)
if (is_dsb_busy(dev_priv, pipe, dsb->id)) {
drm_err(&dev_priv->drm, "[CRTC:%d:%s] DSB %d is busy\n",
crtc->base.base.id, crtc->base.name, dsb->id);
- goto reset;
+ return;
}
intel_de_write(dev_priv, DSB_CTRL(pipe, dsb->id),
@@ -249,13 +249,20 @@ void intel_dsb_commit(struct intel_dsb *dsb)
"DSB execution started - head 0x%x, tail 0x%x\n",
i915_ggtt_offset(dsb->vma),
i915_ggtt_offset(dsb->vma) + tail);
+}
+
+void intel_dsb_wait(struct intel_dsb *dsb)
+{
+ struct intel_crtc *crtc = dsb->crtc;
+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ enum pipe pipe = crtc->pipe;
if (wait_for(!is_dsb_busy(dev_priv, pipe, dsb->id), 1))
drm_err(&dev_priv->drm,
"[CRTC:%d:%s] DSB %d timed out waiting for idle\n",
crtc->base.base.id, crtc->base.name, dsb->id);
-reset:
+ /* Attempt to reset it */
dsb->free_pos = 0;
dsb->ins_start_offset = 0;
intel_de_write(dev_priv, DSB_CTRL(pipe, dsb->id), 0);
diff --git a/drivers/gpu/drm/i915/display/intel_dsb.h b/drivers/gpu/drm/i915/display/intel_dsb.h
index 05c221b6d0a4..7999199c2464 100644
--- a/drivers/gpu/drm/i915/display/intel_dsb.h
+++ b/drivers/gpu/drm/i915/display/intel_dsb.h
@@ -19,5 +19,6 @@ void intel_dsb_cleanup(struct intel_dsb *dsb);
void intel_dsb_reg_write(struct intel_dsb *dsb,
i915_reg_t reg, u32 val);
void intel_dsb_commit(struct intel_dsb *dsb);
+void intel_dsb_wait(struct intel_dsb *dsb);
#endif
--
2.38.2
next prev parent reply other threads:[~2023-01-18 16:31 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-18 16:30 [Intel-gfx] [PATCH 00/13] drm/i915: Load LUTs with DSB Ville Syrjala
2023-01-18 16:30 ` [Intel-gfx] [PATCH 01/13] drm/i915/dsb: Define more DSB registers Ville Syrjala
2023-02-03 9:49 ` Manna, Animesh
2023-01-18 16:30 ` [Intel-gfx] [PATCH 02/13] drm/i915/dsb: Pimp debug/error prints Ville Syrjala
2023-02-03 9:49 ` Manna, Animesh
2023-01-18 16:30 ` Ville Syrjala [this message]
2023-02-02 15:22 ` [Intel-gfx] [PATCH 03/13] drm/i915/dsb: Split intel_dsb_wait() from intel_dsb_commit() Manna, Animesh
2023-01-18 16:30 ` [Intel-gfx] [PATCH 04/13] drm/i915/dsb: Introduce intel_dsb_finish() Ville Syrjala
2023-02-02 15:26 ` Manna, Animesh
2023-01-18 16:30 ` [Intel-gfx] [PATCH 05/13] drm/i915/dsb: Dump the DSB command buffer when DSB fails Ville Syrjala
2023-02-02 17:09 ` Manna, Animesh
2023-02-03 11:51 ` Ville Syrjälä
2023-01-18 16:30 ` [Intel-gfx] [PATCH 06/13] drm/i915/dsb: Allow vblank synchronized DSB execution Ville Syrjala
2023-02-02 17:17 ` Manna, Animesh
2023-01-18 16:30 ` [Intel-gfx] [PATCH 07/13] drm/i915/dsb: Nuke the DSB debug Ville Syrjala
2023-02-02 17:19 ` Manna, Animesh
2023-01-18 16:30 ` [Intel-gfx] [PATCH 08/13] drm/i915/dsb: Skip DSB command buffer setup if we have no LUTs Ville Syrjala
2023-02-03 10:01 ` Manna, Animesh
2023-01-18 16:30 ` [Intel-gfx] [PATCH 09/13] drm/i915/dsb: Don't use DSB to load the LUTs during full modeset Ville Syrjala
2023-02-03 10:04 ` Manna, Animesh
2023-02-03 10:46 ` Ville Syrjälä
2023-01-18 16:30 ` [Intel-gfx] [PATCH 10/13] drm/i915/dsb: Load LUTs using the DSB during vblank Ville Syrjala
2023-01-18 16:30 ` [Intel-gfx] [PATCH 11/13] drm/i915/dsb: Write each legacy LUT entry twice with DSB Ville Syrjala
2023-02-02 19:05 ` Manna, Animesh
2023-02-03 10:50 ` Ville Syrjälä
2023-01-18 16:30 ` [Intel-gfx] [PATCH 12/13] drm/i915/dsb: Load LUTs with the DSB Ville Syrjala
2023-01-18 16:30 ` [Intel-gfx] [PATCH 13/13] drm/i915: Do state check for color management changes Ville Syrjala
2023-01-19 0:07 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Load LUTs with DSB Patchwork
2023-01-19 0:35 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-01-19 22:29 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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