From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 04/13] drm/i915/dsb: Introduce intel_dsb_finish()
Date: Wed, 18 Jan 2023 18:30:31 +0200 [thread overview]
Message-ID: <20230118163040.29808-5-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20230118163040.29808-1-ville.syrjala@linux.intel.com>
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Introduce a function to emits whatever commands we need
at the end of the DSB command buffer. For the moment we
only do the tail cacheline alignment there, but eventually
we might want eg. emit an interrupt.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_color.c | 1 +
drivers/gpu/drm/i915/display/intel_dsb.c | 11 +++++++----
drivers/gpu/drm/i915/display/intel_dsb.h | 1 +
3 files changed, 9 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 5d99913429b9..6d6d300fa2df 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -1257,6 +1257,7 @@ static void icl_load_luts(const struct intel_crtc_state *crtc_state)
}
if (crtc_state->dsb) {
+ intel_dsb_finish(crtc_state->dsb);
intel_dsb_commit(crtc_state->dsb);
intel_dsb_wait(crtc_state->dsb);
}
diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c b/drivers/gpu/drm/i915/display/intel_dsb.c
index 0b2faa33f204..9e25b1345927 100644
--- a/drivers/gpu/drm/i915/display/intel_dsb.c
+++ b/drivers/gpu/drm/i915/display/intel_dsb.c
@@ -199,7 +199,7 @@ void intel_dsb_reg_write(struct intel_dsb *dsb,
}
}
-static u32 intel_dsb_align_tail(struct intel_dsb *dsb)
+static void intel_dsb_align_tail(struct intel_dsb *dsb)
{
u32 aligned_tail, tail;
@@ -211,8 +211,11 @@ static u32 intel_dsb_align_tail(struct intel_dsb *dsb)
aligned_tail - tail);
dsb->free_pos = aligned_tail / 4;
+}
- return aligned_tail;
+void intel_dsb_finish(struct intel_dsb *dsb)
+{
+ intel_dsb_align_tail(dsb);
}
/**
@@ -228,8 +231,8 @@ void intel_dsb_commit(struct intel_dsb *dsb)
enum pipe pipe = crtc->pipe;
u32 tail;
- tail = intel_dsb_align_tail(dsb);
- if (tail == 0)
+ tail = dsb->free_pos * 4;
+ if (drm_WARN_ON(&dev_priv->drm, !IS_ALIGNED(tail, CACHELINE_BYTES)))
return;
if (is_dsb_busy(dev_priv, pipe, dsb->id)) {
diff --git a/drivers/gpu/drm/i915/display/intel_dsb.h b/drivers/gpu/drm/i915/display/intel_dsb.h
index 7999199c2464..6b22499e8a5d 100644
--- a/drivers/gpu/drm/i915/display/intel_dsb.h
+++ b/drivers/gpu/drm/i915/display/intel_dsb.h
@@ -15,6 +15,7 @@ struct intel_dsb;
struct intel_dsb *intel_dsb_prepare(struct intel_crtc *crtc,
unsigned int max_cmds);
+void intel_dsb_finish(struct intel_dsb *dsb);
void intel_dsb_cleanup(struct intel_dsb *dsb);
void intel_dsb_reg_write(struct intel_dsb *dsb,
i915_reg_t reg, u32 val);
--
2.38.2
next prev parent reply other threads:[~2023-01-18 16:31 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-18 16:30 [Intel-gfx] [PATCH 00/13] drm/i915: Load LUTs with DSB Ville Syrjala
2023-01-18 16:30 ` [Intel-gfx] [PATCH 01/13] drm/i915/dsb: Define more DSB registers Ville Syrjala
2023-02-03 9:49 ` Manna, Animesh
2023-01-18 16:30 ` [Intel-gfx] [PATCH 02/13] drm/i915/dsb: Pimp debug/error prints Ville Syrjala
2023-02-03 9:49 ` Manna, Animesh
2023-01-18 16:30 ` [Intel-gfx] [PATCH 03/13] drm/i915/dsb: Split intel_dsb_wait() from intel_dsb_commit() Ville Syrjala
2023-02-02 15:22 ` Manna, Animesh
2023-01-18 16:30 ` Ville Syrjala [this message]
2023-02-02 15:26 ` [Intel-gfx] [PATCH 04/13] drm/i915/dsb: Introduce intel_dsb_finish() Manna, Animesh
2023-01-18 16:30 ` [Intel-gfx] [PATCH 05/13] drm/i915/dsb: Dump the DSB command buffer when DSB fails Ville Syrjala
2023-02-02 17:09 ` Manna, Animesh
2023-02-03 11:51 ` Ville Syrjälä
2023-01-18 16:30 ` [Intel-gfx] [PATCH 06/13] drm/i915/dsb: Allow vblank synchronized DSB execution Ville Syrjala
2023-02-02 17:17 ` Manna, Animesh
2023-01-18 16:30 ` [Intel-gfx] [PATCH 07/13] drm/i915/dsb: Nuke the DSB debug Ville Syrjala
2023-02-02 17:19 ` Manna, Animesh
2023-01-18 16:30 ` [Intel-gfx] [PATCH 08/13] drm/i915/dsb: Skip DSB command buffer setup if we have no LUTs Ville Syrjala
2023-02-03 10:01 ` Manna, Animesh
2023-01-18 16:30 ` [Intel-gfx] [PATCH 09/13] drm/i915/dsb: Don't use DSB to load the LUTs during full modeset Ville Syrjala
2023-02-03 10:04 ` Manna, Animesh
2023-02-03 10:46 ` Ville Syrjälä
2023-01-18 16:30 ` [Intel-gfx] [PATCH 10/13] drm/i915/dsb: Load LUTs using the DSB during vblank Ville Syrjala
2023-01-18 16:30 ` [Intel-gfx] [PATCH 11/13] drm/i915/dsb: Write each legacy LUT entry twice with DSB Ville Syrjala
2023-02-02 19:05 ` Manna, Animesh
2023-02-03 10:50 ` Ville Syrjälä
2023-01-18 16:30 ` [Intel-gfx] [PATCH 12/13] drm/i915/dsb: Load LUTs with the DSB Ville Syrjala
2023-01-18 16:30 ` [Intel-gfx] [PATCH 13/13] drm/i915: Do state check for color management changes Ville Syrjala
2023-01-19 0:07 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Load LUTs with DSB Patchwork
2023-01-19 0:35 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-01-19 22:29 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230118163040.29808-5-ville.syrjala@linux.intel.com \
--to=ville.syrjala@linux.intel.com \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox