From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 7/9] drm/i915: Clean up skl+ plane alpha bits
Date: Tue, 14 Mar 2023 15:02:53 +0200 [thread overview]
Message-ID: <20230314130255.23273-8-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20230314130255.23273-1-ville.syrjala@linux.intel.com>
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Convert a few more skl+ plane registers to REG_BIT() & co.
Somehow thse were missed during the earlier cleanup.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index e908959dba4a..334e96d45c8d 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4591,10 +4591,11 @@
#define _PLANE_KEYVAL_2_A 0x70294
#define _PLANE_KEYMSK_1_A 0x70198
#define _PLANE_KEYMSK_2_A 0x70298
-#define PLANE_KEYMSK_ALPHA_ENABLE (1 << 31)
+#define PLANE_KEYMSK_ALPHA_ENABLE REG_BIT(31)
#define _PLANE_KEYMAX_1_A 0x701a0
#define _PLANE_KEYMAX_2_A 0x702a0
-#define PLANE_KEYMAX_ALPHA(a) ((a) << 24)
+#define PLANE_KEYMAX_ALPHA_MASK REG_GENMASK(31, 24)
+#define PLANE_KEYMAX_ALPHA(a) REG_FIELD_PREP(PLANE_KEYMAX_ALPHA_MASK, (a))
#define _PLANE_SURFLIVE_1_A 0x701ac
#define _PLANE_SURFLIVE_2_A 0x702ac
#define _PLANE_CC_VAL_1_A 0x701b4
--
2.39.2
next prev parent reply other threads:[~2023-03-14 13:03 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-14 13:02 [Intel-gfx] [PATCH 0/9] drm/i915: Plane cleanups and extra registers Ville Syrjala
2023-03-14 13:02 ` [Intel-gfx] [PATCH 1/9] drm/i915: Stop using pipe_offsets[] for PIPE_MISC* Ville Syrjala
2023-03-14 13:02 ` [Intel-gfx] [PATCH 2/9] drm/i915: s/PIPEMISC/PIPE_MISC/ Ville Syrjala
2023-03-14 13:02 ` [Intel-gfx] [PATCH 3/9] drm/i915: Define more pipe timestamp registers Ville Syrjala
2023-03-16 8:43 ` Hogander, Jouni
2023-03-16 9:44 ` Ville Syrjälä
2023-03-14 13:02 ` [Intel-gfx] [PATCH 4/9] drm/i915: Program VLV/CHV PIPE_MSA_MISC register Ville Syrjala
2023-03-16 8:55 ` Hogander, Jouni
2023-03-16 9:40 ` Ville Syrjälä
2023-03-14 13:02 ` [Intel-gfx] [PATCH 5/9] drm/i915: Define skl+ universal plane SURFLIVE registers Ville Syrjala
2023-03-14 13:02 ` [Intel-gfx] [PATCH 6/9] drm/i915: Define vlv/chv sprite " Ville Syrjala
2023-03-16 9:12 ` Hogander, Jouni
2023-03-16 9:41 ` Ville Syrjälä
2023-03-14 13:02 ` Ville Syrjala [this message]
2023-03-14 13:02 ` [Intel-gfx] [PATCH 8/9] drm/i915: Relocate intel_plane_check_src_coordinates() Ville Syrjala
2023-03-14 13:02 ` [Intel-gfx] [PATCH 9/9] drm/i915: Extract intel_sprite_uapi.c Ville Syrjala
2023-03-14 17:10 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Plane cleanups and extra registers Patchwork
2023-03-14 17:30 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-03-15 20:59 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2023-03-17 11:12 ` [Intel-gfx] [PATCH 0/9] " Hogander, Jouni
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