From: Lucas De Marchi <lucas.demarchi@intel.com>
To: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Subject: [Intel-gfx] [PATCH v2 19/27] drm/i915/xe2lpd: Add support for HPD
Date: Thu, 7 Sep 2023 08:37:49 -0700 [thread overview]
Message-ID: <20230907153757.2249452-20-lucas.demarchi@intel.com> (raw)
In-Reply-To: <20230907153757.2249452-1-lucas.demarchi@intel.com>
From: Gustavo Sousa <gustavo.sousa@intel.com>
Hotplug setup for Xe2_LPD differs from Xe_LPD+ by the fact that the
extra programming for hotplug inversion and DDI HPD filter duration is
not necessary anymore. As mtp_hpd_irq_setup() is reasonably small,
prefer to fork it into a new function for Xe2_LPD instead of adding a
platform check.
v2: Add extra bspec reference and fix missing else (Matt Roper)
BSpec: 68970, 69940
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
.../gpu/drm/i915/display/intel_hotplug_irq.c | 21 +++++++++++++++++--
1 file changed, 19 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_hotplug_irq.c b/drivers/gpu/drm/i915/display/intel_hotplug_irq.c
index 3398cc21bd26..f07047e9cb30 100644
--- a/drivers/gpu/drm/i915/display/intel_hotplug_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_hotplug_irq.c
@@ -163,7 +163,9 @@ static void intel_hpd_init_pins(struct drm_i915_private *dev_priv)
(!HAS_PCH_SPLIT(dev_priv) || HAS_PCH_NOP(dev_priv)))
return;
- if (INTEL_PCH_TYPE(dev_priv) >= PCH_DG1)
+ if (INTEL_PCH_TYPE(dev_priv) >= PCH_LNL)
+ hpd->pch_hpd = hpd_mtp;
+ else if (INTEL_PCH_TYPE(dev_priv) >= PCH_DG1)
hpd->pch_hpd = hpd_sde_dg1;
else if (INTEL_PCH_TYPE(dev_priv) >= PCH_MTP)
hpd->pch_hpd = hpd_mtp;
@@ -1063,6 +1065,19 @@ static void mtp_hpd_irq_setup(struct drm_i915_private *i915)
mtp_tc_hpd_detection_setup(i915);
}
+static void xe2lpd_sde_hpd_irq_setup(struct drm_i915_private *i915)
+{
+ u32 hotplug_irqs, enabled_irqs;
+
+ enabled_irqs = intel_hpd_enabled_irqs(i915, i915->display.hotplug.pch_hpd);
+ hotplug_irqs = intel_hpd_hotplug_irqs(i915, i915->display.hotplug.pch_hpd);
+
+ ibx_display_interrupt_update(i915, hotplug_irqs, enabled_irqs);
+
+ mtp_ddi_hpd_detection_setup(i915);
+ mtp_tc_hpd_detection_setup(i915);
+}
+
static bool is_xelpdp_pica_hpd_pin(enum hpd_pin hpd_pin)
{
return hpd_pin >= HPD_PORT_TC1 && hpd_pin <= HPD_PORT_TC4;
@@ -1122,7 +1137,9 @@ static void xelpdp_hpd_irq_setup(struct drm_i915_private *i915)
xelpdp_pica_hpd_detection_setup(i915);
- if (INTEL_PCH_TYPE(i915) >= PCH_MTP)
+ if (INTEL_PCH_TYPE(i915) >= PCH_LNL)
+ xe2lpd_sde_hpd_irq_setup(i915);
+ else if (INTEL_PCH_TYPE(i915) >= PCH_MTP)
mtp_hpd_irq_setup(i915);
}
--
2.40.1
next prev parent reply other threads:[~2023-09-07 15:40 UTC|newest]
Thread overview: 62+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-07 15:37 [Intel-gfx] [PATCH v2 00/27] Enable Lunar Lake display Lucas De Marchi
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 01/27] drm/i915/xelpdp: Add XE_LPDP_FEATURES Lucas De Marchi
2023-09-07 16:04 ` Matt Roper
2023-09-07 20:35 ` Lucas De Marchi
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 02/27] drm/i915/lnl: Add display definitions Lucas De Marchi
2023-09-07 16:10 ` Matt Roper
2023-09-08 23:25 ` [Intel-gfx] [Intel-xe] " Lucas De Marchi
2023-09-08 23:37 ` Matt Roper
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 03/27] drm/i915/xe2lpd: FBC is now supported on all pipes Lucas De Marchi
2023-09-08 8:54 ` [Intel-gfx] [Intel-xe] " Govindapillai, Vinod
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 04/27] drm/i915: Re-order if/else ladder in intel_detect_pch() Lucas De Marchi
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 05/27] drm/i915/xe2lpd: Add fake PCH Lucas De Marchi
2023-09-07 17:04 ` Matt Roper
2023-09-07 20:43 ` Lucas De Marchi
2023-09-08 0:57 ` Matt Roper
2023-09-08 4:07 ` Lucas De Marchi
2023-09-08 5:39 ` Ville Syrjälä
2023-09-08 5:51 ` Lucas De Marchi
2023-09-08 5:56 ` Ville Syrjälä
2023-09-08 6:03 ` [Intel-gfx] [Intel-xe] " Ville Syrjälä
2023-09-08 13:13 ` Lucas De Marchi
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 06/27] drm/i915/xe2lpd: Treat cursor plane as regular plane for DDB allocation Lucas De Marchi
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 07/27] drm/i915/display: Consolidate saved port bits in intel_digital_port Lucas De Marchi
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 08/27] drm/i915/xe2lpd: Move D2D enable/disable Lucas De Marchi
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 09/27] drm/i915/xe2lpd: Move registers to PICA Lucas De Marchi
2023-09-07 17:52 ` Matt Roper
2023-09-08 13:05 ` [Intel-gfx] [Intel-xe] " Gustavo Sousa
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 10/27] drm/i915/xe2lpd: Don't try to program PLANE_AUX_DIST Lucas De Marchi
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 11/27] drm/i915/xe2lpd: Register DE_RRMR has been removed Lucas De Marchi
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 12/27] FIXME: drm/i915/xe2lpd: Add display power well Lucas De Marchi
2023-09-07 16:53 ` Vodapalli, Ravi Kumar
2023-09-07 16:55 ` Vodapalli, Ravi Kumar
2023-09-07 16:56 ` Vodapalli, Ravi Kumar
2023-09-07 17:57 ` Matt Roper
2023-09-07 19:24 ` Lucas De Marchi
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 13/27] drm/i915/xe2lpd: Add DC state support Lucas De Marchi
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 14/27] drm/i915/display: Remove FBC capability from fused off pipes Lucas De Marchi
2023-09-08 8:55 ` [Intel-gfx] [Intel-xe] " Govindapillai, Vinod
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 15/27] FIXME: drm/i915/xe2lpd: Add support for DP aux channels Lucas De Marchi
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 16/27] drm/i915/xe2lpd: Handle port AUX interrupts Lucas De Marchi
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 17/27] drm/i915/xe2lpd: Read pin assignment from IOM Lucas De Marchi
2023-09-08 6:55 ` Kahola, Mika
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 18/27] drm/i915/xe2lpd: Enable odd size and panning for planar yuv Lucas De Marchi
2023-09-07 15:37 ` Lucas De Marchi [this message]
2023-09-07 20:42 ` [Intel-gfx] [PATCH v2 19/27] drm/i915/xe2lpd: Add support for HPD Matt Roper
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 20/27] drm/i915/xe2lpd: Extend Wa_15010685871 Lucas De Marchi
2023-09-07 20:52 ` Matt Roper
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 21/27] drm/i915/lnl: Add gmbus/ddc support Lucas De Marchi
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 22/27] drm/i915/lnl: Add CDCLK table Lucas De Marchi
2023-09-07 21:52 ` Matt Roper
2023-09-07 22:48 ` Matt Roper
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 23/27] drm/i915/lnl: Start using CDCLK through PLL Lucas De Marchi
2023-09-07 22:13 ` Matt Roper
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 24/27] drm/i915/lnl: Introduce MDCLK_CDCLK ratio to DBuf Lucas De Marchi
2023-09-08 22:43 ` Matt Roper
2023-09-11 8:06 ` Lisovskiy, Stanislav
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 25/27] drm/i915/lnl: Add support for CDCLK initialization sequence Lucas De Marchi
2023-09-07 16:55 ` Vodapalli, Ravi Kumar
2023-09-08 22:17 ` Matt Roper
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 26/27] drm/i915/xe2lpd: Write DBuf after CDCLK change in post plane Lucas De Marchi
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 27/27] drm/i915/xe2lpd: Update mbus on post plane updates Lucas De Marchi
2023-09-07 19:39 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Enable Lunar Lake display (rev3) Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230907153757.2249452-20-lucas.demarchi@intel.com \
--to=lucas.demarchi@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=intel-xe@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox