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From: Lucas De Marchi <lucas.demarchi@intel.com>
To: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
Cc: Matt Roper <matthew.d.roper@intel.com>,
	Lucas De Marchi <lucas.demarchi@intel.com>
Subject: [Intel-gfx] [PATCH v2 04/27] drm/i915: Re-order if/else ladder in intel_detect_pch()
Date: Thu,  7 Sep 2023 08:37:34 -0700	[thread overview]
Message-ID: <20230907153757.2249452-5-lucas.demarchi@intel.com> (raw)
In-Reply-To: <20230907153757.2249452-1-lucas.demarchi@intel.com>

Follow the convention of checking the last platform first and reword the
comment to convey there are more platforms than just DG1.

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
 drivers/gpu/drm/i915/soc/intel_pch.c | 13 ++++++++-----
 1 file changed, 8 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/soc/intel_pch.c b/drivers/gpu/drm/i915/soc/intel_pch.c
index 19a8f27c404e..dfffdfa50b97 100644
--- a/drivers/gpu/drm/i915/soc/intel_pch.c
+++ b/drivers/gpu/drm/i915/soc/intel_pch.c
@@ -218,13 +218,16 @@ void intel_detect_pch(struct drm_i915_private *dev_priv)
 	unsigned short id;
 	enum intel_pch pch_type;
 
-	/* DG1 has south engine display on the same PCI device */
-	if (IS_DG1(dev_priv)) {
-		dev_priv->pch_type = PCH_DG1;
-		return;
-	} else if (IS_DG2(dev_priv)) {
+	/*
+	 * South display engine on the same PCI device: just assign the fake
+	 * PCH.
+	 */
+	if (IS_DG2(dev_priv)) {
 		dev_priv->pch_type = PCH_DG2;
 		return;
+	} else if (IS_DG1(dev_priv)) {
+		dev_priv->pch_type = PCH_DG1;
+		return;
 	}
 
 	/*
-- 
2.40.1


  parent reply	other threads:[~2023-09-07 15:40 UTC|newest]

Thread overview: 62+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-07 15:37 [Intel-gfx] [PATCH v2 00/27] Enable Lunar Lake display Lucas De Marchi
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 01/27] drm/i915/xelpdp: Add XE_LPDP_FEATURES Lucas De Marchi
2023-09-07 16:04   ` Matt Roper
2023-09-07 20:35     ` Lucas De Marchi
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 02/27] drm/i915/lnl: Add display definitions Lucas De Marchi
2023-09-07 16:10   ` Matt Roper
2023-09-08 23:25     ` [Intel-gfx] [Intel-xe] " Lucas De Marchi
2023-09-08 23:37       ` Matt Roper
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 03/27] drm/i915/xe2lpd: FBC is now supported on all pipes Lucas De Marchi
2023-09-08  8:54   ` [Intel-gfx] [Intel-xe] " Govindapillai, Vinod
2023-09-07 15:37 ` Lucas De Marchi [this message]
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 05/27] drm/i915/xe2lpd: Add fake PCH Lucas De Marchi
2023-09-07 17:04   ` Matt Roper
2023-09-07 20:43     ` Lucas De Marchi
2023-09-08  0:57       ` Matt Roper
2023-09-08  4:07         ` Lucas De Marchi
2023-09-08  5:39         ` Ville Syrjälä
2023-09-08  5:51           ` Lucas De Marchi
2023-09-08  5:56             ` Ville Syrjälä
2023-09-08  6:03               ` [Intel-gfx] [Intel-xe] " Ville Syrjälä
2023-09-08 13:13                 ` Lucas De Marchi
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 06/27] drm/i915/xe2lpd: Treat cursor plane as regular plane for DDB allocation Lucas De Marchi
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 07/27] drm/i915/display: Consolidate saved port bits in intel_digital_port Lucas De Marchi
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 08/27] drm/i915/xe2lpd: Move D2D enable/disable Lucas De Marchi
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 09/27] drm/i915/xe2lpd: Move registers to PICA Lucas De Marchi
2023-09-07 17:52   ` Matt Roper
2023-09-08 13:05   ` [Intel-gfx] [Intel-xe] " Gustavo Sousa
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 10/27] drm/i915/xe2lpd: Don't try to program PLANE_AUX_DIST Lucas De Marchi
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 11/27] drm/i915/xe2lpd: Register DE_RRMR has been removed Lucas De Marchi
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 12/27] FIXME: drm/i915/xe2lpd: Add display power well Lucas De Marchi
2023-09-07 16:53   ` Vodapalli, Ravi Kumar
2023-09-07 16:55   ` Vodapalli, Ravi Kumar
2023-09-07 16:56   ` Vodapalli, Ravi Kumar
2023-09-07 17:57   ` Matt Roper
2023-09-07 19:24     ` Lucas De Marchi
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 13/27] drm/i915/xe2lpd: Add DC state support Lucas De Marchi
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 14/27] drm/i915/display: Remove FBC capability from fused off pipes Lucas De Marchi
2023-09-08  8:55   ` [Intel-gfx] [Intel-xe] " Govindapillai, Vinod
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 15/27] FIXME: drm/i915/xe2lpd: Add support for DP aux channels Lucas De Marchi
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 16/27] drm/i915/xe2lpd: Handle port AUX interrupts Lucas De Marchi
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 17/27] drm/i915/xe2lpd: Read pin assignment from IOM Lucas De Marchi
2023-09-08  6:55   ` Kahola, Mika
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 18/27] drm/i915/xe2lpd: Enable odd size and panning for planar yuv Lucas De Marchi
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 19/27] drm/i915/xe2lpd: Add support for HPD Lucas De Marchi
2023-09-07 20:42   ` Matt Roper
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 20/27] drm/i915/xe2lpd: Extend Wa_15010685871 Lucas De Marchi
2023-09-07 20:52   ` Matt Roper
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 21/27] drm/i915/lnl: Add gmbus/ddc support Lucas De Marchi
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 22/27] drm/i915/lnl: Add CDCLK table Lucas De Marchi
2023-09-07 21:52   ` Matt Roper
2023-09-07 22:48     ` Matt Roper
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 23/27] drm/i915/lnl: Start using CDCLK through PLL Lucas De Marchi
2023-09-07 22:13   ` Matt Roper
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 24/27] drm/i915/lnl: Introduce MDCLK_CDCLK ratio to DBuf Lucas De Marchi
2023-09-08 22:43   ` Matt Roper
2023-09-11  8:06     ` Lisovskiy, Stanislav
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 25/27] drm/i915/lnl: Add support for CDCLK initialization sequence Lucas De Marchi
2023-09-07 16:55   ` Vodapalli, Ravi Kumar
2023-09-08 22:17   ` Matt Roper
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 26/27] drm/i915/xe2lpd: Write DBuf after CDCLK change in post plane Lucas De Marchi
2023-09-07 15:37 ` [Intel-gfx] [PATCH v2 27/27] drm/i915/xe2lpd: Update mbus on post plane updates Lucas De Marchi
2023-09-07 19:39 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Enable Lunar Lake display (rev3) Patchwork

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