From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 11/12] drm/i915: s/pipe_config/crtc_state/ in the state checker
Date: Wed, 4 Oct 2023 18:56:06 +0300 [thread overview]
Message-ID: <20231004155607.7719-12-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20231004155607.7719-1-ville.syrjala@linux.intel.com>
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Switch over to the modern variable naming in the state checker.
Ie. rename the pipe_config stuff to crtc_state.
Also make it clear which is the "software state" (ie. what the
current state should be) vs. "hardware state" (ie. what the
currnet state really is).
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
.../drm/i915/display/intel_modeset_verify.c | 56 +++++++++----------
1 file changed, 28 insertions(+), 28 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_modeset_verify.c b/drivers/gpu/drm/i915/display/intel_modeset_verify.c
index 67fe754ac6e5..a55de82fa81f 100644
--- a/drivers/gpu/drm/i915/display/intel_modeset_verify.c
+++ b/drivers/gpu/drm/i915/display/intel_modeset_verify.c
@@ -86,14 +86,14 @@ verify_connector_state(struct intel_atomic_state *state,
}
}
-static void intel_pipe_config_sanity_check(const struct intel_crtc_state *pipe_config)
+static void intel_pipe_config_sanity_check(const struct intel_crtc_state *crtc_state)
{
- struct drm_i915_private *dev_priv = to_i915(pipe_config->uapi.crtc->dev);
+ struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
- if (pipe_config->has_pch_encoder) {
- int fdi_dotclock = intel_dotclock_calculate(intel_fdi_link_freq(dev_priv, pipe_config),
- &pipe_config->fdi_m_n);
- int dotclock = pipe_config->hw.adjusted_mode.crtc_clock;
+ if (crtc_state->has_pch_encoder) {
+ int fdi_dotclock = intel_dotclock_calculate(intel_fdi_link_freq(dev_priv, crtc_state),
+ &crtc_state->fdi_m_n);
+ int dotclock = crtc_state->hw.adjusted_mode.crtc_clock;
/*
* FDI already provided one idea for the dotclock.
@@ -163,66 +163,66 @@ verify_crtc_state(struct intel_atomic_state *state,
{
struct drm_device *dev = crtc->base.dev;
struct drm_i915_private *dev_priv = to_i915(dev);
- const struct intel_crtc_state *new_crtc_state =
+ const struct intel_crtc_state *sw_crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
- struct intel_crtc_state *pipe_config;
+ struct intel_crtc_state *hw_crtc_state;
struct intel_crtc *master_crtc;
struct intel_encoder *encoder;
- pipe_config = intel_crtc_state_alloc(crtc);
- if (!pipe_config)
+ hw_crtc_state = intel_crtc_state_alloc(crtc);
+ if (!hw_crtc_state)
return;
drm_dbg_kms(&dev_priv->drm, "[CRTC:%d:%s]\n", crtc->base.base.id,
crtc->base.name);
- pipe_config->hw.enable = new_crtc_state->hw.enable;
+ hw_crtc_state->hw.enable = sw_crtc_state->hw.enable;
- intel_crtc_get_pipe_config(pipe_config);
+ intel_crtc_get_pipe_config(hw_crtc_state);
/* we keep both pipes enabled on 830 */
- if (IS_I830(dev_priv) && pipe_config->hw.active)
- pipe_config->hw.active = new_crtc_state->hw.active;
+ if (IS_I830(dev_priv) && hw_crtc_state->hw.active)
+ hw_crtc_state->hw.active = sw_crtc_state->hw.active;
I915_STATE_WARN(dev_priv,
- new_crtc_state->hw.active != pipe_config->hw.active,
+ sw_crtc_state->hw.active != hw_crtc_state->hw.active,
"crtc active state doesn't match with hw state (expected %i, found %i)\n",
- new_crtc_state->hw.active, pipe_config->hw.active);
+ sw_crtc_state->hw.active, hw_crtc_state->hw.active);
- I915_STATE_WARN(dev_priv, crtc->active != new_crtc_state->hw.active,
+ I915_STATE_WARN(dev_priv, crtc->active != sw_crtc_state->hw.active,
"transitional active state does not match atomic hw state (expected %i, found %i)\n",
- new_crtc_state->hw.active, crtc->active);
+ sw_crtc_state->hw.active, crtc->active);
- master_crtc = intel_master_crtc(new_crtc_state);
+ master_crtc = intel_master_crtc(sw_crtc_state);
for_each_encoder_on_crtc(dev, &master_crtc->base, encoder) {
enum pipe pipe;
bool active;
active = encoder->get_hw_state(encoder, &pipe);
- I915_STATE_WARN(dev_priv, active != new_crtc_state->hw.active,
+ I915_STATE_WARN(dev_priv, active != sw_crtc_state->hw.active,
"[ENCODER:%i] active %i with crtc active %i\n",
encoder->base.base.id, active,
- new_crtc_state->hw.active);
+ sw_crtc_state->hw.active);
I915_STATE_WARN(dev_priv, active && master_crtc->pipe != pipe,
"Encoder connected to wrong pipe %c\n",
pipe_name(pipe));
if (active)
- intel_encoder_get_config(encoder, pipe_config);
+ intel_encoder_get_config(encoder, hw_crtc_state);
}
- if (!new_crtc_state->hw.active)
+ if (!sw_crtc_state->hw.active)
return;
- intel_pipe_config_sanity_check(pipe_config);
+ intel_pipe_config_sanity_check(hw_crtc_state);
- if (!intel_pipe_config_compare(new_crtc_state,
- pipe_config, false)) {
+ if (!intel_pipe_config_compare(sw_crtc_state,
+ hw_crtc_state, false)) {
I915_STATE_WARN(dev_priv, 1, "pipe state doesn't match!\n");
- intel_crtc_state_dump(pipe_config, NULL, "hw state");
- intel_crtc_state_dump(new_crtc_state, NULL, "sw state");
+ intel_crtc_state_dump(hw_crtc_state, NULL, "hw state");
+ intel_crtc_state_dump(sw_crtc_state, NULL, "sw state");
}
}
--
2.41.0
next prev parent reply other threads:[~2023-10-04 15:56 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-04 15:55 [Intel-gfx] [PATCH 00/12] drm/i915: Display state checker cleanup Ville Syrjala
2023-10-04 15:55 ` [Intel-gfx] [PATCH 01/12] drm/i915/psr: Unify PSR pre/post plane update hooks Ville Syrjala
2023-10-04 15:55 ` [Intel-gfx] [PATCH 02/12] drm/i915: Stop clobbering old crtc state during state check Ville Syrjala
2023-10-04 15:55 ` [Intel-gfx] [PATCH 03/12] drm/i915: Constify the crtc states in the DPLL checker Ville Syrjala
2023-10-04 15:55 ` [Intel-gfx] [PATCH 04/12] drm/i915: Simplify DPLL state checker calling convention Ville Syrjala
2023-10-04 15:56 ` [Intel-gfx] [PATCH 05/12] drm/i915: Constify watermark state checker Ville Syrjala
2023-10-04 15:56 ` [Intel-gfx] [PATCH 06/12] drm/i915: Simplify watermark state checker calling convention Ville Syrjala
2023-10-04 16:57 ` Jani Nikula
2023-10-04 17:18 ` Ville Syrjälä
2023-10-05 12:27 ` [Intel-gfx] [PATCH v2 " Ville Syrjala
2023-10-05 13:08 ` Jani Nikula
2023-10-04 15:56 ` [Intel-gfx] [PATCH 07/12] drm/i915: Constify the snps/c10x PLL state checkers Ville Syrjala
2023-10-04 15:56 ` [Intel-gfx] [PATCH 08/12] drm/i915: Simplify snps/c10x DPLL state checker calling convetion Ville Syrjala
2023-10-04 15:56 ` [Intel-gfx] [PATCH 09/12] drm/i915: Constify remainder of the state checker Ville Syrjala
2023-10-04 15:56 ` [Intel-gfx] [PATCH 10/12] drm/i915: Simplify the state checker calling convetions Ville Syrjala
2023-10-04 15:56 ` Ville Syrjala [this message]
2023-10-04 15:56 ` [Intel-gfx] [PATCH 12/12] drm/i915: s/dev_priv/i915/ in the state checker Ville Syrjala
2023-10-04 16:58 ` [Intel-gfx] [PATCH 00/12] drm/i915: Display state checker cleanup Jani Nikula
2023-10-04 22:45 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2023-10-04 22:45 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-10-04 23:00 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-10-05 3:28 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Display state checker cleanup (rev2) Patchwork
2023-10-05 3:28 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-10-05 3:42 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-10-05 23:00 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Display state checker cleanup (rev3) Patchwork
2023-10-05 23:00 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-10-05 23:13 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-10-06 13:19 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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